drm/radeon: handle PCIe root ports with addressing limitations
radeon uses a need_dma32 flag to indicate to the drm core that some allocations need to be done using GFP_DMA32, but it only checks the device addressing capabilities to make that decision. Unfortunately PCIe root ports that have limited addressing exist as well. Use the dma_addressing_limited instead to also take those into account. Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Atish Patra <Atish.Patra@wdc.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2386,7 +2386,6 @@ struct radeon_device {
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struct radeon_wb wb;
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struct radeon_dummy_page dummy_page;
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bool shutdown;
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bool need_dma32;
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bool need_swiotlb;
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bool accel_working;
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bool fastfb_working; /* IGP feature*/
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@ -1365,27 +1365,25 @@ int radeon_device_init(struct radeon_device *rdev,
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else
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rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */
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/* set DMA mask + need_dma32 flags.
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/* set DMA mask.
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* PCIE - can handle 40-bits.
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* IGP - can handle 40-bits
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* AGP - generally dma32 is safest
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* PCI - dma32 for legacy pci gart, 40 bits on newer asics
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*/
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rdev->need_dma32 = false;
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dma_bits = 40;
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if (rdev->flags & RADEON_IS_AGP)
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rdev->need_dma32 = true;
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dma_bits = 32;
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if ((rdev->flags & RADEON_IS_PCI) &&
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(rdev->family <= CHIP_RS740))
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rdev->need_dma32 = true;
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dma_bits = 32;
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#ifdef CONFIG_PPC64
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if (rdev->family == CHIP_CEDAR)
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rdev->need_dma32 = true;
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dma_bits = 32;
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#endif
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dma_bits = rdev->need_dma32 ? 32 : 40;
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r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
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if (r) {
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rdev->need_dma32 = true;
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dma_bits = 32;
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pr_warn("radeon: No suitable DMA available\n");
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}
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@ -794,7 +794,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
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r = ttm_bo_device_init(&rdev->mman.bdev,
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&radeon_bo_driver,
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rdev->ddev->anon_inode->i_mapping,
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rdev->need_dma32);
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dma_addressing_limited(&rdev->pdev->dev));
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if (r) {
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DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
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return r;
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