sfc: Add and use MCDI_SET_QWORD() and MCDI_SET_ARRAY_QWORD()
No need to keep open-coding the assignment of high and low dwords. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
This commit is contained in:
Ben Hutchings
parent
9528b92193
commit
338f74df39
@ -88,9 +88,9 @@ extern void efx_mcdi_process_event(struct efx_channel *channel,
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extern void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev);
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/* We expect that 16- and 32-bit fields in MCDI requests and responses
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* are appropriately aligned. Also, on Siena we must copy to the MC
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* shared memory strictly 32 bits at a time, so add any necessary
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* padding.
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* are appropriately aligned, but 64-bit fields are only
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* 32-bit-aligned. Also, on Siena we must copy to the MC shared
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* memory strictly 32 bits at a time, so add any necessary padding.
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*/
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#define MCDI_DECLARE_BUF(_name, _len) \
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efx_dword_t _name[DIV_ROUND_UP(_len, 4)]
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@ -107,6 +107,13 @@ extern void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev);
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EFX_POPULATE_DWORD_1(*_MCDI_DWORD(_buf, _field), EFX_DWORD_0, _value)
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#define MCDI_DWORD(_buf, _field) \
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EFX_DWORD_FIELD(*_MCDI_DWORD(_buf, _field), EFX_DWORD_0)
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#define MCDI_SET_QWORD(_buf, _field, _value) \
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do { \
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EFX_POPULATE_DWORD_1(_MCDI_DWORD(_buf, _field)[0], \
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EFX_DWORD_0, (u32)(_value)); \
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EFX_POPULATE_DWORD_1(_MCDI_DWORD(_buf, _field)[1], \
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EFX_DWORD_0, (u64)(_value) >> 32); \
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} while (0)
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#define MCDI_QWORD(_buf, _field) \
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(EFX_DWORD_FIELD(_MCDI_DWORD(_buf, _field)[0], EFX_DWORD_0) | \
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(u64)EFX_DWORD_FIELD(_MCDI_DWORD(_buf, _field)[1], EFX_DWORD_0) << 32)
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@ -140,6 +147,16 @@ extern void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev);
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EFX_DWORD_0, _value)
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#define MCDI_ARRAY_DWORD(_buf, _field, _index) \
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EFX_DWORD_FIELD(*_MCDI_ARRAY_DWORD(_buf, _field, _index), EFX_DWORD_0)
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#define _MCDI_ARRAY_QWORD(_buf, _field, _index) \
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(BUILD_BUG_ON_ZERO(MC_CMD_ ## _field ## _LEN != 8) + \
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(efx_dword_t *)_MCDI_ARRAY_PTR(_buf, _field, _index, 4))
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#define MCDI_SET_ARRAY_QWORD(_buf, _field, _index, _value) \
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do { \
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EFX_SET_DWORD_FIELD(_MCDI_ARRAY_QWORD(_buf, _field, _index)[0],\
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EFX_DWORD_0, (u32)(_value)); \
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EFX_SET_DWORD_FIELD(_MCDI_ARRAY_QWORD(_buf, _field, _index)[1],\
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EFX_DWORD_0, (u64)(_value) >> 32); \
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} while (0)
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#define MCDI_ARRAY_FIELD(_buf, _field1, _type, _index, _field2) \
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MCDI_FIELD(MCDI_ARRAY_STRUCT_PTR(_buf, _field1, _index), \
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_type ## _TYPEDEF, _field2)
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@ -95,10 +95,8 @@ static int efx_mcdi_mon_update(struct efx_nic *efx)
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MCDI_DECLARE_BUF(inbuf, MC_CMD_READ_SENSORS_IN_LEN);
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int rc;
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MCDI_SET_DWORD(inbuf, READ_SENSORS_IN_DMA_ADDR_LO,
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hwmon->dma_buf.dma_addr & 0xffffffff);
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MCDI_SET_DWORD(inbuf, READ_SENSORS_IN_DMA_ADDR_HI,
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(u64)hwmon->dma_buf.dma_addr >> 32);
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MCDI_SET_QWORD(inbuf, READ_SENSORS_IN_DMA_ADDR,
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hwmon->dma_buf.dma_addr);
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rc = efx_mcdi_rpc(efx, MC_CMD_READ_SENSORS,
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inbuf, sizeof(inbuf), NULL, 0, NULL);
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@ -533,10 +533,8 @@ static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings)
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MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE);
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MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS,
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num_readings);
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MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_LO,
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(u32)ptp->start.dma_addr);
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MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_HI,
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(u32)((u64)ptp->start.dma_addr >> 32));
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MCDI_SET_QWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR,
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ptp->start.dma_addr);
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/* Clear flag that signals MC ready */
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ACCESS_ONCE(*start) = 0;
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@ -1378,9 +1376,7 @@ static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
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(PPB_EXTRA_BITS + MAX_PPB_BITS));
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MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
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MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_LO, (u32)adjustment_ns);
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MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_HI,
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(u32)(adjustment_ns >> 32));
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MCDI_SET_QWORD(inadj, PTP_IN_ADJUST_FREQ, adjustment_ns);
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MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0);
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MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0);
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rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj),
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@ -1402,8 +1398,7 @@ static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
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MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN);
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MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
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MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_LO, 0);
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MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_HI, 0);
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MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, 0);
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MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec);
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MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec);
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return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
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@ -243,7 +243,8 @@ static int efx_sriov_memcpy(struct efx_nic *efx, struct efx_memcpy_req *req,
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MCDI_DECLARE_BUF(inbuf, MCDI_CTL_SDU_LEN_MAX_V1);
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MCDI_DECLARE_STRUCT_PTR(record);
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unsigned int index, used;
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u32 from_rid, from_hi, from_lo;
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u64 from_addr;
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u32 from_rid;
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int rc;
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mb(); /* Finish writing source/reading dest before DMA starts */
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@ -258,14 +259,11 @@ static int efx_sriov_memcpy(struct efx_nic *efx, struct efx_memcpy_req *req,
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count);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_TO_RID,
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req->to_rid);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO,
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(u32)req->to_addr);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI,
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(u32)(req->to_addr >> 32));
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MCDI_SET_QWORD(record, MEMCPY_RECORD_TYPEDEF_TO_ADDR,
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req->to_addr);
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if (req->from_buf == NULL) {
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from_rid = req->from_rid;
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from_lo = (u32)req->from_addr;
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from_hi = (u32)(req->from_addr >> 32);
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from_addr = req->from_addr;
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} else {
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if (WARN_ON(used + req->length >
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MCDI_CTL_SDU_LEN_MAX_V1)) {
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@ -274,18 +272,15 @@ static int efx_sriov_memcpy(struct efx_nic *efx, struct efx_memcpy_req *req,
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}
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from_rid = MC_CMD_MEMCPY_RECORD_TYPEDEF_RID_INLINE;
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from_lo = used;
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from_hi = 0;
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from_addr = used;
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memcpy(_MCDI_PTR(inbuf, used), req->from_buf,
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req->length);
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used += req->length;
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}
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_FROM_RID, from_rid);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO,
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from_lo);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI,
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from_hi);
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MCDI_SET_QWORD(record, MEMCPY_RECORD_TYPEDEF_FROM_ADDR,
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from_addr);
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MCDI_SET_DWORD(record, MEMCPY_RECORD_TYPEDEF_LENGTH,
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req->length);
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