forked from Minki/linux
ARM: KVM: Add banked registers save/restore
Banked registers are one of the many perks of the 32bit architecture, and the world switch needs to cope with it. This requires some "special" accessors, as these are not accessed using a standard coprocessor instruction. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -7,3 +7,4 @@ obj-$(CONFIG_KVM_ARM_HOST) += cp15-sr.o
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obj-$(CONFIG_KVM_ARM_HOST) += timer-sr.o
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obj-$(CONFIG_KVM_ARM_HOST) += vgic-v2-sr.o
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obj-$(CONFIG_KVM_ARM_HOST) += vfp.o
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obj-$(CONFIG_KVM_ARM_HOST) += banked-sr.o
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77
arch/arm/kvm/hyp/banked-sr.c
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77
arch/arm/kvm/hyp/banked-sr.c
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@ -0,0 +1,77 @@
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/*
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* Original code:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* Mostly rewritten in C by Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hyp.h"
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__asm__(".arch_extension virt");
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void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt)
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{
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ctxt->gp_regs.usr_regs.ARM_sp = read_special(SP_usr);
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ctxt->gp_regs.usr_regs.ARM_pc = read_special(ELR_hyp);
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ctxt->gp_regs.usr_regs.ARM_cpsr = read_special(SPSR);
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ctxt->gp_regs.KVM_ARM_SVC_sp = read_special(SP_svc);
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ctxt->gp_regs.KVM_ARM_SVC_lr = read_special(LR_svc);
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ctxt->gp_regs.KVM_ARM_SVC_spsr = read_special(SPSR_svc);
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ctxt->gp_regs.KVM_ARM_ABT_sp = read_special(SP_abt);
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ctxt->gp_regs.KVM_ARM_ABT_lr = read_special(LR_abt);
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ctxt->gp_regs.KVM_ARM_ABT_spsr = read_special(SPSR_abt);
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ctxt->gp_regs.KVM_ARM_UND_sp = read_special(SP_und);
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ctxt->gp_regs.KVM_ARM_UND_lr = read_special(LR_und);
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ctxt->gp_regs.KVM_ARM_UND_spsr = read_special(SPSR_und);
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ctxt->gp_regs.KVM_ARM_IRQ_sp = read_special(SP_irq);
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ctxt->gp_regs.KVM_ARM_IRQ_lr = read_special(LR_irq);
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ctxt->gp_regs.KVM_ARM_IRQ_spsr = read_special(SPSR_irq);
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ctxt->gp_regs.KVM_ARM_FIQ_r8 = read_special(R8_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_r9 = read_special(R9_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_r10 = read_special(R10_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_fp = read_special(R11_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_ip = read_special(R12_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_sp = read_special(SP_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_lr = read_special(LR_fiq);
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ctxt->gp_regs.KVM_ARM_FIQ_spsr = read_special(SPSR_fiq);
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}
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void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt)
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{
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write_special(ctxt->gp_regs.usr_regs.ARM_sp, SP_usr);
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write_special(ctxt->gp_regs.usr_regs.ARM_pc, ELR_hyp);
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write_special(ctxt->gp_regs.usr_regs.ARM_cpsr, SPSR_cxsf);
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write_special(ctxt->gp_regs.KVM_ARM_SVC_sp, SP_svc);
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write_special(ctxt->gp_regs.KVM_ARM_SVC_lr, LR_svc);
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write_special(ctxt->gp_regs.KVM_ARM_SVC_spsr, SPSR_svc);
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write_special(ctxt->gp_regs.KVM_ARM_ABT_sp, SP_abt);
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write_special(ctxt->gp_regs.KVM_ARM_ABT_lr, LR_abt);
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write_special(ctxt->gp_regs.KVM_ARM_ABT_spsr, SPSR_abt);
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write_special(ctxt->gp_regs.KVM_ARM_UND_sp, SP_und);
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write_special(ctxt->gp_regs.KVM_ARM_UND_lr, LR_und);
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write_special(ctxt->gp_regs.KVM_ARM_UND_spsr, SPSR_und);
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write_special(ctxt->gp_regs.KVM_ARM_IRQ_sp, SP_irq);
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write_special(ctxt->gp_regs.KVM_ARM_IRQ_lr, LR_irq);
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write_special(ctxt->gp_regs.KVM_ARM_IRQ_spsr, SPSR_irq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_r8, R8_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_r9, R9_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_r10, R10_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_fp, R11_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_ip, R12_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_sp, SP_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_lr, LR_fiq);
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write_special(ctxt->gp_regs.KVM_ARM_FIQ_spsr, SPSR_fiq);
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}
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@ -45,6 +45,14 @@
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})
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#define read_sysreg(...) __read_sysreg(__VA_ARGS__)
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#define write_special(v, r) \
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asm volatile("msr " __stringify(r) ", %0" : : "r" (v))
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#define read_special(r) ({ \
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u32 __val; \
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asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
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__val; \
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})
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#define TTBR0 __ACCESS_CP15_64(0, c2)
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#define TTBR1 __ACCESS_CP15_64(1, c2)
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#define VTTBR __ACCESS_CP15_64(6, c2)
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@ -99,4 +107,7 @@ static inline bool __vfp_enabled(void)
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return !(read_sysreg(HCPTR) & (HCPTR_TCP(11) | HCPTR_TCP(10)));
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}
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void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt);
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void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt);
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#endif /* __ARM_KVM_HYP_H__ */
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