drm/etnaviv: consolidate hardware fence handling in etnaviv_gpu

This is the only place in the driver that should have to deal with
the raw hardware fences. To avoid any further confusion, consolidate
the fence handling in this file and remove any traces of this from
the header files.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Lucas Stach 2018-11-05 18:12:39 +01:00
parent f416381481
commit 3283ee771c
3 changed files with 7 additions and 17 deletions

View File

@ -107,17 +107,6 @@ static inline size_t size_vstruct(size_t nelem, size_t elem_size, size_t base)
return base + nelem * elem_size; return base + nelem * elem_size;
} }
/* returns true if fence a comes after fence b */
static inline bool fence_after(u32 a, u32 b)
{
return (s32)(a - b) > 0;
}
static inline bool fence_after_eq(u32 a, u32 b)
{
return (s32)(a - b) >= 0;
}
/* /*
* Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies. * Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies.
* We need to calculate the timeout in terms of number of jiffies * We need to calculate the timeout in terms of number of jiffies

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@ -1031,7 +1031,7 @@ static bool etnaviv_fence_signaled(struct dma_fence *fence)
{ {
struct etnaviv_fence *f = to_etnaviv_fence(fence); struct etnaviv_fence *f = to_etnaviv_fence(fence);
return fence_completed(f->gpu, f->base.seqno); return (s32)(f->gpu->completed_fence - f->base.seqno) >= 0;
} }
static void etnaviv_fence_release(struct dma_fence *fence) static void etnaviv_fence_release(struct dma_fence *fence)
@ -1070,6 +1070,12 @@ static struct dma_fence *etnaviv_gpu_fence_alloc(struct etnaviv_gpu *gpu)
return &f->base; return &f->base;
} }
/* returns true if fence a comes after fence b */
static inline bool fence_after(u32 a, u32 b)
{
return (s32)(a - b) > 0;
}
/* /*
* event management: * event management:
*/ */

View File

@ -160,11 +160,6 @@ static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg)
return readl(gpu->mmio + reg); return readl(gpu->mmio + reg);
} }
static inline bool fence_completed(struct etnaviv_gpu *gpu, u32 fence)
{
return fence_after_eq(gpu->completed_fence, fence);
}
int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value); int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value);
int etnaviv_gpu_init(struct etnaviv_gpu *gpu); int etnaviv_gpu_init(struct etnaviv_gpu *gpu);