forked from Minki/linux
ethtool: Add 10base-T1L link mode entry
Add entry for the 10base-T1L full duplex mode. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -13,7 +13,7 @@
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*/
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const char *phy_speed_to_str(int speed)
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{
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BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 92,
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BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93,
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"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
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"If a speed or mode has been added please update phy_speed_to_str "
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"and the PHY settings array.\n");
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@ -176,6 +176,7 @@ static const struct phy_setting settings[] = {
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/* 10M */
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PHY_SETTING( 10, FULL, 10baseT_Full ),
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PHY_SETTING( 10, HALF, 10baseT_Half ),
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PHY_SETTING( 10, FULL, 10baseT1L_Full ),
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};
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#undef PHY_SETTING
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@ -90,8 +90,9 @@ const int phy_10_100_features_array[4] = {
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};
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EXPORT_SYMBOL_GPL(phy_10_100_features_array);
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const int phy_basic_t1_features_array[2] = {
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const int phy_basic_t1_features_array[3] = {
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ETHTOOL_LINK_MODE_TP_BIT,
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ETHTOOL_LINK_MODE_10baseT1L_Full_BIT,
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ETHTOOL_LINK_MODE_100baseT1_Full_BIT,
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};
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EXPORT_SYMBOL_GPL(phy_basic_t1_features_array);
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@ -168,8 +168,10 @@ static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
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if (caps & MAC_10HD)
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__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
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if (caps & MAC_10FD)
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if (caps & MAC_10FD) {
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__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
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__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
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}
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if (caps & MAC_100HD) {
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__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
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@ -65,7 +65,7 @@ extern const int phy_basic_ports_array[3];
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extern const int phy_fibre_port_array[1];
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extern const int phy_all_ports_features_array[7];
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extern const int phy_10_100_features_array[4];
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extern const int phy_basic_t1_features_array[2];
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extern const int phy_basic_t1_features_array[3];
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extern const int phy_gbit_features_array[2];
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extern const int phy_10gbit_features_array[1];
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@ -1691,6 +1691,7 @@ enum ethtool_link_mode_bit_indices {
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ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
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ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90,
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ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91,
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ETHTOOL_LINK_MODE_10baseT1L_Full_BIT = 92,
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/* must be last entry */
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__ETHTOOL_LINK_MODE_MASK_NBITS
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};
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@ -201,6 +201,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
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__DEFINE_LINK_MODE_NAME(400000, CR4, Full),
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__DEFINE_LINK_MODE_NAME(100, FX, Half),
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__DEFINE_LINK_MODE_NAME(100, FX, Full),
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__DEFINE_LINK_MODE_NAME(10, T1L, Full),
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};
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static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
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@ -236,6 +237,7 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
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#define __LINK_MODE_LANES_T1 1
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#define __LINK_MODE_LANES_X 1
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#define __LINK_MODE_LANES_FX 1
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#define __LINK_MODE_LANES_T1L 1
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#define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex) \
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[ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \
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@ -349,6 +351,7 @@ const struct link_mode_info link_mode_params[] = {
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__DEFINE_LINK_MODE_PARAMS(400000, CR4, Full),
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__DEFINE_LINK_MODE_PARAMS(100, FX, Half),
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__DEFINE_LINK_MODE_PARAMS(100, FX, Full),
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__DEFINE_LINK_MODE_PARAMS(10, T1L, Full),
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};
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static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);
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