powerpc/85xx: p1025twr: add module conditional to fix QE-uart issue
A ioport setting was needed when used the QE uart function on TWR-P1025. Added a conditional definition to avoid missing this setting when the QE-uart driver was bulit to a module. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Li Pengbo <Pengbo.Li@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -79,7 +79,7 @@ static void __init twr_p1025_setup_arch(void)
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mpc85xx_qe_init();
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mpc85xx_qe_init();
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mpc85xx_qe_par_io_init();
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mpc85xx_qe_par_io_init();
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#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
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#if IS_ENABLED(CONFIG_UCC_GETH) || IS_ENABLED(CONFIG_SERIAL_QE)
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if (machine_is(twr_p1025)) {
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if (machine_is(twr_p1025)) {
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struct ccsr_guts __iomem *guts;
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struct ccsr_guts __iomem *guts;
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@ -101,7 +101,7 @@ static void __init twr_p1025_setup_arch(void)
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MPC85xx_PMUXCR_QE(12));
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MPC85xx_PMUXCR_QE(12));
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iounmap(guts);
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iounmap(guts);
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#if defined(CONFIG_SERIAL_QE)
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#if IS_ENABLED(CONFIG_SERIAL_QE)
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/* On P1025TWR board, the UCC7 acted as UART port.
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/* On P1025TWR board, the UCC7 acted as UART port.
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* However, The UCC7's CTS pin is low level in default,
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* However, The UCC7's CTS pin is low level in default,
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* it will impact the transmission in full duplex
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* it will impact the transmission in full duplex
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