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pinctrl: renesas: r8a779a0: Add PWM pins, groups and functions

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This patch adds PWM0-4 pins, groups and functions to the R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-10-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Ulrich Hecht 2021-01-12 17:59:26 +01:00 committed by Geert Uytterhoeven
parent 88aac7aa75
commit 30db678101
1 changed files with 77 additions and 0 deletions
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77
drivers/pinctrl/renesas/pfc-r8a779a0.c
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@ -2332,6 +2332,51 @@ static const unsigned int msiof5_rxd_mux[] = {
MSIOF5_RXD_MARK,
};
/* - PWM0 ------------------------------------------------------------------- */
static const unsigned int pwm0_pins[] = {
/* PWM0 */
RCAR_GP_PIN(3, 5),
};
static const unsigned int pwm0_mux[] = {
PWM0_MARK,
};
/* - PWM1 ------------------------------------------------------------------- */
static const unsigned int pwm1_pins[] = {
/* PWM1 */
RCAR_GP_PIN(3, 6),
};
static const unsigned int pwm1_mux[] = {
PWM1_MARK,
};
/* - PWM2 ------------------------------------------------------------------- */
static const unsigned int pwm2_pins[] = {
/* PWM2 */
RCAR_GP_PIN(3, 7),
};
static const unsigned int pwm2_mux[] = {
PWM2_MARK,
};
/* - PWM3 ------------------------------------------------------------------- */
static const unsigned int pwm3_pins[] = {
/* PWM3 */
RCAR_GP_PIN(3, 8),
};
static const unsigned int pwm3_mux[] = {
PWM3_MARK,
};
/* - PWM4 ------------------------------------------------------------------- */
static const unsigned int pwm4_pins[] = {
/* PWM4 */
RCAR_GP_PIN(3, 9),
};
static const unsigned int pwm4_mux[] = {
PWM4_MARK,
};
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX0, TX0 */
@ -2589,6 +2634,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(msiof5_txd),
SH_PFC_PIN_GROUP(msiof5_rxd),
SH_PFC_PIN_GROUP(pwm0),
SH_PFC_PIN_GROUP(pwm1),
SH_PFC_PIN_GROUP(pwm2),
SH_PFC_PIN_GROUP(pwm3),
SH_PFC_PIN_GROUP(pwm4),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@ -2845,6 +2896,26 @@ static const char * const msiof5_groups[] = {
"msiof5_rxd",
};
static const char * const pwm0_groups[] = {
"pwm0",
};
static const char * const pwm1_groups[] = {
"pwm1",
};
static const char * const pwm2_groups[] = {
"pwm2",
};
static const char * const pwm3_groups[] = {
"pwm3",
};
static const char * const pwm4_groups[] = {
"pwm4",
};
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@ -2918,6 +2989,12 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(msiof4),
SH_PFC_FUNCTION(msiof5),
SH_PFC_FUNCTION(pwm0),
SH_PFC_FUNCTION(pwm1),
SH_PFC_FUNCTION(pwm2),
SH_PFC_FUNCTION(pwm3),
SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif3),