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ARM: entry: no need to reload the SPSR value from struct pt_regs

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The SVC IRQ, prefetch and data abort handlers preserve the SPSR value
via r5 across the exception.  Rather than re-loading it from pt_regs,
use the preserved value instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2011-06-26 12:47:08 +01:00
parent 40f0b90a2f
commit 30891c90d8
1 changed files with 1 additions and 9 deletions
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10
arch/arm/kernel/entry-armv.S
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@ -195,10 +195,6 @@ __dabt_svc:
@
disable_irq_notrace
@
@ restore SPSR and restart the instruction
@
ldr r5, [sp, #S_PSR]
#ifdef CONFIG_TRACE_IRQFLAGS
tst r5, #PSR_I_BIT
bleq trace_hardirqs_on
@ -223,7 +219,7 @@ __irq_svc:
tst r0, #_TIF_NEED_RESCHED
blne svc_preempt
#endif
ldr r5, [sp, #S_PSR]
#ifdef CONFIG_TRACE_IRQFLAGS
@ The parent context IRQs must have been enabled to get here in
@ the first place, so there's no point checking the PSR I bit.
@ -308,10 +304,6 @@ __pabt_svc:
@
disable_irq_notrace
@
@ restore SPSR and restart the instruction
@
ldr r5, [sp, #S_PSR]
#ifdef CONFIG_TRACE_IRQFLAGS
tst r5, #PSR_I_BIT
bleq trace_hardirqs_on