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ARM: mvebu: fix suspend to RAM on big-endian configurations

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The current Armada XP suspend to RAM implementation, as added in
commit 27432825ae ("ARM: mvebu: Armada XP GP specific
suspend/resume code") does not handle big-endian configurations
properly: the small bit of assembly code putting the DRAM in
self-refresh and toggling the GPIOs to turn off power forgets to
convert the values to little-endian.

This commit fixes that by making sure the two values we will write to
the DRAM controller register and GPIO register are already in
little-endian before entering the critical assembly code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.19+
Fixes: 27432825ae ("ARM: mvebu: Armada XP GP specific suspend/resume code")
This commit is contained in:
Thomas Petazzoni 2015-06-16 14:12:57 +02:00 committed by Gregory CLEMENT
parent 885dbd154b
commit 2f5bc307be
1 changed files with 3 additions and 0 deletions
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3
arch/arm/mach-mvebu/pm-board.c
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@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
ackcmd |= BIT(pic_raw_gpios[i]);
srcmd = cpu_to_le32(srcmd);
ackcmd = cpu_to_le32(ackcmd);
/*
* Wait a while, the PIC needs quite a bit of time between the
* two GPIO commands.