net/phy/marvell: Expose IDs and flags in a .h and add dns323 LEDs setup flag

This moves the various known Marvell PHY IDs to include/linux/marvell_phy.h
along with dev_flags definitions for use by the driver.

I then added a flag that changes the PHY init code to setup the LEDs
config to the values needed to operate a dns323 rev C1 NAS.

I moved the existing "resistance" flag to the .h as well, though I've
been unable to find whoever sets this to convert it to use that constant.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
This commit is contained in:
Benjamin Herrenschmidt 2010-06-21 13:20:46 +10:00 committed by Nicolas Pitre
parent 43b56074b6
commit 2f495c398e
2 changed files with 40 additions and 18 deletions

View File

@ -29,6 +29,7 @@
#include <linux/mii.h> #include <linux/mii.h>
#include <linux/ethtool.h> #include <linux/ethtool.h>
#include <linux/phy.h> #include <linux/phy.h>
#include <linux/marvell_phy.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>
@ -48,8 +49,6 @@
#define MII_M1145_RGMII_RX_DELAY 0x0080 #define MII_M1145_RGMII_RX_DELAY 0x0080
#define MII_M1145_RGMII_TX_DELAY 0x0002 #define MII_M1145_RGMII_TX_DELAY 0x0002
#define M1145_DEV_FLAGS_RESISTANCE 0x00000001
#define MII_M1111_PHY_LED_CONTROL 0x18 #define MII_M1111_PHY_LED_CONTROL 0x18
#define MII_M1111_PHY_LED_DIRECT 0x4100 #define MII_M1111_PHY_LED_DIRECT 0x4100
#define MII_M1111_PHY_LED_COMBINE 0x411c #define MII_M1111_PHY_LED_COMBINE 0x411c
@ -350,7 +349,10 @@ static int m88e1118_config_init(struct phy_device *phydev)
return err; return err;
/* Adjust LED Control */ /* Adjust LED Control */
err = phy_write(phydev, 0x10, 0x021e); if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
err = phy_write(phydev, 0x10, 0x1100);
else
err = phy_write(phydev, 0x10, 0x021e);
if (err < 0) if (err < 0)
return err; return err;
@ -398,7 +400,7 @@ static int m88e1145_config_init(struct phy_device *phydev)
if (err < 0) if (err < 0)
return err; return err;
if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) { if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
err = phy_write(phydev, 0x1d, 0x0012); err = phy_write(phydev, 0x1d, 0x0012);
if (err < 0) if (err < 0)
return err; return err;
@ -529,8 +531,8 @@ static int m88e1121_did_interrupt(struct phy_device *phydev)
static struct phy_driver marvell_drivers[] = { static struct phy_driver marvell_drivers[] = {
{ {
.phy_id = 0x01410c60, .phy_id = MARVELL_PHY_ID_88E1101,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1101", .name = "Marvell 88E1101",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -541,8 +543,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{ {
.phy_id = 0x01410c90, .phy_id = MARVELL_PHY_ID_88E1112,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1112", .name = "Marvell 88E1112",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -554,8 +556,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{ {
.phy_id = 0x01410cc0, .phy_id = MARVELL_PHY_ID_88E1111,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1111", .name = "Marvell 88E1111",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -567,8 +569,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{ {
.phy_id = 0x01410e10, .phy_id = MARVELL_PHY_ID_88E1118,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1118", .name = "Marvell 88E1118",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -580,8 +582,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = {.owner = THIS_MODULE,}, .driver = {.owner = THIS_MODULE,},
}, },
{ {
.phy_id = 0x01410cb0, .phy_id = MARVELL_PHY_ID_88E1121R,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1121R", .name = "Marvell 88E1121R",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -593,8 +595,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{ {
.phy_id = 0x01410cd0, .phy_id = MARVELL_PHY_ID_88E1145,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1145", .name = "Marvell 88E1145",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
@ -606,8 +608,8 @@ static struct phy_driver marvell_drivers[] = {
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{ {
.phy_id = 0x01410e30, .phy_id = MARVELL_PHY_ID_88E1240,
.phy_id_mask = 0xfffffff0, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1240", .name = "Marvell 88E1240",
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,

View File

@ -0,0 +1,20 @@
#ifndef _MARVELL_PHY_H
#define _MARVELL_PHY_H
/* Mask used for ID comparisons */
#define MARVELL_PHY_ID_MASK 0xfffffff0
/* Known PHY IDs */
#define MARVELL_PHY_ID_88E1101 0x01410c60
#define MARVELL_PHY_ID_88E1112 0x01410c90
#define MARVELL_PHY_ID_88E1111 0x01410cc0
#define MARVELL_PHY_ID_88E1118 0x01410e10
#define MARVELL_PHY_ID_88E1121R 0x01410cb0
#define MARVELL_PHY_ID_88E1145 0x01410cd0
#define MARVELL_PHY_ID_88E1240 0x01410e30
/* struct phy_device dev_flags definitions */
#define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
#define MARVELL_PHY_M1118_DNS323_LEDS 0x00000002
#endif /* _MARVELL_PHY_H */