forked from Minki/linux
crypto: chelsio - Move DMA un/mapping to chcr from lld cxgb4 driver
Allow chcr to do DMA mapping/Unmapping instead of lld cxgb4. It moves "Copy AAD to dst buffer" requirement from driver to firmware. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Harsh Jain
Herbert Xu
parent
2956f36c95
commit
2f47d58043
File diff suppressed because it is too large
Load Diff
@ -214,27 +214,22 @@
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calc_tx_flits_ofld(skb) * 8), 16)))
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#define FILL_CMD_MORE(immdatalen) htonl(ULPTX_CMD_V(ULP_TX_SC_IMM) |\
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ULP_TX_SC_MORE_V((immdatalen) ? 0 : 1))
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ULP_TX_SC_MORE_V((immdatalen)))
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#define MAX_NK 8
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#define CRYPTO_MAX_IMM_TX_PKT_LEN 256
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#define MAX_WR_SIZE 512
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#define ROUND_16(bytes) ((bytes) & 0xFFFFFFF0)
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#define MAX_DSGL_ENT 32
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#define MAX_DIGEST_SKB_SGE (MAX_SKB_FRAGS - 1)
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#define MIN_CIPHER_SG 1 /* IV */
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#define MIN_AUTH_SG 2 /*IV + AAD*/
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#define MIN_GCM_SG 2 /* IV + AAD*/
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#define MIN_AUTH_SG 1 /* IV */
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#define MIN_GCM_SG 1 /* IV */
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#define MIN_DIGEST_SG 1 /*Partial Buffer*/
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#define MIN_CCM_SG 3 /*IV+AAD+B0*/
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#define MIN_CCM_SG 2 /*IV+B0*/
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#define SPACE_LEFT(len) \
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((MAX_WR_SIZE - WR_MIN_LEN - (len)))
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((SGE_MAX_WR_LEN - WR_MIN_LEN - (len)))
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unsigned int sgl_ent_len[] = {0, 0, 16, 24, 40,
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48, 64, 72, 88,
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96, 112, 120, 136,
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144, 160, 168, 184,
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192};
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unsigned int sgl_ent_len[] = {0, 0, 16, 24, 40, 48, 64, 72, 88,
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96, 112, 120, 136, 144, 160, 168, 184,
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192, 208, 216, 232, 240, 256, 264, 280,
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288, 304, 312, 328, 336, 352, 360, 376};
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unsigned int dsgl_ent_len[] = {0, 32, 32, 48, 48, 64, 64, 80, 80,
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112, 112, 128, 128, 144, 144, 160, 160,
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192, 192, 208, 208, 224, 224, 240, 240,
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@ -258,7 +253,6 @@ struct hash_wr_param {
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struct cipher_wr_param {
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struct ablkcipher_request *req;
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struct scatterlist *srcsg;
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char *iv;
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int bytes;
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unsigned short qid;
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@ -298,31 +292,11 @@ enum {
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ICV_16 = 16
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};
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struct hash_op_params {
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unsigned char mk_size;
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unsigned char pad_align;
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unsigned char auth_mode;
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char hash_name[MAX_HASH_NAME];
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unsigned short block_size;
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unsigned short word_size;
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unsigned short ipad_size;
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};
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struct phys_sge_pairs {
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__be16 len[8];
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__be64 addr[8];
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};
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struct phys_sge_parm {
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unsigned int nents;
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unsigned int obsize;
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unsigned short qid;
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};
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struct crypto_result {
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struct completion completion;
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int err;
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};
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static const u32 sha1_init[SHA1_DIGEST_SIZE / 4] = {
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SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4,
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@ -149,9 +149,23 @@
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#define CHCR_HASH_MAX_BLOCK_SIZE_64 64
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#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
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#define CHCR_SG_SIZE 2048
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#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
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#define CHCR_DST_SG_SIZE 2048
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/* Aligned to 128 bit boundary */
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static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
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{
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return crypto_aead_ctx(tfm);
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}
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static inline struct chcr_context *c_ctx(struct crypto_ablkcipher *tfm)
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{
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return crypto_ablkcipher_ctx(tfm);
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}
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static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
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{
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return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
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}
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struct ablk_ctx {
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struct crypto_skcipher *sw_cipher;
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@ -165,15 +179,39 @@ struct ablk_ctx {
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};
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struct chcr_aead_reqctx {
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struct sk_buff *skb;
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struct scatterlist *dst;
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struct scatterlist srcffwd[2];
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struct scatterlist dstffwd[2];
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dma_addr_t iv_dma;
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dma_addr_t b0_dma;
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unsigned int b0_len;
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unsigned int op;
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short int aad_nents;
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short int src_nents;
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short int dst_nents;
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u16 imm;
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u16 verify;
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u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
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unsigned char scratch_pad[MAX_SCRATCH_PAD_SIZE];
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};
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struct ulptx_walk {
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struct ulptx_sgl *sgl;
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unsigned int nents;
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unsigned int pair_idx;
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unsigned int last_sg_len;
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struct scatterlist *last_sg;
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struct ulptx_sge_pair *pair;
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};
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struct dsgl_walk {
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unsigned int nents;
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unsigned int last_sg_len;
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struct scatterlist *last_sg;
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struct cpl_rx_phys_dsgl *dsgl;
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struct phys_sge_pairs *to;
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};
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struct chcr_gcm_ctx {
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u8 ghash_h[AEAD_H_SIZE];
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};
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@ -194,7 +232,6 @@ struct __aead_ctx {
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struct chcr_aead_ctx {
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__be32 key_ctx_hdr;
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unsigned int enckey_len;
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struct crypto_skcipher *null;
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struct crypto_aead *sw_cipher;
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u8 salt[MAX_SALT];
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u8 key[CHCR_AES_MAX_KEY_LEN];
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@ -230,8 +267,11 @@ struct chcr_ahash_req_ctx {
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u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
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u8 *reqbfr;
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u8 *skbfr;
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dma_addr_t dma_addr;
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u32 dma_len;
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u8 reqlen;
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/* DMA the partial hash in it */
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u8 imm;
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u8 is_sg_map;
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u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
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u64 data_len; /* Data len till time */
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/* SKB which is being sent to the hardware for processing */
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@ -240,14 +280,15 @@ struct chcr_ahash_req_ctx {
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struct chcr_blkcipher_req_ctx {
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struct sk_buff *skb;
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struct scatterlist srcffwd[2];
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struct scatterlist dstffwd[2];
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struct scatterlist *dstsg;
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struct scatterlist *dst;
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unsigned int processed;
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unsigned int last_req_len;
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struct scatterlist *srcsg;
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unsigned int src_ofst;
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unsigned int dst_ofst;
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unsigned int op;
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short int dst_nents;
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dma_addr_t iv_dma;
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u16 imm;
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u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
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};
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@ -261,24 +302,6 @@ struct chcr_alg_template {
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} alg;
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};
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struct chcr_req_ctx {
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union {
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struct ahash_request *ahash_req;
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struct aead_request *aead_req;
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struct ablkcipher_request *ablk_req;
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} req;
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union {
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struct chcr_ahash_req_ctx *ahash_ctx;
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struct chcr_aead_reqctx *reqctx;
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struct chcr_blkcipher_req_ctx *ablk_ctx;
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} ctx;
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};
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struct sge_opaque_hdr {
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void *dev;
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dma_addr_t addr[MAX_SKB_FRAGS + 1];
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};
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typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
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unsigned short qid,
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int size,
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@ -291,4 +314,37 @@ static int chcr_aead_op(struct aead_request *req_base,
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static inline int get_aead_subtype(struct crypto_aead *aead);
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static int chcr_handle_cipher_resp(struct ablkcipher_request *req,
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unsigned char *input, int err);
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static void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
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static int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
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unsigned short op_type);
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static void chcr_aead_dma_unmap(struct device *dev, struct aead_request
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*req, unsigned short op_type);
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static inline void chcr_add_aead_dst_ent(struct aead_request *req,
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struct cpl_rx_phys_dsgl *phys_cpl,
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unsigned int assoclen,
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unsigned short op_type,
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unsigned short qid);
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static inline void chcr_add_aead_src_ent(struct aead_request *req,
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struct ulptx_sgl *ulptx,
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unsigned int assoclen,
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unsigned short op_type);
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static inline void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
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struct ulptx_sgl *ulptx,
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struct cipher_wr_param *wrparam);
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static int chcr_cipher_dma_map(struct device *dev,
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struct ablkcipher_request *req);
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static void chcr_cipher_dma_unmap(struct device *dev,
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struct ablkcipher_request *req);
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static inline void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
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struct cpl_rx_phys_dsgl *phys_cpl,
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struct cipher_wr_param *wrparam,
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unsigned short qid);
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int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
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static inline void chcr_add_hash_src_ent(struct ahash_request *req,
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struct ulptx_sgl *ulptx,
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struct hash_wr_param *param);
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static inline int chcr_hash_dma_map(struct device *dev,
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struct ahash_request *req);
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static inline void chcr_hash_dma_unmap(struct device *dev,
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struct ahash_request *req);
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#endif /* __CHCR_CRYPTO_H__ */
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@ -1537,7 +1537,13 @@ int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb)
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*/
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static inline int is_ofld_imm(const struct sk_buff *skb)
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{
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return skb->len <= MAX_IMM_TX_PKT_LEN;
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struct work_request_hdr *req = (struct work_request_hdr *)skb->data;
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unsigned long opcode = FW_WR_OP_G(ntohl(req->wr_hi));
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if (opcode == FW_CRYPTO_LOOKASIDE_WR)
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return skb->len <= SGE_MAX_WR_LEN;
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else
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return skb->len <= MAX_IMM_TX_PKT_LEN;
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}
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/**
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