forked from Minki/linux
net: dsa: bcm_sf2: recalculate switch clock rate based on ports
Whenever a port gets enabled/disabled, recalcultate the required switch clock rate to make sure it always gets set to the expected rate targeting our switch use case. This is only done for the BCM7445 switch as there is no clocking profile available for BCM7278. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -32,6 +32,49 @@
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#include "b53/b53_priv.h"
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#include "b53/b53_regs.h"
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/* Return the number of active ports, not counting the IMP (CPU) port */
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static unsigned int bcm_sf2_num_active_ports(struct dsa_switch *ds)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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unsigned int port, count = 0;
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for (port = 0; port < ARRAY_SIZE(priv->port_sts); port++) {
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if (dsa_is_cpu_port(ds, port))
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continue;
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if (priv->port_sts[port].enabled)
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count++;
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}
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return count;
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}
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static void bcm_sf2_recalc_clock(struct dsa_switch *ds)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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unsigned long new_rate;
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unsigned int ports_active;
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/* Frequenty in Mhz */
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const unsigned long rate_table[] = {
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59220000,
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60820000,
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62500000,
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62500000,
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};
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ports_active = bcm_sf2_num_active_ports(ds);
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if (ports_active == 0 || !priv->clk_mdiv)
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return;
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/* If we overflow our table, just use the recommended operational
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* frequency
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*/
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if (ports_active > ARRAY_SIZE(rate_table))
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new_rate = 90000000;
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else
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new_rate = rate_table[ports_active - 1];
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clk_set_rate(priv->clk_mdiv, new_rate);
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}
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static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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@ -83,6 +126,8 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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reg &= ~(RX_DIS | TX_DIS);
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core_writel(priv, reg, CORE_G_PCTL_PORT(port));
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}
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priv->port_sts[port].enabled = true;
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}
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static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)
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@ -168,6 +213,10 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
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if (!dsa_is_user_port(ds, port))
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return 0;
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priv->port_sts[port].enabled = true;
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bcm_sf2_recalc_clock(ds);
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/* Clear the memory power down */
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg &= ~P_TXQ_PSM_VDD(port);
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@ -261,6 +310,10 @@ static void bcm_sf2_port_disable(struct dsa_switch *ds, int port)
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg |= P_TXQ_PSM_VDD(port);
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core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
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priv->port_sts[port].enabled = false;
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bcm_sf2_recalc_clock(ds);
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}
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@ -1202,10 +1255,18 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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clk_prepare_enable(priv->clk);
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priv->clk_mdiv = devm_clk_get_optional(&pdev->dev, "sw_switch_mdiv");
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if (IS_ERR(priv->clk_mdiv)) {
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ret = PTR_ERR(priv->clk_mdiv);
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goto out_clk;
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}
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clk_prepare_enable(priv->clk_mdiv);
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ret = bcm_sf2_sw_rst(priv);
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if (ret) {
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pr_err("unable to software reset switch: %d\n", ret);
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goto out_clk;
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goto out_clk_mdiv;
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}
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bcm_sf2_gphy_enable_set(priv->dev->ds, true);
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@ -1213,7 +1274,7 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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ret = bcm_sf2_mdio_register(ds);
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if (ret) {
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pr_err("failed to register MDIO bus\n");
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goto out_clk;
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goto out_clk_mdiv;
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}
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bcm_sf2_gphy_enable_set(priv->dev->ds, false);
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@ -1280,6 +1341,8 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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out_mdio:
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bcm_sf2_mdio_unregister(priv);
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out_clk_mdiv:
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clk_disable_unprepare(priv->clk_mdiv);
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out_clk:
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clk_disable_unprepare(priv->clk);
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return ret;
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@ -1295,6 +1358,7 @@ static int bcm_sf2_sw_remove(struct platform_device *pdev)
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dsa_unregister_switch(priv->dev->ds);
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bcm_sf2_cfp_exit(priv->dev->ds);
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bcm_sf2_mdio_unregister(priv);
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clk_disable_unprepare(priv->clk_mdiv);
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clk_disable_unprepare(priv->clk);
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if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev))
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reset_control_assert(priv->rcdev);
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@ -45,6 +45,7 @@ struct bcm_sf2_hw_params {
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struct bcm_sf2_port_status {
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unsigned int link;
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bool enabled;
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};
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struct bcm_sf2_cfp_priv {
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@ -94,6 +95,7 @@ struct bcm_sf2_priv {
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u32 wol_ports_mask;
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struct clk *clk;
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struct clk *clk_mdiv;
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/* MoCA port location */
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int moca_port;
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