forked from Minki/linux
coresight: tmc: implementing TMC-ETF AUX space API
This patch implement the AUX area interfaces required to use the TMC (configured as an ETF) from the Perf sub-system. The heuristic is heavily borrowed from the ETB10 implementation. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mathieu Poirier
Greg Kroah-Hartman
parent
a02e81f7a3
commit
2e499bbc1a
@ -15,7 +15,9 @@
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/circ_buf.h>
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#include <linux/coresight.h>
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#include <linux/perf_event.h>
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#include <linux/slab.h>
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#include "coresight-priv.h"
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#include "coresight-tmc.h"
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@ -282,9 +284,206 @@ static void tmc_disable_etf_link(struct coresight_device *csdev,
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dev_info(drvdata->dev, "TMC disabled\n");
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}
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static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu,
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void **pages, int nr_pages, bool overwrite)
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{
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int node;
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struct cs_buffers *buf;
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if (cpu == -1)
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cpu = smp_processor_id();
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node = cpu_to_node(cpu);
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/* Allocate memory structure for interaction with Perf */
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buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
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if (!buf)
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return NULL;
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buf->snapshot = overwrite;
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buf->nr_pages = nr_pages;
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buf->data_pages = pages;
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return buf;
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}
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static void tmc_free_etf_buffer(void *config)
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{
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struct cs_buffers *buf = config;
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kfree(buf);
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}
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static int tmc_set_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config)
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{
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int ret = 0;
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unsigned long head;
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struct cs_buffers *buf = sink_config;
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/* wrap head around to the amount of space we have */
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head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
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/* find the page to write to */
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buf->cur = head / PAGE_SIZE;
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/* and offset within that page */
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buf->offset = head % PAGE_SIZE;
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local_set(&buf->data_size, 0);
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return ret;
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}
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static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config, bool *lost)
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{
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long size = 0;
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struct cs_buffers *buf = sink_config;
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if (buf) {
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/*
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* In snapshot mode ->data_size holds the new address of the
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* ring buffer's head. The size itself is the whole address
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* range since we want the latest information.
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*/
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if (buf->snapshot)
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handle->head = local_xchg(&buf->data_size,
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buf->nr_pages << PAGE_SHIFT);
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/*
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* Tell the tracer PMU how much we got in this run and if
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* something went wrong along the way. Nobody else can use
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* this cs_buffers instance until we are done. As such
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* resetting parameters here and squaring off with the ring
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* buffer API in the tracer PMU is fine.
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*/
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*lost = !!local_xchg(&buf->lost, 0);
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size = local_xchg(&buf->data_size, 0);
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}
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return size;
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}
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static void tmc_update_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config)
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{
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int i, cur;
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u32 *buf_ptr;
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u32 read_ptr, write_ptr;
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u32 status, to_read;
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unsigned long offset;
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struct cs_buffers *buf = sink_config;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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if (!buf)
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return;
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/* This shouldn't happen */
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if (WARN_ON_ONCE(local_read(&drvdata->mode) != CS_MODE_PERF))
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return;
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CS_UNLOCK(drvdata->base);
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tmc_flush_and_stop(drvdata);
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read_ptr = readl_relaxed(drvdata->base + TMC_RRP);
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write_ptr = readl_relaxed(drvdata->base + TMC_RWP);
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/*
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* Get a hold of the status register and see if a wrap around
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* has occurred. If so adjust things accordingly.
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*/
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status = readl_relaxed(drvdata->base + TMC_STS);
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if (status & TMC_STS_FULL) {
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local_inc(&buf->lost);
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to_read = drvdata->size;
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} else {
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to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->size);
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}
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/*
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* The TMC RAM buffer may be bigger than the space available in the
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* perf ring buffer (handle->size). If so advance the RRP so that we
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* get the latest trace data.
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*/
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if (to_read > handle->size) {
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u32 mask = 0;
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/*
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* The value written to RRP must be byte-address aligned to
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* the width of the trace memory databus _and_ to a frame
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* boundary (16 byte), whichever is the biggest. For example,
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* for 32-bit, 64-bit and 128-bit wide trace memory, the four
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* LSBs must be 0s. For 256-bit wide trace memory, the five
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* LSBs must be 0s.
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*/
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switch (drvdata->memwidth) {
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case TMC_MEM_INTF_WIDTH_32BITS:
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case TMC_MEM_INTF_WIDTH_64BITS:
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case TMC_MEM_INTF_WIDTH_128BITS:
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mask = GENMASK(31, 5);
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break;
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case TMC_MEM_INTF_WIDTH_256BITS:
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mask = GENMASK(31, 6);
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break;
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}
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/*
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* Make sure the new size is aligned in accordance with the
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* requirement explained above.
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*/
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to_read = handle->size & mask;
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/* Move the RAM read pointer up */
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read_ptr = (write_ptr + drvdata->size) - to_read;
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/* Make sure we are still within our limits */
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if (read_ptr > (drvdata->size - 1))
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read_ptr -= drvdata->size;
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/* Tell the HW */
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writel_relaxed(read_ptr, drvdata->base + TMC_RRP);
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local_inc(&buf->lost);
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}
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cur = buf->cur;
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offset = buf->offset;
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/* for every byte to read */
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for (i = 0; i < to_read; i += 4) {
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buf_ptr = buf->data_pages[cur] + offset;
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*buf_ptr = readl_relaxed(drvdata->base + TMC_RRD);
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offset += 4;
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if (offset >= PAGE_SIZE) {
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offset = 0;
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cur++;
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/* wrap around at the end of the buffer */
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cur &= buf->nr_pages - 1;
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}
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}
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/*
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* In snapshot mode all we have to do is communicate to
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* perf_aux_output_end() the address of the current head. In full
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* trace mode the same function expects a size to move rb->aux_head
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* forward.
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*/
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if (buf->snapshot)
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local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
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else
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local_add(to_read, &buf->data_size);
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CS_LOCK(drvdata->base);
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}
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static const struct coresight_ops_sink tmc_etf_sink_ops = {
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.enable = tmc_enable_etf_sink,
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.disable = tmc_disable_etf_sink,
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.alloc_buffer = tmc_alloc_etf_buffer,
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.free_buffer = tmc_free_etf_buffer,
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.set_buffer = tmc_set_etf_buffer,
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.reset_buffer = tmc_reset_etf_buffer,
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.update_buffer = tmc_update_etf_buffer,
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};
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static const struct coresight_ops_link tmc_etf_link_ops = {
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@ -52,6 +52,7 @@
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#define TMC_CTL_CAPT_EN BIT(0)
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/* TMC_STS - 0x00C */
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#define TMC_STS_TMCREADY_BIT 2
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#define TMC_STS_FULL BIT(0)
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#define TMC_STS_TRIGGERED BIT(1)
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/* TMC_AXICTL - 0x110 */
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#define TMC_AXICTL_PROT_CTL_B0 BIT(0)
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