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This is the MFD patch set for the 3.8 merge window.

Browse Source 
We have several new drivers, most of the time coming with their sub devices
 drivers:
 
 - Austria Microsystem's AS3711
 - Nano River's viperboard
 - TI's TPS80031, AM335x TS/ADC,
 - Realtek's MMC/memstick card reader
 - Nokia's retu
 
 We also got some notable cleanups and improvements:
 
 - tps6586x got converted to IRQ domains.
 - tps65910 and tps65090 moved to the regmap IRQ API.
 - STMPE is now Device Tree aware.
 - A general twl6040 and twl-core cleanup, with moves to the regmap I/O and IRQ
   APIs and a conversion to the recently added PWM framework.
 - sta2x11 gained regmap support.
 
 Then the rest is mostly tiny cleanups and fixes, among which we have Mark's
 wm5xxx and wm8xxx patchset.
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Merge tag 'mfd-3.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6

Pull MFS update from Samuel Ortiz:
 "This is the MFD patch set for the 3.8 merge window.

  We have several new drivers, most of the time coming with their sub
  devices drivers:

   - Austria Microsystem's AS3711
   - Nano River's viperboard
   - TI's TPS80031, AM335x TS/ADC,
   - Realtek's MMC/memstick card reader
   - Nokia's retu

  We also got some notable cleanups and improvements:

   - tps6586x got converted to IRQ domains.
   - tps65910 and tps65090 moved to the regmap IRQ API.
   - STMPE is now Device Tree aware.
   - A general twl6040 and twl-core cleanup, with moves to the regmap
     I/O and IRQ APIs and a conversion to the recently added PWM
     framework.
   - sta2x11 gained regmap support.

  Then the rest is mostly tiny cleanups and fixes, among which we have
  Mark's wm5xxx and wm8xxx patchset."

Far amount of annoying but largely trivial conflicts.  Many due to
__devinit/exit removal, others due to one or two of the new drivers also
having come in through another tree.

* tag 'mfd-3.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (119 commits)
  mfd: tps6507x: Convert to devm_kzalloc
  mfd: stmpe: Update DT support for stmpe driver
  mfd: wm5102: Add readback of DSP status 3 register
  mfd: arizona: Log if we fail to create the primary IRQ domain
  mfd: tps80031: MFD_TPS80031 needs to select REGMAP_IRQ
  mfd: tps80031: Add terminating entry for tps80031_id_table
  mfd: sta2x11: Fix potential NULL pointer dereference in __sta2x11_mfd_mask()
  mfd: wm5102: Add tuning for revision B
  mfd: arizona: Defer patch initialistation until after first device boot
  mfd: tps65910: Fix wrong ack_base register
  mfd: tps65910: Remove unused data
  mfd: stmpe: Get rid of irq_invert_polarity
  mfd: ab8500-core: Fix invalid free of devm_ allocated data
  mfd: wm5102: Mark DSP memory regions as volatile
  mfd: wm5102: Correct default for LDO1_CONTROL_2
  mfd: arizona: Register haptics devices
  mfd: wm8994: Make current device behaviour the default
  mfd: tps65090: MFD_TPS65090 needs to select REGMAP_IRQ
  mfd: Fix stmpe.c build when OF is not enabled
  mfd: jz4740-adc: Use devm_kzalloc
  ...
This commit is contained in:
Linus Torvalds 2012-12-16 18:55:20 -08:00
commit 2dfea3803d
87 changed files with 6780 additions and 2455 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
Documentation/devicetree/bindings/mfd/stmpe.txt Normal file
View File

@ -0,0 +1,28 @@
* ST Microelectronics STMPE Multi-Functional Device
STMPE is an MFD device which may expose the following inbuilt devices: gpio,
keypad, touchscreen, adc, pwm, rotator.
Required properties:
- compatible : "st,stmpe[610|801|811|1601|2401|2403]"
- reg : I2C/SPI address of the device
Optional properties:
- interrupts : The interrupt outputs from the controller
- interrupt-controller : Marks the device node as an interrupt controller
- interrupt-parent : Specifies which IRQ controller we're connected to
- wakeup-source : Marks the input device as wakable
- st,autosleep-timeout : Valid entries (ms); 4, 16, 32, 64, 128, 256, 512 and 1024
Example:
stmpe1601: stmpe1601@40 {
compatible = "st,stmpe1601";
reg = <0x40>;
interrupts = <26 0x4>;
interrupt-parent = <&gpio6>;
interrupt-controller;
wakeup-source;
st,autosleep-timeout = <1024>;
};

4
Documentation/devicetree/bindings/regulator/tps65217.txt
View File

@ -11,6 +11,9 @@ Required properties:
using the standard binding for regulators found at
Documentation/devicetree/bindings/regulator/regulator.txt.
Optional properties:
- ti,pmic-shutdown-controller: Telling the PMIC to shutdown on PWR_EN toggle.
The valid names for regulators are:
tps65217: dcdc1, dcdc2, dcdc3, ldo1, ldo2, ldo3 and ldo4
@ -20,6 +23,7 @@ Example:
tps: tps@24 {
compatible = "ti,tps65217";
ti,pmic-shutdown-controller;
regulators {
dcdc1_reg: dcdc1 {

13
drivers/gpio/Kconfig
View File

@ -683,4 +683,17 @@ config GPIO_MSIC
Enable support for GPIO on intel MSIC controllers found in
intel MID devices
comment "USB GPIO expanders:"
config GPIO_VIPERBOARD
tristate "Viperboard GPIO a & b support"
depends on MFD_VIPERBOARD && USB
help
Say yes here to access the GPIO signals of Nano River
Technologies Viperboard. There are two GPIO chips on the
board: gpioa and gpiob.
See viperboard API specification and Nano
River Tech's viperboard.h for detailed meaning
of the module parameters.
endif

1
drivers/gpio/Makefile
View File

@ -76,6 +76,7 @@ obj-$(CONFIG_GPIO_TS5500) += gpio-ts5500.o
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
obj-$(CONFIG_GPIO_VIPERBOARD) += gpio-viperboard.o
obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
obj-$(CONFIG_GPIO_VT8500) += gpio-vt8500.o
obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o

6
drivers/gpio/gpio-da9052.c
View File

@ -185,7 +185,11 @@ static int da9052_gpio_to_irq(struct gpio_chip *gc, u32 offset)
struct da9052_gpio *gpio = to_da9052_gpio(gc);
struct da9052 *da9052 = gpio->da9052;
return da9052->irq_base + DA9052_IRQ_GPI0 + offset;
int irq;
irq = regmap_irq_get_virq(da9052->irq_data, DA9052_IRQ_GPI0 + offset);
return irq;
}
static struct gpio_chip reference_gp = {

9
drivers/gpio/gpio-tps6586x.c
View File

@ -80,6 +80,14 @@ static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset,
val, mask);
}
static int tps6586x_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
{
struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc);
return tps6586x_irq_get_virq(tps6586x_gpio->parent,
TPS6586X_INT_PLDO_0 + offset);
}
static int tps6586x_gpio_probe(struct platform_device *pdev)
{
struct tps6586x_platform_data *pdata;
@ -106,6 +114,7 @@ static int tps6586x_gpio_probe(struct platform_device *pdev)
tps6586x_gpio->gpio_chip.direction_output = tps6586x_gpio_output;
tps6586x_gpio->gpio_chip.set = tps6586x_gpio_set;
tps6586x_gpio->gpio_chip.get = tps6586x_gpio_get;
tps6586x_gpio->gpio_chip.to_irq = tps6586x_gpio_to_irq;
#ifdef CONFIG_OF_GPIO
tps6586x_gpio->gpio_chip.of_node = pdev->dev.parent->of_node;

12
drivers/gpio/gpio-twl4030.c
View File

@ -355,13 +355,13 @@ static struct gpio_chip twl_gpiochip = {
static int gpio_twl4030_pulls(u32 ups, u32 downs)
{
u8 message[6];
u8 message[5];
unsigned i, gpio_bit;
/* For most pins, a pulldown was enabled by default.
* We should have data that's specific to this board.
*/
for (gpio_bit = 1, i = 1; i < 6; i++) {
for (gpio_bit = 1, i = 0; i < 5; i++) {
u8 bit_mask;
unsigned j;
@ -380,16 +380,16 @@ static int gpio_twl4030_pulls(u32 ups, u32 downs)
static int gpio_twl4030_debounce(u32 debounce, u8 mmc_cd)
{
u8 message[4];
u8 message[3];
/* 30 msec of debouncing is always used for MMC card detect,
* and is optional for everything else.
*/
message[1] = (debounce & 0xff) | (mmc_cd & 0x03);
message[0] = (debounce & 0xff) | (mmc_cd & 0x03);
debounce >>= 8;
message[2] = (debounce & 0xff);
message[1] = (debounce & 0xff);
debounce >>= 8;
message[3] = (debounce & 0x03);
message[2] = (debounce & 0x03);
return twl_i2c_write(TWL4030_MODULE_GPIO, message,
REG_GPIO_DEBEN1, 3);

517
drivers/gpio/gpio-viperboard.c Normal file
View File

@ -0,0 +1,517 @@
/*
* Nano River Technologies viperboard GPIO lib driver
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/usb.h>
#include <linux/gpio.h>
#include <linux/mfd/viperboard.h>
#define VPRBRD_GPIOA_CLK_1MHZ 0
#define VPRBRD_GPIOA_CLK_100KHZ 1
#define VPRBRD_GPIOA_CLK_10KHZ 2
#define VPRBRD_GPIOA_CLK_1KHZ 3
#define VPRBRD_GPIOA_CLK_100HZ 4
#define VPRBRD_GPIOA_CLK_10HZ 5
#define VPRBRD_GPIOA_FREQ_DEFAULT 1000
#define VPRBRD_GPIOA_CMD_CONT 0x00
#define VPRBRD_GPIOA_CMD_PULSE 0x01
#define VPRBRD_GPIOA_CMD_PWM 0x02
#define VPRBRD_GPIOA_CMD_SETOUT 0x03
#define VPRBRD_GPIOA_CMD_SETIN 0x04
#define VPRBRD_GPIOA_CMD_SETINT 0x05
#define VPRBRD_GPIOA_CMD_GETIN 0x06
#define VPRBRD_GPIOB_CMD_SETDIR 0x00
#define VPRBRD_GPIOB_CMD_SETVAL 0x01
struct vprbrd_gpioa_msg {
u8 cmd;
u8 clk;
u8 offset;
u8 t1;
u8 t2;
u8 invert;
u8 pwmlevel;
u8 outval;
u8 risefall;
u8 answer;
u8 __fill;
} __packed;
struct vprbrd_gpiob_msg {
u8 cmd;
u16 val;
u16 mask;
} __packed;
struct vprbrd_gpio {
struct gpio_chip gpioa; /* gpio a related things */
u32 gpioa_out;
u32 gpioa_val;
struct gpio_chip gpiob; /* gpio b related things */
u32 gpiob_out;
u32 gpiob_val;
struct vprbrd *vb;
};
/* gpioa sampling clock module parameter */
static unsigned char gpioa_clk;
static unsigned int gpioa_freq = VPRBRD_GPIOA_FREQ_DEFAULT;
module_param(gpioa_freq, uint, 0);
MODULE_PARM_DESC(gpioa_freq,
"gpio-a sampling freq in Hz (default is 1000Hz) valid values: 10, 100, 1000, 10000, 100000, 1000000");
/* ----- begin of gipo a chip -------------------------------------------- */
static int vprbrd_gpioa_get(struct gpio_chip *chip,
unsigned offset)
{
int ret, answer, error = 0;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpioa);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf;
/* if io is set to output, just return the saved value */
if (gpio->gpioa_out & (1 << offset))
return gpio->gpioa_val & (1 << offset);
mutex_lock(&vb->lock);
gamsg->cmd = VPRBRD_GPIOA_CMD_GETIN;
gamsg->clk = 0x00;
gamsg->offset = offset;
gamsg->t1 = 0x00;
gamsg->t2 = 0x00;
gamsg->invert = 0x00;
gamsg->pwmlevel = 0x00;
gamsg->outval = 0x00;
gamsg->risefall = 0x00;
gamsg->answer = 0x00;
gamsg->__fill = 0x00;
ret = usb_control_msg(vb->usb_dev, usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOA, VPRBRD_USB_TYPE_OUT, 0x0000,
0x0000, gamsg, sizeof(struct vprbrd_gpioa_msg),
VPRBRD_USB_TIMEOUT_MS);
if (ret != sizeof(struct vprbrd_gpioa_msg))
error = -EREMOTEIO;
ret = usb_control_msg(vb->usb_dev, usb_rcvctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOA, VPRBRD_USB_TYPE_IN, 0x0000,
0x0000, gamsg, sizeof(struct vprbrd_gpioa_msg),
VPRBRD_USB_TIMEOUT_MS);
answer = gamsg->answer & 0x01;
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpioa_msg))
error = -EREMOTEIO;
if (error)
return error;
return answer;
}
static void vprbrd_gpioa_set(struct gpio_chip *chip,
unsigned offset, int value)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpioa);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf;
if (gpio->gpioa_out & (1 << offset)) {
if (value)
gpio->gpioa_val |= (1 << offset);
else
gpio->gpioa_val &= ~(1 << offset);
mutex_lock(&vb->lock);
gamsg->cmd = VPRBRD_GPIOA_CMD_SETOUT;
gamsg->clk = 0x00;
gamsg->offset = offset;
gamsg->t1 = 0x00;
gamsg->t2 = 0x00;
gamsg->invert = 0x00;
gamsg->pwmlevel = 0x00;
gamsg->outval = value;
gamsg->risefall = 0x00;
gamsg->answer = 0x00;
gamsg->__fill = 0x00;
ret = usb_control_msg(vb->usb_dev,
usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOA, VPRBRD_USB_TYPE_OUT,
0x0000, 0x0000, gamsg,
sizeof(struct vprbrd_gpioa_msg), VPRBRD_USB_TIMEOUT_MS);
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpioa_msg))
dev_err(chip->dev, "usb error setting pin value\n");
}
}
static int vprbrd_gpioa_direction_input(struct gpio_chip *chip,
unsigned offset)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpioa);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf;
gpio->gpioa_out &= ~(1 << offset);
mutex_lock(&vb->lock);
gamsg->cmd = VPRBRD_GPIOA_CMD_SETIN;
gamsg->clk = gpioa_clk;
gamsg->offset = offset;
gamsg->t1 = 0x00;
gamsg->t2 = 0x00;
gamsg->invert = 0x00;
gamsg->pwmlevel = 0x00;
gamsg->outval = 0x00;
gamsg->risefall = 0x00;
gamsg->answer = 0x00;
gamsg->__fill = 0x00;
ret = usb_control_msg(vb->usb_dev, usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOA, VPRBRD_USB_TYPE_OUT, 0x0000,
0x0000, gamsg, sizeof(struct vprbrd_gpioa_msg),
VPRBRD_USB_TIMEOUT_MS);
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpioa_msg))
return -EREMOTEIO;
return 0;
}
static int vprbrd_gpioa_direction_output(struct gpio_chip *chip,
unsigned offset, int value)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpioa);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf;
gpio->gpioa_out |= (1 << offset);
if (value)
gpio->gpioa_val |= (1 << offset);
else
gpio->gpioa_val &= ~(1 << offset);
mutex_lock(&vb->lock);
gamsg->cmd = VPRBRD_GPIOA_CMD_SETOUT;
gamsg->clk = 0x00;
gamsg->offset = offset;
gamsg->t1 = 0x00;
gamsg->t2 = 0x00;
gamsg->invert = 0x00;
gamsg->pwmlevel = 0x00;
gamsg->outval = value;
gamsg->risefall = 0x00;
gamsg->answer = 0x00;
gamsg->__fill = 0x00;
ret = usb_control_msg(vb->usb_dev, usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOA, VPRBRD_USB_TYPE_OUT, 0x0000,
0x0000, gamsg, sizeof(struct vprbrd_gpioa_msg),
VPRBRD_USB_TIMEOUT_MS);
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpioa_msg))
return -EREMOTEIO;
return 0;
}
/* ----- end of gpio a chip ---------------------------------------------- */
/* ----- begin of gipo b chip -------------------------------------------- */
static int vprbrd_gpiob_setdir(struct vprbrd *vb, unsigned offset,
unsigned dir)
{
struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf;
int ret;
gbmsg->cmd = VPRBRD_GPIOB_CMD_SETDIR;
gbmsg->val = cpu_to_be16(dir << offset);
gbmsg->mask = cpu_to_be16(0x0001 << offset);
ret = usb_control_msg(vb->usb_dev, usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOB, VPRBRD_USB_TYPE_OUT, 0x0000,
0x0000, gbmsg, sizeof(struct vprbrd_gpiob_msg),
VPRBRD_USB_TIMEOUT_MS);
if (ret != sizeof(struct vprbrd_gpiob_msg))
return -EREMOTEIO;
return 0;
}
static int vprbrd_gpiob_get(struct gpio_chip *chip,
unsigned offset)
{
int ret;
u16 val;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpiob);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf;
/* if io is set to output, just return the saved value */
if (gpio->gpiob_out & (1 << offset))
return gpio->gpiob_val & (1 << offset);
mutex_lock(&vb->lock);
ret = usb_control_msg(vb->usb_dev, usb_rcvctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOB, VPRBRD_USB_TYPE_IN, 0x0000,
0x0000, gbmsg, sizeof(struct vprbrd_gpiob_msg),
VPRBRD_USB_TIMEOUT_MS);
val = gbmsg->val;
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpiob_msg))
return ret;
/* cache the read values */
gpio->gpiob_val = be16_to_cpu(val);
return (gpio->gpiob_val >> offset) & 0x1;
}
static void vprbrd_gpiob_set(struct gpio_chip *chip,
unsigned offset, int value)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpiob);
struct vprbrd *vb = gpio->vb;
struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf;
if (gpio->gpiob_out & (1 << offset)) {
if (value)
gpio->gpiob_val |= (1 << offset);
else
gpio->gpiob_val &= ~(1 << offset);
mutex_lock(&vb->lock);
gbmsg->cmd = VPRBRD_GPIOB_CMD_SETVAL;
gbmsg->val = cpu_to_be16(value << offset);
gbmsg->mask = cpu_to_be16(0x0001 << offset);
ret = usb_control_msg(vb->usb_dev,
usb_sndctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_GPIOB, VPRBRD_USB_TYPE_OUT,
0x0000, 0x0000, gbmsg,
sizeof(struct vprbrd_gpiob_msg), VPRBRD_USB_TIMEOUT_MS);
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpiob_msg))
dev_err(chip->dev, "usb error setting pin value\n");
}
}
static int vprbrd_gpiob_direction_input(struct gpio_chip *chip,
unsigned offset)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpiob);
struct vprbrd *vb = gpio->vb;
gpio->gpiob_out &= ~(1 << offset);
mutex_lock(&vb->lock);
ret = vprbrd_gpiob_setdir(vb, offset, 0);
mutex_unlock(&vb->lock);
if (ret)
dev_err(chip->dev, "usb error setting pin to input\n");
return ret;
}
static int vprbrd_gpiob_direction_output(struct gpio_chip *chip,
unsigned offset, int value)
{
int ret;
struct vprbrd_gpio *gpio =
container_of(chip, struct vprbrd_gpio, gpiob);
struct vprbrd *vb = gpio->vb;
gpio->gpiob_out |= (1 << offset);
if (value)
gpio->gpiob_val |= (1 << offset);
else
gpio->gpiob_val &= ~(1 << offset);
mutex_lock(&vb->lock);
ret = vprbrd_gpiob_setdir(vb, offset, 1);
if (ret)
dev_err(chip->dev, "usb error setting pin to output\n");
mutex_unlock(&vb->lock);
vprbrd_gpiob_set(chip, offset, value);
return ret;
}
/* ----- end of gpio b chip ---------------------------------------------- */
static int __devinit vprbrd_gpio_probe(struct platform_device *pdev)
{
struct vprbrd *vb = dev_get_drvdata(pdev->dev.parent);
struct vprbrd_gpio *vb_gpio;
int ret;
vb_gpio = devm_kzalloc(&pdev->dev, sizeof(*vb_gpio), GFP_KERNEL);
if (vb_gpio == NULL)
return -ENOMEM;
vb_gpio->vb = vb;
/* registering gpio a */
vb_gpio->gpioa.label = "viperboard gpio a";
vb_gpio->gpioa.dev = &pdev->dev;
vb_gpio->gpioa.owner = THIS_MODULE;
vb_gpio->gpioa.base = -1;
vb_gpio->gpioa.ngpio = 16;
vb_gpio->gpioa.can_sleep = 1;
vb_gpio->gpioa.set = vprbrd_gpioa_set;
vb_gpio->gpioa.get = vprbrd_gpioa_get;
vb_gpio->gpioa.direction_input = vprbrd_gpioa_direction_input;
vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output;
ret = gpiochip_add(&vb_gpio->gpioa);
if (ret < 0) {
dev_err(vb_gpio->gpioa.dev, "could not add gpio a");
goto err_gpioa;
}
/* registering gpio b */
vb_gpio->gpiob.label = "viperboard gpio b";
vb_gpio->gpiob.dev = &pdev->dev;
vb_gpio->gpiob.owner = THIS_MODULE;
vb_gpio->gpiob.base = -1;
vb_gpio->gpiob.ngpio = 16;
vb_gpio->gpiob.can_sleep = 1;
vb_gpio->gpiob.set = vprbrd_gpiob_set;
vb_gpio->gpiob.get = vprbrd_gpiob_get;
vb_gpio->gpiob.direction_input = vprbrd_gpiob_direction_input;
vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output;
ret = gpiochip_add(&vb_gpio->gpiob);
if (ret < 0) {
dev_err(vb_gpio->gpiob.dev, "could not add gpio b");
goto err_gpiob;
}
platform_set_drvdata(pdev, vb_gpio);
return ret;
err_gpiob:
ret = gpiochip_remove(&vb_gpio->gpioa);
err_gpioa:
return ret;
}
static int __devexit vprbrd_gpio_remove(struct platform_device *pdev)
{
struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev);
int ret;
ret = gpiochip_remove(&vb_gpio->gpiob);
if (ret == 0)
ret = gpiochip_remove(&vb_gpio->gpioa);
return ret;
}
static struct platform_driver vprbrd_gpio_driver = {
.driver.name = "viperboard-gpio",
.driver.owner = THIS_MODULE,
.probe = vprbrd_gpio_probe,
.remove = __devexit_p(vprbrd_gpio_remove),
};
static int __init vprbrd_gpio_init(void)
{
switch (gpioa_freq) {
case 1000000:
gpioa_clk = VPRBRD_GPIOA_CLK_1MHZ;
break;
case 100000:
gpioa_clk = VPRBRD_GPIOA_CLK_100KHZ;
break;
case 10000:
gpioa_clk = VPRBRD_GPIOA_CLK_10KHZ;
break;
case 1000:
gpioa_clk = VPRBRD_GPIOA_CLK_1KHZ;
break;
case 100:
gpioa_clk = VPRBRD_GPIOA_CLK_100HZ;
break;
case 10:
gpioa_clk = VPRBRD_GPIOA_CLK_10HZ;
break;
default:
pr_warn("invalid gpioa_freq (%d)\n", gpioa_freq);
gpioa_clk = VPRBRD_GPIOA_CLK_1KHZ;
}
return platform_driver_register(&vprbrd_gpio_driver);
}
subsys_initcall(vprbrd_gpio_init);
static void __exit vprbrd_gpio_exit(void)
{
platform_driver_unregister(&vprbrd_gpio_driver);
}
module_exit(vprbrd_gpio_exit);
MODULE_AUTHOR("Lars Poeschel <poeschel@lemonage.de>");
MODULE_DESCRIPTION("GPIO driver for Nano River Techs Viperboard");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:viperboard-gpio");

10
drivers/i2c/busses/Kconfig
View File

@ -818,6 +818,16 @@ config I2C_TINY_USB
This driver can also be built as a module. If so, the module
will be called i2c-tiny-usb.
config I2C_VIPERBOARD
tristate "Viperboard I2C master support"
depends on MFD_VIPERBOARD && USB
help
Say yes here to access the I2C part of the Nano River
Technologies Viperboard as I2C master.
See viperboard API specification and Nano
River Tech's viperboard.h for detailed meaning
of the module parameters.
comment "Other I2C/SMBus bus drivers"
config I2C_ACORN

1
drivers/i2c/busses/Makefile
View File

@ -79,6 +79,7 @@ obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
obj-$(CONFIG_I2C_TINY_USB) += i2c-tiny-usb.o
obj-$(CONFIG_I2C_VIPERBOARD) += i2c-viperboard.o
# Other I2C/SMBus bus drivers
obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o

480
drivers/i2c/busses/i2c-viperboard.c Normal file
View File

@ -0,0 +1,480 @@
/*
* Nano River Technologies viperboard i2c master driver
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/usb.h>
#include <linux/i2c.h>
#include <linux/mfd/viperboard.h>
struct vprbrd_i2c {
struct i2c_adapter i2c;
u8 bus_freq_param;
};
/* i2c bus frequency module parameter */
static u8 i2c_bus_param;
static unsigned int i2c_bus_freq = 100;
module_param(i2c_bus_freq, int, 0);
MODULE_PARM_DESC(i2c_bus_freq,
"i2c bus frequency in khz (default is 100) valid values: 10, 100, 200, 400, 1000, 3000, 6000");
static int vprbrd_i2c_status(struct i2c_adapter *i2c,
struct vprbrd_i2c_status *status, bool prev_error)
{
u16 bytes_xfer;
int ret;
struct vprbrd *vb = (struct vprbrd *)i2c->algo_data;
/* check for protocol error */
bytes_xfer = sizeof(struct vprbrd_i2c_status);
ret = usb_control_msg(vb->usb_dev, usb_rcvctrlpipe(vb->usb_dev, 0),
VPRBRD_USB_REQUEST_I2C, VPRBRD_USB_TYPE_IN, 0x0000, 0x0000,
status, bytes_xfer, VPRBRD_USB_TIMEOUT_MS);
if (ret != bytes_xfer)
prev_error = true;
if (prev_error) {
dev_err(&i2c->dev, "failure in usb communication\n");
return -EREMOTEIO;
}
dev_dbg(&i2c->dev, " status = %d\n", status->status);
if (status->status != 0x00) {
dev_err(&i2c->dev, "failure: i2c protocol error\n");
return -EPROTO;
}
return 0;
}
static int vprbrd_i2c_receive(struct usb_device *usb_dev,
struct vprbrd_i2c_read_msg *rmsg, int bytes_xfer)
{
int ret, bytes_actual;
int error = 0;
/* send the read request */
ret = usb_bulk_msg(usb_dev,
usb_sndbulkpipe(usb_dev, VPRBRD_EP_OUT), rmsg,
sizeof(struct vprbrd_i2c_read_hdr), &bytes_actual,
VPRBRD_USB_TIMEOUT_MS);
if ((ret < 0)
|| (bytes_actual != sizeof(struct vprbrd_i2c_read_hdr))) {
dev_err(&usb_dev->dev, "failure transmitting usb\n");
error = -EREMOTEIO;
}
/* read the actual data */
ret = usb_bulk_msg(usb_dev,
usb_rcvbulkpipe(usb_dev, VPRBRD_EP_IN), rmsg,
bytes_xfer, &bytes_actual, VPRBRD_USB_TIMEOUT_MS);
if ((ret < 0) || (bytes_xfer != bytes_actual)) {
dev_err(&usb_dev->dev, "failure receiving usb\n");
error = -EREMOTEIO;
}
return error;
}
static int vprbrd_i2c_addr(struct usb_device *usb_dev,
struct vprbrd_i2c_addr_msg *amsg)
{
int ret, bytes_actual;
ret = usb_bulk_msg(usb_dev,
usb_sndbulkpipe(usb_dev, VPRBRD_EP_OUT), amsg,
sizeof(struct vprbrd_i2c_addr_msg), &bytes_actual,
VPRBRD_USB_TIMEOUT_MS);
if ((ret < 0) ||
(sizeof(struct vprbrd_i2c_addr_msg) != bytes_actual)) {
dev_err(&usb_dev->dev, "failure transmitting usb\n");
return -EREMOTEIO;
}
return 0;
}
static int vprbrd_i2c_read(struct vprbrd *vb, struct i2c_msg *msg)
{
int ret;
u16 remain_len, bytes_xfer, len1, len2,
start = 0x0000;
struct vprbrd_i2c_read_msg *rmsg =
(struct vprbrd_i2c_read_msg *)vb->buf;
remain_len = msg->len;
rmsg->header.cmd = VPRBRD_I2C_CMD_READ;
while (remain_len > 0) {
rmsg->header.addr = cpu_to_le16(start + 0x4000);
if (remain_len <= 255) {
len1 = remain_len;
len2 = 0x00;
rmsg->header.len0 = remain_len;
rmsg->header.len1 = 0x00;
rmsg->header.len2 = 0x00;
rmsg->header.len3 = 0x00;
rmsg->header.len4 = 0x00;
rmsg->header.len5 = 0x00;
remain_len = 0;
} else if (remain_len <= 510) {
len1 = remain_len;
len2 = 0x00;
rmsg->header.len0 = remain_len - 255;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0x00;
rmsg->header.len3 = 0x00;
rmsg->header.len4 = 0x00;
rmsg->header.len5 = 0x00;
remain_len = 0;
} else if (remain_len <= 512) {
len1 = remain_len;
len2 = 0x00;
rmsg->header.len0 = remain_len - 510;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0xff;
rmsg->header.len3 = 0x00;
rmsg->header.len4 = 0x00;
rmsg->header.len5 = 0x00;
remain_len = 0;
} else if (remain_len <= 767) {
len1 = 512;
len2 = remain_len - 512;
rmsg->header.len0 = 0x02;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0xff;
rmsg->header.len3 = remain_len - 512;
rmsg->header.len4 = 0x00;
rmsg->header.len5 = 0x00;
bytes_xfer = remain_len;
remain_len = 0;
} else if (remain_len <= 1022) {
len1 = 512;
len2 = remain_len - 512;
rmsg->header.len0 = 0x02;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0xff;
rmsg->header.len3 = remain_len - 767;
rmsg->header.len4 = 0xff;
rmsg->header.len5 = 0x00;
remain_len = 0;
} else if (remain_len <= 1024) {
len1 = 512;
len2 = remain_len - 512;
rmsg->header.len0 = 0x02;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0xff;
rmsg->header.len3 = remain_len - 1022;
rmsg->header.len4 = 0xff;
rmsg->header.len5 = 0xff;
remain_len = 0;
} else {
len1 = 512;
len2 = 512;
rmsg->header.len0 = 0x02;
rmsg->header.len1 = 0xff;
rmsg->header.len2 = 0xff;
rmsg->header.len3 = 0x02;
rmsg->header.len4 = 0xff;
rmsg->header.len5 = 0xff;
remain_len -= 1024;
start += 1024;
}
rmsg->header.tf1 = cpu_to_le16(len1);
rmsg->header.tf2 = cpu_to_le16(len2);
/* first read transfer */
ret = vprbrd_i2c_receive(vb->usb_dev, rmsg, len1);
if (ret < 0)
return ret;
/* copy the received data */
memcpy(msg->buf + start, rmsg, len1);
/* second read transfer if neccessary */
if (len2 > 0) {
ret = vprbrd_i2c_receive(vb->usb_dev, rmsg, len2);
if (ret < 0)
return ret;
/* copy the received data */
memcpy(msg->buf + start + 512, rmsg, len2);
}
}
return 0;
}
static int vprbrd_i2c_write(struct vprbrd *vb, struct i2c_msg *msg)
{
int ret, bytes_actual;
u16 remain_len, bytes_xfer,
start = 0x0000;
struct vprbrd_i2c_write_msg *wmsg =
(struct vprbrd_i2c_write_msg *)vb->buf;
remain_len = msg->len;
wmsg->header.cmd = VPRBRD_I2C_CMD_WRITE;
wmsg->header.last = 0x00;
wmsg->header.chan = 0x00;
wmsg->header.spi = 0x0000;
while (remain_len > 0) {
wmsg->header.addr = cpu_to_le16(start + 0x4000);
if (remain_len > 503) {
wmsg->header.len1 = 0xff;
wmsg->header.len2 = 0xf8;
remain_len -= 503;
bytes_xfer = 503 + sizeof(struct vprbrd_i2c_write_hdr);
start += 503;
} else if (remain_len > 255) {
wmsg->header.len1 = 0xff;
wmsg->header.len2 = (remain_len - 255);
bytes_xfer = remain_len +
sizeof(struct vprbrd_i2c_write_hdr);
remain_len = 0;
} else {
wmsg->header.len1 = remain_len;
wmsg->header.len2 = 0x00;
bytes_xfer = remain_len +
sizeof(struct vprbrd_i2c_write_hdr);
remain_len = 0;
}
memcpy(wmsg->data, msg->buf + start,
bytes_xfer - sizeof(struct vprbrd_i2c_write_hdr));
ret = usb_bulk_msg(vb->usb_dev,
usb_sndbulkpipe(vb->usb_dev,
VPRBRD_EP_OUT), wmsg,
bytes_xfer, &bytes_actual, VPRBRD_USB_TIMEOUT_MS);
if ((ret < 0) || (bytes_xfer != bytes_actual))
return -EREMOTEIO;
}
return 0;
}
static int vprbrd_i2c_xfer(struct i2c_adapter *i2c, struct i2c_msg *msgs,
int num)
{
struct i2c_msg *pmsg;
int i, ret,
error = 0;
struct vprbrd *vb = (struct vprbrd *)i2c->algo_data;
struct vprbrd_i2c_addr_msg *amsg =
(struct vprbrd_i2c_addr_msg *)vb->buf;
struct vprbrd_i2c_status *smsg = (struct vprbrd_i2c_status *)vb->buf;
dev_dbg(&i2c->dev, "master xfer %d messages:\n", num);
for (i = 0 ; i < num ; i++) {
pmsg = &msgs[i];
dev_dbg(&i2c->dev,
" %d: %s (flags %d) %d bytes to 0x%02x\n",
i, pmsg->flags & I2C_M_RD ? "read" : "write",
pmsg->flags, pmsg->len, pmsg->addr);
/* msgs longer than 2048 bytes are not supported by adapter */
if (pmsg->len > 2048)
return -EINVAL;
mutex_lock(&vb->lock);
/* directly send the message */
if (pmsg->flags & I2C_M_RD) {
/* read data */
amsg->cmd = VPRBRD_I2C_CMD_ADDR;
amsg->unknown2 = 0x00;
amsg->unknown3 = 0x00;
amsg->addr = pmsg->addr;
amsg->unknown1 = 0x01;
amsg->len = cpu_to_le16(pmsg->len);
/* send the addr and len, we're interested to board */
ret = vprbrd_i2c_addr(vb->usb_dev, amsg);
if (ret < 0)
error = ret;
ret = vprbrd_i2c_read(vb, pmsg);
if (ret < 0)
error = ret;
ret = vprbrd_i2c_status(i2c, smsg, error);
if (ret < 0)
error = ret;
/* in case of protocol error, return the error */
if (error < 0)
goto error;
} else {
/* write data */
ret = vprbrd_i2c_write(vb, pmsg);
amsg->cmd = VPRBRD_I2C_CMD_ADDR;
amsg->unknown2 = 0x00;
amsg->unknown3 = 0x00;
amsg->addr = pmsg->addr;
amsg->unknown1 = 0x00;
amsg->len = cpu_to_le16(pmsg->len);
/* send the addr, the data goes to to board */
ret = vprbrd_i2c_addr(vb->usb_dev, amsg);
if (ret < 0)
error = ret;
ret = vprbrd_i2c_status(i2c, smsg, error);
if (ret < 0)
error = ret;
if (error < 0)
goto error;
}
mutex_unlock(&vb->lock);
}
return 0;
error:
mutex_unlock(&vb->lock);
return error;
}
static u32 vprbrd_i2c_func(struct i2c_adapter *i2c)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
/* This is the actual algorithm we define */
static const struct i2c_algorithm vprbrd_algorithm = {
.master_xfer = vprbrd_i2c_xfer,
.functionality = vprbrd_i2c_func,
};
static int __devinit vprbrd_i2c_probe(struct platform_device *pdev)
{
struct vprbrd *vb = dev_get_drvdata(pdev->dev.parent);
struct vprbrd_i2c *vb_i2c;
int ret;
int pipe;
vb_i2c = kzalloc(sizeof(*vb_i2c), GFP_KERNEL);
if (vb_i2c == NULL)
return -ENOMEM;
/* setup i2c adapter description */
vb_i2c->i2c.owner = THIS_MODULE;
vb_i2c->i2c.class = I2C_CLASS_HWMON;
vb_i2c->i2c.algo = &vprbrd_algorithm;
vb_i2c->i2c.algo_data = vb;
/* save the param in usb capabable memory */
vb_i2c->bus_freq_param = i2c_bus_param;
snprintf(vb_i2c->i2c.name, sizeof(vb_i2c->i2c.name),
"viperboard at bus %03d device %03d",
vb->usb_dev->bus->busnum, vb->usb_dev->devnum);
/* setting the bus frequency */
if ((i2c_bus_param <= VPRBRD_I2C_FREQ_10KHZ)
&& (i2c_bus_param >= VPRBRD_I2C_FREQ_6MHZ)) {
pipe = usb_sndctrlpipe(vb->usb_dev, 0);
ret = usb_control_msg(vb->usb_dev, pipe,
VPRBRD_USB_REQUEST_I2C_FREQ, VPRBRD_USB_TYPE_OUT,
0x0000, 0x0000, &vb_i2c->bus_freq_param, 1,
VPRBRD_USB_TIMEOUT_MS);
if (ret != 1) {
dev_err(&pdev->dev,
"failure setting i2c_bus_freq to %d\n", i2c_bus_freq);
ret = -EIO;
goto error;
}
} else {
dev_err(&pdev->dev,
"invalid i2c_bus_freq setting:%d\n", i2c_bus_freq);
ret = -EIO;
goto error;
}
vb_i2c->i2c.dev.parent = &pdev->dev;
/* attach to i2c layer */
i2c_add_adapter(&vb_i2c->i2c);
platform_set_drvdata(pdev, vb_i2c);
return 0;
error:
kfree(vb_i2c);
return ret;
}
static int __devexit vprbrd_i2c_remove(struct platform_device *pdev)
{
struct vprbrd_i2c *vb_i2c = platform_get_drvdata(pdev);
int ret;
ret = i2c_del_adapter(&vb_i2c->i2c);
return ret;
}
static struct platform_driver vprbrd_i2c_driver = {
.driver.name = "viperboard-i2c",
.driver.owner = THIS_MODULE,
.probe = vprbrd_i2c_probe,
.remove = __devexit_p(vprbrd_i2c_remove),
};
static int __init vprbrd_i2c_init(void)
{
switch (i2c_bus_freq) {
case 6000:
i2c_bus_param = VPRBRD_I2C_FREQ_6MHZ;
break;
case 3000:
i2c_bus_param = VPRBRD_I2C_FREQ_3MHZ;
break;
case 1000:
i2c_bus_param = VPRBRD_I2C_FREQ_1MHZ;
break;
case 400:
i2c_bus_param = VPRBRD_I2C_FREQ_400KHZ;
break;
case 200:
i2c_bus_param = VPRBRD_I2C_FREQ_200KHZ;
break;
case 100:
i2c_bus_param = VPRBRD_I2C_FREQ_100KHZ;
break;
case 10:
i2c_bus_param = VPRBRD_I2C_FREQ_10KHZ;
break;
default:
pr_warn("invalid i2c_bus_freq (%d)\n", i2c_bus_freq);
i2c_bus_param = VPRBRD_I2C_FREQ_100KHZ;
}
return platform_driver_register(&vprbrd_i2c_driver);
}
subsys_initcall(vprbrd_i2c_init);
static void __exit vprbrd_i2c_exit(void)
{
platform_driver_unregister(&vprbrd_i2c_driver);
}
module_exit(vprbrd_i2c_exit);
MODULE_AUTHOR("Lars Poeschel <poeschel@lemonage.de>");
MODULE_DESCRIPTION("I2C master driver for Nano River Techs Viperboard");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:viperboard-i2c");

14
drivers/iio/adc/Kconfig
View File

@ -125,4 +125,18 @@ config TI_ADC081C
This driver can also be built as a module. If so, the module will be
called ti-adc081c.
config TI_AM335X_ADC
tristate "TI's ADC driver"
depends on MFD_TI_AM335X_TSCADC
help
Say yes here to build support for Texas Instruments ADC
driver which is also a MFD client.
config VIPERBOARD_ADC
tristate "Viperboard ADC support"
depends on MFD_VIPERBOARD && USB
help
Say yes here to access the ADC part of the Nano River
Technologies Viperboard.
endmenu

3
drivers/iio/adc/Makefile
View File

@ -13,4 +13,5 @@ obj-$(CONFIG_AT91_ADC) += at91_adc.o
obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
obj-$(CONFIG_MAX1363) += max1363.o
obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o

260
drivers/iio/adc/ti_am335x_adc.c Normal file
View File

@ -0,0 +1,260 @@
/*
* TI ADC MFD driver
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/iio/iio.h>
#include <linux/mfd/ti_am335x_tscadc.h>
#include <linux/platform_data/ti_am335x_adc.h>
struct tiadc_device {
struct ti_tscadc_dev *mfd_tscadc;
int channels;
};
static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
{
return readl(adc->mfd_tscadc->tscadc_base + reg);
}
static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
unsigned int val)
{
writel(val, adc->mfd_tscadc->tscadc_base + reg);
}
static void tiadc_step_config(struct tiadc_device *adc_dev)
{
unsigned int stepconfig;
int i, channels = 0, steps;
/*
* There are 16 configurable steps and 8 analog input
* lines available which are shared between Touchscreen and ADC.
*
* Steps backwards i.e. from 16 towards 0 are used by ADC
* depending on number of input lines needed.
* Channel would represent which analog input
* needs to be given to ADC to digitalize data.
*/
steps = TOTAL_STEPS - adc_dev->channels;
channels = TOTAL_CHANNELS - adc_dev->channels;
stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
for (i = (steps + 1); i <= TOTAL_STEPS; i++) {
tiadc_writel(adc_dev, REG_STEPCONFIG(i),
stepconfig | STEPCONFIG_INP(channels));
tiadc_writel(adc_dev, REG_STEPDELAY(i),
STEPCONFIG_OPENDLY);
channels++;
}
tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
}
static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
{
struct iio_chan_spec *chan_array;
int i;
indio_dev->num_channels = channels;
chan_array = kcalloc(indio_dev->num_channels,
sizeof(struct iio_chan_spec), GFP_KERNEL);
if (chan_array == NULL)
return -ENOMEM;
for (i = 0; i < (indio_dev->num_channels); i++) {
struct iio_chan_spec *chan = chan_array + i;
chan->type = IIO_VOLTAGE;
chan->indexed = 1;
chan->channel = i;
chan->info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT;
}
indio_dev->channels = chan_array;
return indio_dev->num_channels;
}
static void tiadc_channels_remove(struct iio_dev *indio_dev)
{
kfree(indio_dev->channels);
}
static int tiadc_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
int i;
unsigned int fifo1count, readx1;
/*
* When the sub-system is first enabled,
* the sequencer will always start with the
* lowest step (1) and continue until step (16).
* For ex: If we have enabled 4 ADC channels and
* currently use only 1 out of them, the
* sequencer still configures all the 4 steps,
* leading to 3 unwanted data.
* Hence we need to flush out this data.
*/
fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
for (i = 0; i < fifo1count; i++) {
readx1 = tiadc_readl(adc_dev, REG_FIFO1);
if (i == chan->channel)
*val = readx1 & 0xfff;
}
tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
return IIO_VAL_INT;
}
static const struct iio_info tiadc_info = {
.read_raw = &tiadc_read_raw,
};
static int __devinit tiadc_probe(struct platform_device *pdev)
{
struct iio_dev *indio_dev;
struct tiadc_device *adc_dev;
struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
struct mfd_tscadc_board *pdata;
int err;
pdata = tscadc_dev->dev->platform_data;
if (!pdata || !pdata->adc_init) {
dev_err(&pdev->dev, "Could not find platform data\n");
return -EINVAL;
}
indio_dev = iio_device_alloc(sizeof(struct tiadc_device));
if (indio_dev == NULL) {
dev_err(&pdev->dev, "failed to allocate iio device\n");
err = -ENOMEM;
goto err_ret;
}
adc_dev = iio_priv(indio_dev);
adc_dev->mfd_tscadc = tscadc_dev;
adc_dev->channels = pdata->adc_init->adc_channels;
indio_dev->dev.parent = &pdev->dev;
indio_dev->name = dev_name(&pdev->dev);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &tiadc_info;
tiadc_step_config(adc_dev);
err = tiadc_channel_init(indio_dev, adc_dev->channels);
if (err < 0)
goto err_free_device;
err = iio_device_register(indio_dev);
if (err)
goto err_free_channels;
platform_set_drvdata(pdev, indio_dev);
return 0;
err_free_channels:
tiadc_channels_remove(indio_dev);
err_free_device:
iio_device_free(indio_dev);
err_ret:
return err;
}
static int __devexit tiadc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
iio_device_unregister(indio_dev);
tiadc_channels_remove(indio_dev);
iio_device_free(indio_dev);
return 0;
}
#ifdef CONFIG_PM
static int tiadc_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct tiadc_device *adc_dev = iio_priv(indio_dev);
struct ti_tscadc_dev *tscadc_dev = dev->platform_data;
unsigned int idle;
if (!device_may_wakeup(tscadc_dev->dev)) {
idle = tiadc_readl(adc_dev, REG_CTRL);
idle &= ~(CNTRLREG_TSCSSENB);
tiadc_writel(adc_dev, REG_CTRL, (idle |
CNTRLREG_POWERDOWN));
}
return 0;
}
static int tiadc_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct tiadc_device *adc_dev = iio_priv(indio_dev);
unsigned int restore;
/* Make sure ADC is powered up */
restore = tiadc_readl(adc_dev, REG_CTRL);
restore &= ~(CNTRLREG_POWERDOWN);
tiadc_writel(adc_dev, REG_CTRL, restore);
tiadc_step_config(adc_dev);
return 0;
}
static const struct dev_pm_ops tiadc_pm_ops = {
.suspend = tiadc_suspend,
.resume = tiadc_resume,
};
#define TIADC_PM_OPS (&tiadc_pm_ops)
#else
#define TIADC_PM_OPS NULL
#endif
static struct platform_driver tiadc_driver = {
.driver = {
.name = "tiadc",
.owner = THIS_MODULE,
.pm = TIADC_PM_OPS,
},
.probe = tiadc_probe,
.remove = __devexit_p(tiadc_remove),
};
module_platform_driver(tiadc_driver);
MODULE_DESCRIPTION("TI ADC controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");

181
drivers/iio/adc/viperboard_adc.c Normal file
View File

@ -0,0 +1,181 @@
/*
* Nano River Technologies viperboard IIO ADC driver
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/usb.h>
#include <linux/iio/iio.h>
#include <linux/mfd/viperboard.h>
#define VPRBRD_ADC_CMD_GET 0x00
struct vprbrd_adc_msg {
u8 cmd;
u8 chan;
u8 val;
} __packed;
struct vprbrd_adc {
struct vprbrd *vb;
};
#define VPRBRD_ADC_CHANNEL(_index) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = _index, \
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \
.scan_index = _index, \
.scan_type = { \
.sign = 'u', \
.realbits = 8, \
.storagebits = 8, \
}, \
}
static struct iio_chan_spec const vprbrd_adc_iio_channels[] = {
VPRBRD_ADC_CHANNEL(0),
VPRBRD_ADC_CHANNEL(1),
VPRBRD_ADC_CHANNEL(2),
VPRBRD_ADC_CHANNEL(3),
};
static int vprbrd_iio_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long info)
{
int ret, error = 0;
struct vprbrd_adc *adc = iio_priv(iio_dev);
struct vprbrd *vb = adc->vb;
struct vprbrd_adc_msg *admsg = (struct vprbrd_adc_msg *)vb->buf;
switch (info) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&vb->lock);
admsg->cmd = VPRBRD_ADC_CMD_GET;
admsg->chan = chan->scan_index;
admsg->val = 0x00;
ret = usb_control_msg(vb->usb_dev,
usb_sndctrlpipe(vb->usb_dev, 0), VPRBRD_USB_REQUEST_ADC,
VPRBRD_USB_TYPE_OUT, 0x0000, 0x0000, admsg,
sizeof(struct vprbrd_adc_msg), VPRBRD_USB_TIMEOUT_MS);
if (ret != sizeof(struct vprbrd_adc_msg)) {
dev_err(&iio_dev->dev, "usb send error on adc read\n");
error = -EREMOTEIO;
}
ret = usb_control_msg(vb->usb_dev,
usb_rcvctrlpipe(vb->usb_dev, 0), VPRBRD_USB_REQUEST_ADC,
VPRBRD_USB_TYPE_IN, 0x0000, 0x0000, admsg,
sizeof(struct vprbrd_adc_msg), VPRBRD_USB_TIMEOUT_MS);
*val = admsg->val;
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_adc_msg)) {
dev_err(&iio_dev->dev, "usb recv error on adc read\n");
error = -EREMOTEIO;
}
if (error)
goto error;
return IIO_VAL_INT;
default:
error = -EINVAL;
break;
}
error:
return error;
}
static const struct iio_info vprbrd_adc_iio_info = {
.read_raw = &vprbrd_iio_read_raw,
.driver_module = THIS_MODULE,
};
static int __devinit vprbrd_adc_probe(struct platform_device *pdev)
{
struct vprbrd *vb = dev_get_drvdata(pdev->dev.parent);
struct vprbrd_adc *adc;
struct iio_dev *indio_dev;
int ret;
/* registering iio */
indio_dev = iio_device_alloc(sizeof(*adc));
if (!indio_dev) {
dev_err(&pdev->dev, "failed allocating iio device\n");
return -ENOMEM;
}
adc = iio_priv(indio_dev);
adc->vb = vb;
indio_dev->name = "viperboard adc";
indio_dev->dev.parent = &pdev->dev;
indio_dev->info = &vprbrd_adc_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = vprbrd_adc_iio_channels;
indio_dev->num_channels = ARRAY_SIZE(vprbrd_adc_iio_channels);
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "could not register iio (adc)");
goto error;
}
platform_set_drvdata(pdev, indio_dev);
return 0;
error:
iio_device_free(indio_dev);
return ret;
}
static int __devexit vprbrd_adc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
iio_device_unregister(indio_dev);
iio_device_free(indio_dev);
return 0;
}
static struct platform_driver vprbrd_adc_driver = {
.driver = {
.name = "viperboard-adc",
.owner = THIS_MODULE,
},
.probe = vprbrd_adc_probe,
.remove = __devexit_p(vprbrd_adc_remove),
};
module_platform_driver(vprbrd_adc_driver);
MODULE_AUTHOR("Lars Poeschel <poeschel@lemonage.de>");
MODULE_DESCRIPTION("IIO ADC driver for Nano River Techs Viperboard");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:viperboard-adc");

22
drivers/input/misc/da9052_onkey.c
View File

@ -24,7 +24,6 @@ struct da9052_onkey {
struct da9052 *da9052;
struct input_dev *input;
struct delayed_work work;
unsigned int irq;
};
static void da9052_onkey_query(struct da9052_onkey *onkey)
@ -76,7 +75,6 @@ static int __devinit da9052_onkey_probe(struct platform_device *pdev)
struct da9052 *da9052 = dev_get_drvdata(pdev->dev.parent);
struct da9052_onkey *onkey;
struct input_dev *input_dev;
int irq;
int error;
if (!da9052) {
@ -84,13 +82,6 @@ static int __devinit da9052_onkey_probe(struct platform_device *pdev)
return -EINVAL;
}
irq = platform_get_irq_byname(pdev, "ONKEY");
if (irq < 0) {
dev_err(&pdev->dev,
"Failed to get an IRQ for input device, %d\n", irq);
return -EINVAL;
}
onkey = kzalloc(sizeof(*onkey), GFP_KERNEL);
input_dev = input_allocate_device();
if (!onkey || !input_dev) {
@ -101,7 +92,6 @@ static int __devinit da9052_onkey_probe(struct platform_device *pdev)
onkey->input = input_dev;
onkey->da9052 = da9052;
onkey->irq = irq;
INIT_DELAYED_WORK(&onkey->work, da9052_onkey_work);
input_dev->name = "da9052-onkey";
@ -111,13 +101,11 @@ static int __devinit da9052_onkey_probe(struct platform_device *pdev)
input_dev->evbit[0] = BIT_MASK(EV_KEY);
__set_bit(KEY_POWER, input_dev->keybit);
error = request_threaded_irq(onkey->irq, NULL, da9052_onkey_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
"ONKEY", onkey);
error = da9052_request_irq(onkey->da9052, DA9052_IRQ_NONKEY, "ONKEY",
da9052_onkey_irq, onkey);
if (error < 0) {
dev_err(onkey->da9052->dev,
"Failed to register ONKEY IRQ %d, error = %d\n",
onkey->irq, error);
"Failed to register ONKEY IRQ: %d\n", error);
goto err_free_mem;
}
@ -132,7 +120,7 @@ static int __devinit da9052_onkey_probe(struct platform_device *pdev)
return 0;
err_free_irq:
free_irq(onkey->irq, onkey);
da9052_free_irq(onkey->da9052, DA9052_IRQ_NONKEY, onkey);
cancel_delayed_work_sync(&onkey->work);
err_free_mem:
input_free_device(input_dev);
@ -145,7 +133,7 @@ static int __devexit da9052_onkey_remove(struct platform_device *pdev)
{
struct da9052_onkey *onkey = platform_get_drvdata(pdev);
free_irq(onkey->irq, onkey);
da9052_free_irq(onkey->da9052, DA9052_IRQ_NONKEY, onkey);
cancel_delayed_work_sync(&onkey->work);
input_unregister_device(onkey->input);

6
drivers/input/touchscreen/Kconfig
View File

@ -529,9 +529,9 @@ config TOUCHSCREEN_TOUCHWIN
To compile this driver as a module, choose M here: the
module will be called touchwin.
config TOUCHSCREEN_TI_TSCADC
config TOUCHSCREEN_TI_AM335X_TSC
tristate "TI Touchscreen Interface"
depends on ARCH_OMAP2PLUS
depends on MFD_TI_AM335X_TSCADC
help
Say Y here if you have 4/5/8 wire touchscreen controller
to be connected to the ADC controller on your TI AM335x SoC.
@ -539,7 +539,7 @@ config TOUCHSCREEN_TI_TSCADC
If unsure, say N.
To compile this driver as a module, choose M here: the
module will be called ti_tscadc.
module will be called ti_am335x_tsc.
config TOUCHSCREEN_ATMEL_TSADCC
tristate "Atmel Touchscreen Interface"

2
drivers/input/touchscreen/Makefile
View File

@ -52,7 +52,7 @@ obj-$(CONFIG_TOUCHSCREEN_PIXCIR) += pixcir_i2c_ts.o
obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o
obj-$(CONFIG_TOUCHSCREEN_ST1232) += st1232.o
obj-$(CONFIG_TOUCHSCREEN_STMPE) += stmpe-ts.o
obj-$(CONFIG_TOUCHSCREEN_TI_TSCADC) += ti_tscadc.o
obj-$(CONFIG_TOUCHSCREEN_TI_AM335X_TSC) += ti_am335x_tsc.o
obj-$(CONFIG_TOUCHSCREEN_TNETV107X) += tnetv107x-ts.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o

59
drivers/input/touchscreen/da9052_tsi.c
View File

@ -27,8 +27,6 @@ struct da9052_tsi {
struct input_dev *dev;
struct delayed_work ts_pen_work;
struct mutex mutex;
unsigned int irq_pendwn;
unsigned int irq_datardy;
bool stopped;
bool adc_on;
};
@ -45,8 +43,8 @@ static irqreturn_t da9052_ts_pendwn_irq(int irq, void *data)
if (!tsi->stopped) {
/* Mask PEN_DOWN event and unmask TSI_READY event */
disable_irq_nosync(tsi->irq_pendwn);
enable_irq(tsi->irq_datardy);
da9052_disable_irq_nosync(tsi->da9052, DA9052_IRQ_PENDOWN);
da9052_enable_irq(tsi->da9052, DA9052_IRQ_TSIREADY);
da9052_ts_adc_toggle(tsi, true);
@ -137,8 +135,8 @@ static void da9052_ts_pen_work(struct work_struct *work)
return;
/* Mask TSI_READY event and unmask PEN_DOWN event */
disable_irq(tsi->irq_datardy);
enable_irq(tsi->irq_pendwn);
da9052_disable_irq(tsi->da9052, DA9052_IRQ_TSIREADY);
da9052_enable_irq(tsi->da9052, DA9052_IRQ_PENDOWN);
}
}
}
@ -197,7 +195,7 @@ static int da9052_ts_input_open(struct input_dev *input_dev)
mb();
/* Unmask PEN_DOWN event */
enable_irq(tsi->irq_pendwn);
da9052_enable_irq(tsi->da9052, DA9052_IRQ_PENDOWN);
/* Enable Pen Detect Circuit */
return da9052_reg_update(tsi->da9052, DA9052_TSI_CONT_A_REG,
@ -210,11 +208,11 @@ static void da9052_ts_input_close(struct input_dev *input_dev)
tsi->stopped = true;
mb();
disable_irq(tsi->irq_pendwn);
da9052_disable_irq(tsi->da9052, DA9052_IRQ_PENDOWN);
cancel_delayed_work_sync(&tsi->ts_pen_work);
if (tsi->adc_on) {
disable_irq(tsi->irq_datardy);
da9052_disable_irq(tsi->da9052, DA9052_IRQ_TSIREADY);
da9052_ts_adc_toggle(tsi, false);
/*
@ -222,7 +220,7 @@ static void da9052_ts_input_close(struct input_dev *input_dev)
* twice and we need to enable it to keep enable/disable
* counter balanced. IRQ is still off though.
*/
enable_irq(tsi->irq_pendwn);
da9052_enable_irq(tsi->da9052, DA9052_IRQ_PENDOWN);
}
/* Disable Pen Detect Circuit */
@ -234,21 +232,12 @@ static int __devinit da9052_ts_probe(struct platform_device *pdev)
struct da9052 *da9052;
struct da9052_tsi *tsi;
struct input_dev *input_dev;
int irq_pendwn;
int irq_datardy;
int error;
da9052 = dev_get_drvdata(pdev->dev.parent);
if (!da9052)
return -EINVAL;
irq_pendwn = platform_get_irq_byname(pdev, "PENDWN");
irq_datardy = platform_get_irq_byname(pdev, "TSIRDY");
if (irq_pendwn < 0 || irq_datardy < 0) {
dev_err(da9052->dev, "Unable to determine device interrupts\n");
return -ENXIO;
}
tsi = kzalloc(sizeof(struct da9052_tsi), GFP_KERNEL);
input_dev = input_allocate_device();
if (!tsi || !input_dev) {
@ -258,8 +247,6 @@ static int __devinit da9052_ts_probe(struct platform_device *pdev)
tsi->da9052 = da9052;
tsi->dev = input_dev;
tsi->irq_pendwn = da9052->irq_base + irq_pendwn;
tsi->irq_datardy = da9052->irq_base + irq_datardy;
tsi->stopped = true;
INIT_DELAYED_WORK(&tsi->ts_pen_work, da9052_ts_pen_work);
@ -287,31 +274,25 @@ static int __devinit da9052_ts_probe(struct platform_device *pdev)
/* Disable ADC */
da9052_ts_adc_toggle(tsi, false);
error = request_threaded_irq(tsi->irq_pendwn,
NULL, da9052_ts_pendwn_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
"PENDWN", tsi);
error = da9052_request_irq(tsi->da9052, DA9052_IRQ_PENDOWN,
"pendown-irq", da9052_ts_pendwn_irq, tsi);
if (error) {
dev_err(tsi->da9052->dev,
"Failed to register PENDWN IRQ %d, error = %d\n",
tsi->irq_pendwn, error);
"Failed to register PENDWN IRQ: %d\n", error);
goto err_free_mem;
}
error = request_threaded_irq(tsi->irq_datardy,
NULL, da9052_ts_datardy_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
"TSIRDY", tsi);
error = da9052_request_irq(tsi->da9052, DA9052_IRQ_TSIREADY,
"tsiready-irq", da9052_ts_datardy_irq, tsi);
if (error) {
dev_err(tsi->da9052->dev,
"Failed to register TSIRDY IRQ %d, error = %d\n",
tsi->irq_datardy, error);
"Failed to register TSIRDY IRQ :%d\n", error);
goto err_free_pendwn_irq;
}
/* Mask PEN_DOWN and TSI_READY events */
disable_irq(tsi->irq_pendwn);
disable_irq(tsi->irq_datardy);
da9052_disable_irq(tsi->da9052, DA9052_IRQ_PENDOWN);
da9052_disable_irq(tsi->da9052, DA9052_IRQ_TSIREADY);
error = da9052_configure_tsi(tsi);
if (error)
@ -326,9 +307,9 @@ static int __devinit da9052_ts_probe(struct platform_device *pdev)
return 0;
err_free_datardy_irq:
free_irq(tsi->irq_datardy, tsi);
da9052_free_irq(tsi->da9052, DA9052_IRQ_TSIREADY, tsi);
err_free_pendwn_irq:
free_irq(tsi->irq_pendwn, tsi);
da9052_free_irq(tsi->da9052, DA9052_IRQ_PENDOWN, tsi);
err_free_mem:
kfree(tsi);
input_free_device(input_dev);
@ -342,8 +323,8 @@ static int __devexit da9052_ts_remove(struct platform_device *pdev)
da9052_reg_write(tsi->da9052, DA9052_LDO9_REG, 0x19);
free_irq(tsi->irq_pendwn, tsi);
free_irq(tsi->irq_datardy, tsi);
da9052_free_irq(tsi->da9052, DA9052_IRQ_TSIREADY, tsi);
da9052_free_irq(tsi->da9052, DA9052_IRQ_PENDOWN, tsi);
input_unregister_device(tsi->dev);
kfree(tsi);

398
drivers/input/touchscreen/ti_am335x_tsc.c Normal file
View File

@ -0,0 +1,398 @@
/*
* TI Touch Screen driver
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/input.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/input/ti_am335x_tsc.h>
#include <linux/delay.h>
#include <linux/mfd/ti_am335x_tscadc.h>
#define ADCFSM_STEPID 0x10
#define SEQ_SETTLE 275
#define MAX_12BIT ((1 << 12) - 1)
struct titsc {
struct input_dev *input;
struct ti_tscadc_dev *mfd_tscadc;
unsigned int irq;
unsigned int wires;
unsigned int x_plate_resistance;
bool pen_down;
int steps_to_configure;
};
static unsigned int titsc_readl(struct titsc *ts, unsigned int reg)
{
return readl(ts->mfd_tscadc->tscadc_base + reg);
}
static void titsc_writel(struct titsc *tsc, unsigned int reg,
unsigned int val)
{
writel(val, tsc->mfd_tscadc->tscadc_base + reg);
}
static void titsc_step_config(struct titsc *ts_dev)
{
unsigned int config;
int i, total_steps;
/* Configure the Step registers */
total_steps = 2 * ts_dev->steps_to_configure;
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_AVG_16 | STEPCONFIG_XPP;
switch (ts_dev->wires) {
case 4:
config |= STEPCONFIG_INP_AN2 | STEPCONFIG_XNN;
break;
case 5:
config |= STEPCONFIG_YNN |
STEPCONFIG_INP_AN4 | STEPCONFIG_XNN |
STEPCONFIG_YPP;
break;
case 8:
config |= STEPCONFIG_INP_AN2 | STEPCONFIG_XNN;
break;
}
for (i = 1; i <= ts_dev->steps_to_configure; i++) {
titsc_writel(ts_dev, REG_STEPCONFIG(i), config);
titsc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
}
config = 0;
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_AVG_16 | STEPCONFIG_YNN |
STEPCONFIG_INM_ADCREFM | STEPCONFIG_FIFO1;
switch (ts_dev->wires) {
case 4:
config |= STEPCONFIG_YPP;
break;
case 5:
config |= STEPCONFIG_XPP | STEPCONFIG_INP_AN4 |
STEPCONFIG_XNP | STEPCONFIG_YPN;
break;
case 8:
config |= STEPCONFIG_YPP;
break;
}
for (i = (ts_dev->steps_to_configure + 1); i <= total_steps; i++) {
titsc_writel(ts_dev, REG_STEPCONFIG(i), config);
titsc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
}
config = 0;
/* Charge step configuration */
config = STEPCONFIG_XPP | STEPCONFIG_YNN |
STEPCHARGE_RFP_XPUL | STEPCHARGE_RFM_XNUR |
STEPCHARGE_INM_AN1 | STEPCHARGE_INP_AN1;
titsc_writel(ts_dev, REG_CHARGECONFIG, config);
titsc_writel(ts_dev, REG_CHARGEDELAY, CHARGEDLY_OPENDLY);
config = 0;
/* Configure to calculate pressure */
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_AVG_16 | STEPCONFIG_YPP |
STEPCONFIG_XNN | STEPCONFIG_INM_ADCREFM;
titsc_writel(ts_dev, REG_STEPCONFIG(total_steps + 1), config);
titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 1),
STEPCONFIG_OPENDLY);
config |= STEPCONFIG_INP_AN3 | STEPCONFIG_FIFO1;
titsc_writel(ts_dev, REG_STEPCONFIG(total_steps + 2), config);
titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 2),
STEPCONFIG_OPENDLY);
titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC);
}
static void titsc_read_coordinates(struct titsc *ts_dev,
unsigned int *x, unsigned int *y)
{
unsigned int fifocount = titsc_readl(ts_dev, REG_FIFO0CNT);
unsigned int prev_val_x = ~0, prev_val_y = ~0;
unsigned int prev_diff_x = ~0, prev_diff_y = ~0;
unsigned int read, diff;
unsigned int i, channel;
/*
* Delta filter is used to remove large variations in sampled
* values from ADC. The filter tries to predict where the next
* coordinate could be. This is done by taking a previous
* coordinate and subtracting it form current one. Further the
* algorithm compares the difference with that of a present value,
* if true the value is reported to the sub system.
*/
for (i = 0; i < fifocount - 1; i++) {
read = titsc_readl(ts_dev, REG_FIFO0);
channel = read & 0xf0000;
channel = channel >> 0x10;
if ((channel >= 0) && (channel < ts_dev->steps_to_configure)) {
read &= 0xfff;
diff = abs(read - prev_val_x);
if (diff < prev_diff_x) {
prev_diff_x = diff;
*x = read;
}
prev_val_x = read;
}
read = titsc_readl(ts_dev, REG_FIFO1);
channel = read & 0xf0000;
channel = channel >> 0x10;
if ((channel >= ts_dev->steps_to_configure) &&
(channel < (2 * ts_dev->steps_to_configure - 1))) {
read &= 0xfff;
diff = abs(read - prev_val_y);
if (diff < prev_diff_y) {
prev_diff_y = diff;
*y = read;
}
prev_val_y = read;
}
}
}
static irqreturn_t titsc_irq(int irq, void *dev)
{
struct titsc *ts_dev = dev;
struct input_dev *input_dev = ts_dev->input;
unsigned int status, irqclr = 0;
unsigned int x = 0, y = 0;
unsigned int z1, z2, z;
unsigned int fsm;
unsigned int fifo1count, fifo0count;
int i;
status = titsc_readl(ts_dev, REG_IRQSTATUS);
if (status & IRQENB_FIFO0THRES) {
titsc_read_coordinates(ts_dev, &x, &y);
z1 = titsc_readl(ts_dev, REG_FIFO0) & 0xfff;
z2 = titsc_readl(ts_dev, REG_FIFO1) & 0xfff;
fifo1count = titsc_readl(ts_dev, REG_FIFO1CNT);
for (i = 0; i < fifo1count; i++)
titsc_readl(ts_dev, REG_FIFO1);
fifo0count = titsc_readl(ts_dev, REG_FIFO0CNT);
for (i = 0; i < fifo0count; i++)
titsc_readl(ts_dev, REG_FIFO0);
if (ts_dev->pen_down && z1 != 0 && z2 != 0) {
/*
* Calculate pressure using formula
* Resistance(touch) = x plate resistance *
* x postion/4096 * ((z2 / z1) - 1)
*/
z = z2 - z1;
z *= x;
z *= ts_dev->x_plate_resistance;
z /= z1;
z = (z + 2047) >> 12;
if (z <= MAX_12BIT) {
input_report_abs(input_dev, ABS_X, x);
input_report_abs(input_dev, ABS_Y, y);
input_report_abs(input_dev, ABS_PRESSURE, z);
input_report_key(input_dev, BTN_TOUCH, 1);
input_sync(input_dev);
}
}
irqclr |= IRQENB_FIFO0THRES;
}
/*
* Time for sequencer to settle, to read
* correct state of the sequencer.
*/
udelay(SEQ_SETTLE);
status = titsc_readl(ts_dev, REG_RAWIRQSTATUS);
if (status & IRQENB_PENUP) {
/* Pen up event */
fsm = titsc_readl(ts_dev, REG_ADCFSM);
if (fsm == ADCFSM_STEPID) {
ts_dev->pen_down = false;
input_report_key(input_dev, BTN_TOUCH, 0);
input_report_abs(input_dev, ABS_PRESSURE, 0);
input_sync(input_dev);
} else {
ts_dev->pen_down = true;
}
irqclr |= IRQENB_PENUP;
}
titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC);
return IRQ_HANDLED;
}
/*
* The functions for inserting/removing driver as a module.
*/
static int __devinit titsc_probe(struct platform_device *pdev)
{
struct titsc *ts_dev;
struct input_dev *input_dev;
struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
struct mfd_tscadc_board *pdata;
int err;
pdata = tscadc_dev->dev->platform_data;
if (!pdata) {
dev_err(&pdev->dev, "Could not find platform data\n");
return -EINVAL;
}
/* Allocate memory for device */
ts_dev = kzalloc(sizeof(struct titsc), GFP_KERNEL);
input_dev = input_allocate_device();
if (!ts_dev || !input_dev) {
dev_err(&pdev->dev, "failed to allocate memory.\n");
err = -ENOMEM;
goto err_free_mem;
}
tscadc_dev->tsc = ts_dev;
ts_dev->mfd_tscadc = tscadc_dev;
ts_dev->input = input_dev;
ts_dev->irq = tscadc_dev->irq;
ts_dev->wires = pdata->tsc_init->wires;
ts_dev->x_plate_resistance = pdata->tsc_init->x_plate_resistance;
ts_dev->steps_to_configure = pdata->tsc_init->steps_to_configure;
err = request_irq(ts_dev->irq, titsc_irq,
0, pdev->dev.driver->name, ts_dev);
if (err) {
dev_err(&pdev->dev, "failed to allocate irq.\n");
goto err_free_mem;
}
titsc_writel(ts_dev, REG_IRQENABLE, IRQENB_FIFO0THRES);
titsc_step_config(ts_dev);
titsc_writel(ts_dev, REG_FIFO0THR, ts_dev->steps_to_configure);
input_dev->name = "ti-tsc";
input_dev->dev.parent = &pdev->dev;
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0);
input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0);
input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0);
/* register to the input system */
err = input_register_device(input_dev);
if (err)
goto err_free_irq;
platform_set_drvdata(pdev, ts_dev);
return 0;
err_free_irq:
free_irq(ts_dev->irq, ts_dev);
err_free_mem:
input_free_device(input_dev);
kfree(ts_dev);
return err;
}
static int __devexit titsc_remove(struct platform_device *pdev)
{
struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
struct titsc *ts_dev = tscadc_dev->tsc;
free_irq(ts_dev->irq, ts_dev);
input_unregister_device(ts_dev->input);
platform_set_drvdata(pdev, NULL);
kfree(ts_dev);
return 0;
}
#ifdef CONFIG_PM
static int titsc_suspend(struct device *dev)
{
struct ti_tscadc_dev *tscadc_dev = dev->platform_data;
struct titsc *ts_dev = tscadc_dev->tsc;
unsigned int idle;
if (device_may_wakeup(tscadc_dev->dev)) {
idle = titsc_readl(ts_dev, REG_IRQENABLE);
titsc_writel(ts_dev, REG_IRQENABLE,
(idle | IRQENB_HW_PEN));
titsc_writel(ts_dev, REG_IRQWAKEUP, IRQWKUP_ENB);
}
return 0;
}
static int titsc_resume(struct device *dev)
{
struct ti_tscadc_dev *tscadc_dev = dev->platform_data;
struct titsc *ts_dev = tscadc_dev->tsc;
if (device_may_wakeup(tscadc_dev->dev)) {
titsc_writel(ts_dev, REG_IRQWAKEUP,
0x00);
titsc_writel(ts_dev, REG_IRQCLR, IRQENB_HW_PEN);
}
titsc_step_config(ts_dev);
titsc_writel(ts_dev, REG_FIFO0THR,
ts_dev->steps_to_configure);
return 0;
}
static const struct dev_pm_ops titsc_pm_ops = {
.suspend = titsc_suspend,
.resume = titsc_resume,
};
#define TITSC_PM_OPS (&titsc_pm_ops)
#else
#define TITSC_PM_OPS NULL
#endif
static struct platform_driver ti_tsc_driver = {
.probe = titsc_probe,
.remove = __devexit_p(titsc_remove),
.driver = {
.name = "tsc",
.owner = THIS_MODULE,
.pm = TITSC_PM_OPS,
},
};
module_platform_driver(ti_tsc_driver);
MODULE_DESCRIPTION("TI touchscreen controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");

486
drivers/input/touchscreen/ti_tscadc.c
View File

@ -1,486 +0,0 @@
/*
* TI Touch Screen driver
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/input.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/input/ti_tscadc.h>
#include <linux/delay.h>
#define REG_IRQEOI 0x020
#define REG_RAWIRQSTATUS 0x024
#define REG_IRQSTATUS 0x028
#define REG_IRQENABLE 0x02C
#define REG_IRQWAKEUP 0x034
#define REG_CTRL 0x040
#define REG_ADCFSM 0x044
#define REG_CLKDIV 0x04C
#define REG_SE 0x054
#define REG_IDLECONFIG 0x058
#define REG_CHARGECONFIG 0x05C
#define REG_CHARGEDELAY 0x060
#define REG_STEPCONFIG(n) (0x64 + ((n - 1) * 8))
#define REG_STEPDELAY(n) (0x68 + ((n - 1) * 8))
#define REG_STEPCONFIG13 0x0C4
#define REG_STEPDELAY13 0x0C8
#define REG_STEPCONFIG14 0x0CC
#define REG_STEPDELAY14 0x0D0
#define REG_FIFO0CNT 0xE4
#define REG_FIFO1THR 0xF4
#define REG_FIFO0 0x100
#define REG_FIFO1 0x200
/* Register Bitfields */
#define IRQWKUP_ENB BIT(0)
#define STPENB_STEPENB 0x7FFF
#define IRQENB_FIFO1THRES BIT(5)
#define IRQENB_PENUP BIT(9)
#define STEPCONFIG_MODE_HWSYNC 0x2
#define STEPCONFIG_SAMPLES_AVG (1 << 4)
#define STEPCONFIG_XPP (1 << 5)
#define STEPCONFIG_XNN (1 << 6)
#define STEPCONFIG_YPP (1 << 7)
#define STEPCONFIG_YNN (1 << 8)
#define STEPCONFIG_XNP (1 << 9)
#define STEPCONFIG_YPN (1 << 10)
#define STEPCONFIG_INM (1 << 18)
#define STEPCONFIG_INP (1 << 20)
#define STEPCONFIG_INP_5 (1 << 21)
#define STEPCONFIG_FIFO1 (1 << 26)
#define STEPCONFIG_OPENDLY 0xff
#define STEPCONFIG_Z1 (3 << 19)
#define STEPIDLE_INP (1 << 22)
#define STEPCHARGE_RFP (1 << 12)
#define STEPCHARGE_INM (1 << 15)
#define STEPCHARGE_INP (1 << 19)
#define STEPCHARGE_RFM (1 << 23)
#define STEPCHARGE_DELAY 0x1
#define CNTRLREG_TSCSSENB (1 << 0)
#define CNTRLREG_STEPID (1 << 1)
#define CNTRLREG_STEPCONFIGWRT (1 << 2)
#define CNTRLREG_4WIRE (1 << 5)
#define CNTRLREG_5WIRE (1 << 6)
#define CNTRLREG_8WIRE (3 << 5)
#define CNTRLREG_TSCENB (1 << 7)
#define ADCFSM_STEPID 0x10
#define SEQ_SETTLE 275
#define ADC_CLK 3000000
#define MAX_12BIT ((1 << 12) - 1)
#define TSCADC_DELTA_X 15
#define TSCADC_DELTA_Y 15
struct tscadc {
struct input_dev *input;
struct clk *tsc_ick;
void __iomem *tsc_base;
unsigned int irq;
unsigned int wires;
unsigned int x_plate_resistance;
bool pen_down;
};
static unsigned int tscadc_readl(struct tscadc *ts, unsigned int reg)
{
return readl(ts->tsc_base + reg);
}
static void tscadc_writel(struct tscadc *tsc, unsigned int reg,
unsigned int val)
{
writel(val, tsc->tsc_base + reg);
}
static void tscadc_step_config(struct tscadc *ts_dev)
{
unsigned int config;
int i;
/* Configure the Step registers */
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_SAMPLES_AVG | STEPCONFIG_XPP;
switch (ts_dev->wires) {
case 4:
config |= STEPCONFIG_INP | STEPCONFIG_XNN;
break;
case 5:
config |= STEPCONFIG_YNN |
STEPCONFIG_INP_5 | STEPCONFIG_XNN |
STEPCONFIG_YPP;
break;
case 8:
config |= STEPCONFIG_INP | STEPCONFIG_XNN;
break;
}
for (i = 1; i < 7; i++) {
tscadc_writel(ts_dev, REG_STEPCONFIG(i), config);
tscadc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
}
config = 0;
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_SAMPLES_AVG | STEPCONFIG_YNN |
STEPCONFIG_INM | STEPCONFIG_FIFO1;
switch (ts_dev->wires) {
case 4:
config |= STEPCONFIG_YPP;
break;
case 5:
config |= STEPCONFIG_XPP | STEPCONFIG_INP_5 |
STEPCONFIG_XNP | STEPCONFIG_YPN;
break;
case 8:
config |= STEPCONFIG_YPP;
break;
}
for (i = 7; i < 13; i++) {
tscadc_writel(ts_dev, REG_STEPCONFIG(i), config);
tscadc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
}
config = 0;
/* Charge step configuration */
config = STEPCONFIG_XPP | STEPCONFIG_YNN |
STEPCHARGE_RFP | STEPCHARGE_RFM |
STEPCHARGE_INM | STEPCHARGE_INP;
tscadc_writel(ts_dev, REG_CHARGECONFIG, config);
tscadc_writel(ts_dev, REG_CHARGEDELAY, STEPCHARGE_DELAY);
config = 0;
/* Configure to calculate pressure */
config = STEPCONFIG_MODE_HWSYNC |
STEPCONFIG_SAMPLES_AVG | STEPCONFIG_YPP |
STEPCONFIG_XNN | STEPCONFIG_INM;
tscadc_writel(ts_dev, REG_STEPCONFIG13, config);
tscadc_writel(ts_dev, REG_STEPDELAY13, STEPCONFIG_OPENDLY);
config |= STEPCONFIG_Z1 | STEPCONFIG_FIFO1;
tscadc_writel(ts_dev, REG_STEPCONFIG14, config);
tscadc_writel(ts_dev, REG_STEPDELAY14, STEPCONFIG_OPENDLY);
tscadc_writel(ts_dev, REG_SE, STPENB_STEPENB);
}
static void tscadc_idle_config(struct tscadc *ts_config)
{
unsigned int idleconfig;
idleconfig = STEPCONFIG_YNN |
STEPCONFIG_INM |
STEPCONFIG_YPN | STEPIDLE_INP;
tscadc_writel(ts_config, REG_IDLECONFIG, idleconfig);
}
static void tscadc_read_coordinates(struct tscadc *ts_dev,
unsigned int *x, unsigned int *y)
{
unsigned int fifocount = tscadc_readl(ts_dev, REG_FIFO0CNT);
unsigned int prev_val_x = ~0, prev_val_y = ~0;
unsigned int prev_diff_x = ~0, prev_diff_y = ~0;
unsigned int read, diff;
unsigned int i;
/*
* Delta filter is used to remove large variations in sampled
* values from ADC. The filter tries to predict where the next
* coordinate could be. This is done by taking a previous
* coordinate and subtracting it form current one. Further the
* algorithm compares the difference with that of a present value,
* if true the value is reported to the sub system.
*/
for (i = 0; i < fifocount - 1; i++) {
read = tscadc_readl(ts_dev, REG_FIFO0) & 0xfff;
diff = abs(read - prev_val_x);
if (diff < prev_diff_x) {
prev_diff_x = diff;
*x = read;
}
prev_val_x = read;
read = tscadc_readl(ts_dev, REG_FIFO1) & 0xfff;
diff = abs(read - prev_val_y);
if (diff < prev_diff_y) {
prev_diff_y = diff;
*y = read;
}
prev_val_y = read;
}
}
static irqreturn_t tscadc_irq(int irq, void *dev)
{
struct tscadc *ts_dev = dev;
struct input_dev *input_dev = ts_dev->input;
unsigned int status, irqclr = 0;
unsigned int x = 0, y = 0;
unsigned int z1, z2, z;
unsigned int fsm;
status = tscadc_readl(ts_dev, REG_IRQSTATUS);
if (status & IRQENB_FIFO1THRES) {
tscadc_read_coordinates(ts_dev, &x, &y);
z1 = tscadc_readl(ts_dev, REG_FIFO0) & 0xfff;
z2 = tscadc_readl(ts_dev, REG_FIFO1) & 0xfff;
if (ts_dev->pen_down && z1 != 0 && z2 != 0) {
/*
* Calculate pressure using formula
* Resistance(touch) = x plate resistance *
* x postion/4096 * ((z2 / z1) - 1)
*/
z = z2 - z1;
z *= x;
z *= ts_dev->x_plate_resistance;
z /= z1;
z = (z + 2047) >> 12;
if (z <= MAX_12BIT) {
input_report_abs(input_dev, ABS_X, x);
input_report_abs(input_dev, ABS_Y, y);
input_report_abs(input_dev, ABS_PRESSURE, z);
input_report_key(input_dev, BTN_TOUCH, 1);
input_sync(input_dev);
}
}
irqclr |= IRQENB_FIFO1THRES;
}
/*
* Time for sequencer to settle, to read
* correct state of the sequencer.
*/
udelay(SEQ_SETTLE);
status = tscadc_readl(ts_dev, REG_RAWIRQSTATUS);
if (status & IRQENB_PENUP) {
/* Pen up event */
fsm = tscadc_readl(ts_dev, REG_ADCFSM);
if (fsm == ADCFSM_STEPID) {
ts_dev->pen_down = false;
input_report_key(input_dev, BTN_TOUCH, 0);
input_report_abs(input_dev, ABS_PRESSURE, 0);
input_sync(input_dev);
} else {
ts_dev->pen_down = true;
}
irqclr |= IRQENB_PENUP;
}
tscadc_writel(ts_dev, REG_IRQSTATUS, irqclr);
/* check pending interrupts */
tscadc_writel(ts_dev, REG_IRQEOI, 0x0);
tscadc_writel(ts_dev, REG_SE, STPENB_STEPENB);
return IRQ_HANDLED;
}
/*
* The functions for inserting/removing driver as a module.
*/
static int __devinit tscadc_probe(struct platform_device *pdev)
{
const struct tsc_data *pdata = pdev->dev.platform_data;
struct resource *res;
struct tscadc *ts_dev;
struct input_dev *input_dev;
struct clk *clk;
int err;
int clk_value, ctrl, irq;
if (!pdata) {
dev_err(&pdev->dev, "missing platform data.\n");
return -EINVAL;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "no memory resource defined.\n");
return -EINVAL;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(&pdev->dev, "no irq ID is specified.\n");
return -EINVAL;
}
/* Allocate memory for device */
ts_dev = kzalloc(sizeof(struct tscadc), GFP_KERNEL);
input_dev = input_allocate_device();
if (!ts_dev || !input_dev) {
dev_err(&pdev->dev, "failed to allocate memory.\n");
err = -ENOMEM;
goto err_free_mem;
}
ts_dev->input = input_dev;
ts_dev->irq = irq;
ts_dev->wires = pdata->wires;
ts_dev->x_plate_resistance = pdata->x_plate_resistance;
res = request_mem_region(res->start, resource_size(res), pdev->name);
if (!res) {
dev_err(&pdev->dev, "failed to reserve registers.\n");
err = -EBUSY;
goto err_free_mem;
}
ts_dev->tsc_base = ioremap(res->start, resource_size(res));
if (!ts_dev->tsc_base) {
dev_err(&pdev->dev, "failed to map registers.\n");
err = -ENOMEM;
goto err_release_mem_region;
}
err = request_irq(ts_dev->irq, tscadc_irq,
0, pdev->dev.driver->name, ts_dev);
if (err) {
dev_err(&pdev->dev, "failed to allocate irq.\n");
goto err_unmap_regs;
}
ts_dev->tsc_ick = clk_get(&pdev->dev, "adc_tsc_ick");
if (IS_ERR(ts_dev->tsc_ick)) {
dev_err(&pdev->dev, "failed to get TSC ick\n");
goto err_free_irq;
}
clk_enable(ts_dev->tsc_ick);
clk = clk_get(&pdev->dev, "adc_tsc_fck");
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "failed to get TSC fck\n");
err = PTR_ERR(clk);
goto err_disable_clk;
}
clk_value = clk_get_rate(clk) / ADC_CLK;
clk_put(clk);
if (clk_value < 7) {
dev_err(&pdev->dev, "clock input less than min clock requirement\n");
goto err_disable_clk;
}
/* CLKDIV needs to be configured to the value minus 1 */
tscadc_writel(ts_dev, REG_CLKDIV, clk_value - 1);
/* Enable wake-up of the SoC using touchscreen */
tscadc_writel(ts_dev, REG_IRQWAKEUP, IRQWKUP_ENB);
ctrl = CNTRLREG_STEPCONFIGWRT |
CNTRLREG_TSCENB |
CNTRLREG_STEPID;
switch (ts_dev->wires) {
case 4:
ctrl |= CNTRLREG_4WIRE;
break;
case 5:
ctrl |= CNTRLREG_5WIRE;
break;
case 8:
ctrl |= CNTRLREG_8WIRE;
break;
}
tscadc_writel(ts_dev, REG_CTRL, ctrl);
tscadc_idle_config(ts_dev);
tscadc_writel(ts_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
tscadc_step_config(ts_dev);
tscadc_writel(ts_dev, REG_FIFO1THR, 6);
ctrl |= CNTRLREG_TSCSSENB;
tscadc_writel(ts_dev, REG_CTRL, ctrl);
input_dev->name = "ti-tsc-adc";
input_dev->dev.parent = &pdev->dev;
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0);
input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0);
input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0);
/* register to the input system */
err = input_register_device(input_dev);
if (err)
goto err_disable_clk;
platform_set_drvdata(pdev, ts_dev);
return 0;
err_disable_clk:
clk_disable(ts_dev->tsc_ick);
clk_put(ts_dev->tsc_ick);
err_free_irq:
free_irq(ts_dev->irq, ts_dev);
err_unmap_regs:
iounmap(ts_dev->tsc_base);
err_release_mem_region:
release_mem_region(res->start, resource_size(res));
err_free_mem:
input_free_device(input_dev);
kfree(ts_dev);
return err;
}
static int __devexit tscadc_remove(struct platform_device *pdev)
{
struct tscadc *ts_dev = platform_get_drvdata(pdev);
struct resource *res;
free_irq(ts_dev->irq, ts_dev);
input_unregister_device(ts_dev->input);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
iounmap(ts_dev->tsc_base);
release_mem_region(res->start, resource_size(res));
clk_disable(ts_dev->tsc_ick);
clk_put(ts_dev->tsc_ick);
kfree(ts_dev);
platform_set_drvdata(pdev, NULL);
return 0;
}
static struct platform_driver ti_tsc_driver = {
.probe = tscadc_probe,
.remove = __devexit_p(tscadc_remove),
.driver = {
.name = "tsc",
.owner = THIS_MODULE,
},
};
module_platform_driver(ti_tsc_driver);
MODULE_DESCRIPTION("TI touchscreen controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");

63
drivers/mfd/Kconfig
View File

@ -104,6 +104,17 @@ config MFD_TI_SSP
To compile this driver as a module, choose M here: the
module will be called ti-ssp.
config MFD_TI_AM335X_TSCADC
tristate "TI ADC / Touch Screen chip support"
select MFD_CORE
select REGMAP
select REGMAP_MMIO
help
If you say yes here you get support for Texas Instruments series
of Touch Screen /ADC chips.
To compile this driver as a module, choose M here: the
module will be called ti_am335x_tscadc.
config HTC_EGPIO
bool "HTC EGPIO support"
depends on GENERIC_HARDIRQS && GPIOLIB && ARM
@ -253,6 +264,20 @@ config MFD_TPS65912_SPI
If you say yes here you get support for the TPS65912 series of
PM chips with SPI interface.
config MFD_TPS80031
bool "TI TPS80031/TPS80032 Power Management chips"
depends on I2C=y && GENERIC_HARDIRQS
select MFD_CORE
select REGMAP_I2C
select REGMAP_IRQ
help
If you say yes here you get support for the Texas Instruments
TPS80031/ TPS80032 Fully Integrated Power Management with Power
Path and Battery Charger. The device provides five configurable
step-down converters, 11 general purpose LDOs, USB OTG Module,
ADC, RTC, 2 PWM, System Voltage Regulator/Battery Charger with
Power Path from USB, 32K clock generator.
config MENELAUS
bool "Texas Instruments TWL92330/Menelaus PM chip"
depends on I2C=y && ARCH_OMAP2
@ -309,10 +334,10 @@ config MFD_TWL4030_AUDIO
config TWL6040_CORE
bool "Support for TWL6040 audio codec"
depends on I2C=y && GENERIC_HARDIRQS
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
select IRQ_DOMAIN
select REGMAP_IRQ
default n
help
Say yes here if you want support for Texas Instruments TWL6040 audio
@ -990,6 +1015,7 @@ config MFD_TPS65090
depends on I2C=y && GENERIC_HARDIRQS
select MFD_CORE
select REGMAP_I2C
select REGMAP_IRQ
help
If you say yes here you get support for the TPS65090 series of
Power Management chips.
@ -1034,6 +1060,7 @@ config MFD_STA2X11
bool "STA2X11 multi function device support"
depends on STA2X11
select MFD_CORE
select REGMAP_MMIO
config MFD_SYSCON
bool "System Controller Register R/W Based on Regmap"
@ -1053,6 +1080,38 @@ config MFD_PALMAS
If you say yes here you get support for the Palmas
series of PMIC chips from Texas Instruments.
config MFD_VIPERBOARD
tristate "Support for Nano River Technologies Viperboard"
select MFD_CORE
depends on USB
default n
help
Say yes here if you want support for Nano River Technologies
Viperboard.
There are mfd cell drivers available for i2c master, adc and
both gpios found on the board. The spi part does not yet
have a driver.
You need to select the mfd cell drivers separately.
The drivers do not support all features the board exposes.
config MFD_RETU
tristate "Support for Retu multi-function device"
select MFD_CORE
depends on I2C
select REGMAP_IRQ
help
Retu is a multi-function device found on Nokia Internet Tablets
(770, N800 and N810).
config MFD_AS3711
bool "Support for AS3711"
select MFD_CORE
select REGMAP_I2C
select REGMAP_IRQ
depends on I2C=y
help
Support for the AS3711 PMIC from AMS
endmenu
endif

10
drivers/mfd/Makefile
View File

@ -19,6 +19,7 @@ obj-$(CONFIG_HTC_I2CPLD) += htc-i2cpld.o
obj-$(CONFIG_MFD_DAVINCI_VOICECODEC) += davinci_voicecodec.o
obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o
obj-$(CONFIG_MFD_TI_SSP) += ti-ssp.o
obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o
obj-$(CONFIG_MFD_STA2X11) += sta2x11-mfd.o
obj-$(CONFIG_MFD_STMPE) += stmpe.o
@ -55,18 +56,19 @@ obj-$(CONFIG_TPS6105X) += tps6105x.o
obj-$(CONFIG_TPS65010) += tps65010.o
obj-$(CONFIG_TPS6507X) += tps6507x.o
obj-$(CONFIG_MFD_TPS65217) += tps65217.o
obj-$(CONFIG_MFD_TPS65910) += tps65910.o tps65910-irq.o
obj-$(CONFIG_MFD_TPS65910) += tps65910.o
tps65912-objs := tps65912-core.o tps65912-irq.o
obj-$(CONFIG_MFD_TPS65912) += tps65912.o
obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o
obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o
obj-$(CONFIG_MFD_TPS80031) += tps80031.o
obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o
obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o
obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o
obj-$(CONFIG_TWL6040_CORE) += twl6040-core.o twl6040-irq.o
obj-$(CONFIG_TWL6040_CORE) += twl6040.o
obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
@ -89,6 +91,7 @@ obj-$(CONFIG_UCB1400_CORE) += ucb1400_core.o
obj-$(CONFIG_PMIC_DA903X) += da903x.o
obj-$(CONFIG_PMIC_DA9052) += da9052-irq.o
obj-$(CONFIG_PMIC_DA9052) += da9052-core.o
obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
@ -137,8 +140,11 @@ obj-$(CONFIG_MFD_TPS65090) += tps65090.o
obj-$(CONFIG_MFD_AAT2870_CORE) += aat2870-core.o
obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o
obj-$(CONFIG_MFD_PALMAS) += palmas.o
obj-$(CONFIG_MFD_VIPERBOARD) += viperboard.o
obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o
obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o sec-irq.o
obj-$(CONFIG_MFD_SYSCON) += syscon.o
obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o vexpress-sysreg.o
obj-$(CONFIG_MFD_RETU) += retu-mfd.o
obj-$(CONFIG_MFD_AS3711) += as3711.o

107
drivers/mfd/ab8500-core.c
View File

@ -586,38 +586,6 @@ int ab8500_suspend(struct ab8500 *ab8500)
return 0;
}
/* AB8500 GPIO Resources */
static struct resource __devinitdata ab8500_gpio_resources[] = {
{
.name = "GPIO_INT6",
.start = AB8500_INT_GPIO6R,
.end = AB8500_INT_GPIO41F,
.flags = IORESOURCE_IRQ,
}
};
/* AB9540 GPIO Resources */
static struct resource __devinitdata ab9540_gpio_resources[] = {
{
.name = "GPIO_INT6",
.start = AB8500_INT_GPIO6R,
.end = AB8500_INT_GPIO41F,
.flags = IORESOURCE_IRQ,
},
{
.name = "GPIO_INT14",
.start = AB9540_INT_GPIO50R,
.end = AB9540_INT_GPIO54R,
.flags = IORESOURCE_IRQ,
},
{
.name = "GPIO_INT15",
.start = AB9540_INT_GPIO50F,
.end = AB9540_INT_GPIO54F,
.flags = IORESOURCE_IRQ,
}
};
static struct resource ab8500_gpadc_resources[] = {
{
.name = "HW_CONV_END",
@ -978,6 +946,10 @@ static struct mfd_cell abx500_common_devs[] = {
.name = "ab8500-regulator",
.of_compatible = "stericsson,ab8500-regulator",
},
{
.name = "abx500-clk",
.of_compatible = "stericsson,abx500-clk",
},
{
.name = "ab8500-gpadc",
.of_compatible = "stericsson,ab8500-gpadc",
@ -1080,8 +1052,6 @@ static struct mfd_cell ab8500_devs[] = {
{
.name = "ab8500-gpio",
.of_compatible = "stericsson,ab8500-gpio",
.num_resources = ARRAY_SIZE(ab8500_gpio_resources),
.resources = ab8500_gpio_resources,
},
{
.name = "ab8500-usb",
@ -1098,8 +1068,6 @@ static struct mfd_cell ab8500_devs[] = {
static struct mfd_cell ab9540_devs[] = {
{
.name = "ab8500-gpio",
.num_resources = ARRAY_SIZE(ab9540_gpio_resources),
.resources = ab9540_gpio_resources,
},
{
.name = "ab9540-usb",
@ -1284,7 +1252,7 @@ static int ab8500_probe(struct platform_device *pdev)
int i;
u8 value;
ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);
ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
if (!ab8500)
return -ENOMEM;
@ -1294,10 +1262,8 @@ static int ab8500_probe(struct platform_device *pdev)
ab8500->dev = &pdev->dev;
resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!resource) {
ret = -ENODEV;
goto out_free_ab8500;
}
if (!resource)
return -ENODEV;
ab8500->irq = resource->start;
@ -1320,7 +1286,7 @@ static int ab8500_probe(struct platform_device *pdev)
ret = get_register_interruptible(ab8500, AB8500_MISC,
AB8500_IC_NAME_REG, &value);
if (ret < 0)
goto out_free_ab8500;
return ret;
ab8500->version = value;
}
@ -1328,7 +1294,7 @@ static int ab8500_probe(struct platform_device *pdev)
ret = get_register_interruptible(ab8500, AB8500_MISC,
AB8500_REV_REG, &value);
if (ret < 0)
goto out_free_ab8500;
return ret;
ab8500->chip_id = value;
@ -1345,14 +1311,13 @@ static int ab8500_probe(struct platform_device *pdev)
ab8500->mask_size = AB8500_NUM_IRQ_REGS;
ab8500->irq_reg_offset = ab8500_irq_regoffset;
}
ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL);
ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
if (!ab8500->mask)
return -ENOMEM;
ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL);
if (!ab8500->oldmask) {
ret = -ENOMEM;
goto out_freemask;
}
ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
if (!ab8500->oldmask)
return -ENOMEM;
/*
* ab8500 has switched off due to (SWITCH_OFF_STATUS):
* 0x01 Swoff bit programming
@ -1406,37 +1371,37 @@ static int ab8500_probe(struct platform_device *pdev)
ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
if (ret)
goto out_freeoldmask;
return ret;
for (i = 0; i < ab8500->mask_size; i++)
ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
ret = ab8500_irq_init(ab8500, np);
if (ret)
goto out_freeoldmask;
return ret;
/* Activate this feature only in ab9540 */
/* till tests are done on ab8500 1p2 or later*/
if (is_ab9540(ab8500)) {
ret = request_threaded_irq(ab8500->irq, NULL,
ab8500_hierarchical_irq,
IRQF_ONESHOT | IRQF_NO_SUSPEND,
"ab8500", ab8500);
ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
ab8500_hierarchical_irq,
IRQF_ONESHOT | IRQF_NO_SUSPEND,
"ab8500", ab8500);
}
else {
ret = request_threaded_irq(ab8500->irq, NULL,
ab8500_irq,
IRQF_ONESHOT | IRQF_NO_SUSPEND,
"ab8500", ab8500);
ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
ab8500_irq,
IRQF_ONESHOT | IRQF_NO_SUSPEND,
"ab8500", ab8500);
if (ret)
goto out_freeoldmask;
return ret;
}
ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
ARRAY_SIZE(abx500_common_devs), NULL,
ab8500->irq_base, ab8500->domain);
if (ret)
goto out_freeirq;
return ret;
if (is_ab9540(ab8500))
ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
@ -1447,14 +1412,14 @@ static int ab8500_probe(struct platform_device *pdev)
ARRAY_SIZE(ab8500_devs), NULL,
ab8500->irq_base, ab8500->domain);
if (ret)
goto out_freeirq;
return ret;
if (is_ab9540(ab8500) || is_ab8505(ab8500))
ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
ARRAY_SIZE(ab9540_ab8505_devs), NULL,
ab8500->irq_base, ab8500->domain);
if (ret)
goto out_freeirq;
return ret;
if (!no_bm) {
/* Add battery management devices */
@ -1475,17 +1440,6 @@ static int ab8500_probe(struct platform_device *pdev)
dev_err(ab8500->dev, "error creating sysfs entries\n");
return ret;
out_freeirq:
free_irq(ab8500->irq, ab8500);
out_freeoldmask:
kfree(ab8500->oldmask);
out_freemask:
kfree(ab8500->mask);
out_free_ab8500:
kfree(ab8500);
return ret;
}
static int ab8500_remove(struct platform_device *pdev)
@ -1498,11 +1452,6 @@ static int ab8500_remove(struct platform_device *pdev)
sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
mfd_remove_devices(ab8500->dev);
free_irq(ab8500->irq, ab8500);
kfree(ab8500->oldmask);
kfree(ab8500->mask);
kfree(ab8500);
return 0;
}

17
drivers/mfd/arizona-core.c
View File

@ -292,6 +292,7 @@ int arizona_dev_init(struct arizona *arizona)
struct device *dev = arizona->dev;
const char *type_name;
unsigned int reg, val;
int (*apply_patch)(struct arizona *) = NULL;
int ret, i;
dev_set_drvdata(arizona->dev, arizona);
@ -391,7 +392,7 @@ int arizona_dev_init(struct arizona *arizona)
arizona->type);
arizona->type = WM5102;
}
ret = wm5102_patch(arizona);
apply_patch = wm5102_patch;
break;
#endif
#ifdef CONFIG_MFD_WM5110
@ -402,7 +403,7 @@ int arizona_dev_init(struct arizona *arizona)
arizona->type);
arizona->type = WM5110;
}
ret = wm5110_patch(arizona);
apply_patch = wm5110_patch;
break;
#endif
default:
@ -412,9 +413,6 @@ int arizona_dev_init(struct arizona *arizona)
dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
if (ret != 0)
dev_err(arizona->dev, "Failed to apply patch: %d\n", ret);
/* If we have a /RESET GPIO we'll already be reset */
if (!arizona->pdata.reset) {
regcache_mark_dirty(arizona->regmap);
@ -438,6 +436,15 @@ int arizona_dev_init(struct arizona *arizona)
goto err_reset;
}
if (apply_patch) {
ret = apply_patch(arizona);
if (ret != 0) {
dev_err(arizona->dev, "Failed to apply patch: %d\n",
ret);
goto err_reset;
}
}
for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
if (!arizona->pdata.gpio_defaults[i])
continue;

1
drivers/mfd/arizona-irq.c
View File

@ -224,6 +224,7 @@ int arizona_irq_init(struct arizona *arizona)
arizona->virq = irq_domain_add_linear(NULL, 2, &arizona_domain_ops,
arizona);
if (!arizona->virq) {
dev_err(arizona->dev, "Failed to add core IRQ domain\n");
ret = -EINVAL;
goto err;
}

217
drivers/mfd/as3711.c Normal file
View File

@ -0,0 +1,217 @@
/*
* AS3711 PMIC MFC driver
*
* Copyright (C) 2012 Renesas Electronics Corporation
* Author: Guennadi Liakhovetski, <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License as
* published by the Free Software Foundation
*/
#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mfd/as3711.h>
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
enum {
AS3711_REGULATOR,
AS3711_BACKLIGHT,
};
/*
* Ok to have it static: it is only used during probing and multiple I2C devices
* cannot be probed simultaneously. Just make sure to avoid stale data.
*/
static struct mfd_cell as3711_subdevs[] = {
[AS3711_REGULATOR] = {.name = "as3711-regulator",},
[AS3711_BACKLIGHT] = {.name = "as3711-backlight",},
};
static bool as3711_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case AS3711_GPIO_SIGNAL_IN:
case AS3711_INTERRUPT_STATUS_1:
case AS3711_INTERRUPT_STATUS_2:
case AS3711_INTERRUPT_STATUS_3:
case AS3711_CHARGER_STATUS_1:
case AS3711_CHARGER_STATUS_2:
case AS3711_REG_STATUS:
return true;
}
return false;
}
static bool as3711_precious_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case AS3711_INTERRUPT_STATUS_1:
case AS3711_INTERRUPT_STATUS_2:
case AS3711_INTERRUPT_STATUS_3:
return true;
}
return false;
}
static bool as3711_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case AS3711_SD_1_VOLTAGE:
case AS3711_SD_2_VOLTAGE:
case AS3711_SD_3_VOLTAGE:
case AS3711_SD_4_VOLTAGE:
case AS3711_LDO_1_VOLTAGE:
case AS3711_LDO_2_VOLTAGE:
case AS3711_LDO_3_VOLTAGE:
case AS3711_LDO_4_VOLTAGE:
case AS3711_LDO_5_VOLTAGE:
case AS3711_LDO_6_VOLTAGE:
case AS3711_LDO_7_VOLTAGE:
case AS3711_LDO_8_VOLTAGE:
case AS3711_SD_CONTROL:
case AS3711_GPIO_SIGNAL_OUT:
case AS3711_GPIO_SIGNAL_IN:
case AS3711_SD_CONTROL_1:
case AS3711_SD_CONTROL_2:
case AS3711_CURR_CONTROL:
case AS3711_CURR1_VALUE:
case AS3711_CURR2_VALUE:
case AS3711_CURR3_VALUE:
case AS3711_STEPUP_CONTROL_1:
case AS3711_STEPUP_CONTROL_2:
case AS3711_STEPUP_CONTROL_4:
case AS3711_STEPUP_CONTROL_5:
case AS3711_REG_STATUS:
case AS3711_INTERRUPT_STATUS_1:
case AS3711_INTERRUPT_STATUS_2:
case AS3711_INTERRUPT_STATUS_3:
case AS3711_CHARGER_STATUS_1:
case AS3711_CHARGER_STATUS_2:
case AS3711_ASIC_ID_1:
case AS3711_ASIC_ID_2:
return true;
}
return false;
}
static const struct regmap_config as3711_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.volatile_reg = as3711_volatile_reg,
.readable_reg = as3711_readable_reg,
.precious_reg = as3711_precious_reg,
.max_register = AS3711_MAX_REGS,
.num_reg_defaults_raw = AS3711_MAX_REGS,
.cache_type = REGCACHE_RBTREE,
};
static int as3711_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct as3711 *as3711;
struct as3711_platform_data *pdata = client->dev.platform_data;
unsigned int id1, id2;
int ret;
if (!pdata)
dev_dbg(&client->dev, "Platform data not found\n");
as3711 = devm_kzalloc(&client->dev, sizeof(struct as3711), GFP_KERNEL);
if (!as3711) {
dev_err(&client->dev, "Memory allocation failed\n");
return -ENOMEM;
}
as3711->dev = &client->dev;
i2c_set_clientdata(client, as3711);
if (client->irq)
dev_notice(&client->dev, "IRQ not supported yet\n");
as3711->regmap = devm_regmap_init_i2c(client, &as3711_regmap_config);
if (IS_ERR(as3711->regmap)) {
ret = PTR_ERR(as3711->regmap);
dev_err(&client->dev, "regmap initialization failed: %d\n", ret);
return ret;
}
ret = regmap_read(as3711->regmap, AS3711_ASIC_ID_1, &id1);
if (!ret)
ret = regmap_read(as3711->regmap, AS3711_ASIC_ID_2, &id2);
if (ret < 0) {
dev_err(&client->dev, "regmap_read() failed: %d\n", ret);
return ret;
}
if (id1 != 0x8b)
return -ENODEV;
dev_info(as3711->dev, "AS3711 detected: %x:%x\n", id1, id2);
/* We can reuse as3711_subdevs[], it will be copied in mfd_add_devices() */
if (pdata) {
as3711_subdevs[AS3711_REGULATOR].platform_data = &pdata->regulator;
as3711_subdevs[AS3711_REGULATOR].pdata_size = sizeof(pdata->regulator);
as3711_subdevs[AS3711_BACKLIGHT].platform_data = &pdata->backlight;
as3711_subdevs[AS3711_BACKLIGHT].pdata_size = sizeof(pdata->backlight);
} else {
as3711_subdevs[AS3711_REGULATOR].platform_data = NULL;
as3711_subdevs[AS3711_REGULATOR].pdata_size = 0;
as3711_subdevs[AS3711_BACKLIGHT].platform_data = NULL;
as3711_subdevs[AS3711_BACKLIGHT].pdata_size = 0;
}
ret = mfd_add_devices(as3711->dev, -1, as3711_subdevs,
ARRAY_SIZE(as3711_subdevs), NULL, 0, NULL);
if (ret < 0)
dev_err(&client->dev, "add mfd devices failed: %d\n", ret);
return ret;
}
static int as3711_i2c_remove(struct i2c_client *client)
{
struct as3711 *as3711 = i2c_get_clientdata(client);
mfd_remove_devices(as3711->dev);
return 0;
}
static const struct i2c_device_id as3711_i2c_id[] = {
{.name = "as3711", .driver_data = 0},
{}
};
MODULE_DEVICE_TABLE(i2c, as3711_i2c_id);
static struct i2c_driver as3711_i2c_driver = {
.driver = {
.name = "as3711",
.owner = THIS_MODULE,
},
.probe = as3711_i2c_probe,
.remove = as3711_i2c_remove,
.id_table = as3711_i2c_id,
};
static int __init as3711_i2c_init(void)
{
return i2c_add_driver(&as3711_i2c_driver);
}
/* Initialise early */
subsys_initcall(as3711_i2c_init);
static void __exit as3711_i2c_exit(void)
{
i2c_del_driver(&as3711_i2c_driver);
}
module_exit(as3711_i2c_exit);
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
MODULE_DESCRIPTION("AS3711 PMIC driver");
MODULE_LICENSE("GPL v2");

273
drivers/mfd/da9052-core.c
View File

@ -15,7 +15,6 @@
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/slab.h>
#include <linux/module.h>
@ -24,16 +23,6 @@
#include <linux/mfd/da9052/pdata.h>
#include <linux/mfd/da9052/reg.h>
#define DA9052_NUM_IRQ_REGS 4
#define DA9052_IRQ_MASK_POS_1 0x01
#define DA9052_IRQ_MASK_POS_2 0x02
#define DA9052_IRQ_MASK_POS_3 0x04
#define DA9052_IRQ_MASK_POS_4 0x08
#define DA9052_IRQ_MASK_POS_5 0x10
#define DA9052_IRQ_MASK_POS_6 0x20
#define DA9052_IRQ_MASK_POS_7 0x40
#define DA9052_IRQ_MASK_POS_8 0x80
static bool da9052_reg_readable(struct device *dev, unsigned int reg)
{
switch (reg) {
@ -425,15 +414,6 @@ err:
}
EXPORT_SYMBOL_GPL(da9052_adc_manual_read);
static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data)
{
struct da9052 *da9052 = irq_data;
complete(&da9052->done);
return IRQ_HANDLED;
}
int da9052_adc_read_temp(struct da9052 *da9052)
{
int tbat;
@ -447,74 +427,6 @@ int da9052_adc_read_temp(struct da9052 *da9052)
}
EXPORT_SYMBOL_GPL(da9052_adc_read_temp);
static struct resource da9052_rtc_resource = {
.name = "ALM",
.start = DA9052_IRQ_ALARM,
.end = DA9052_IRQ_ALARM,
.flags = IORESOURCE_IRQ,
};
static struct resource da9052_onkey_resource = {
.name = "ONKEY",
.start = DA9052_IRQ_NONKEY,
.end = DA9052_IRQ_NONKEY,
.flags = IORESOURCE_IRQ,
};
static struct resource da9052_bat_resources[] = {
{
.name = "BATT TEMP",
.start = DA9052_IRQ_TBAT,
.end = DA9052_IRQ_TBAT,
.flags = IORESOURCE_IRQ,
},
{
.name = "DCIN DET",
.start = DA9052_IRQ_DCIN,
.end = DA9052_IRQ_DCIN,
.flags = IORESOURCE_IRQ,
},
{
.name = "DCIN REM",
.start = DA9052_IRQ_DCINREM,
.end = DA9052_IRQ_DCINREM,
.flags = IORESOURCE_IRQ,
},
{
.name = "VBUS DET",
.start = DA9052_IRQ_VBUS,
.end = DA9052_IRQ_VBUS,
.flags = IORESOURCE_IRQ,
},
{
.name = "VBUS REM",
.start = DA9052_IRQ_VBUSREM,
.end = DA9052_IRQ_VBUSREM,
.flags = IORESOURCE_IRQ,
},
{
.name = "CHG END",
.start = DA9052_IRQ_CHGEND,
.end = DA9052_IRQ_CHGEND,
.flags = IORESOURCE_IRQ,
},
};
static struct resource da9052_tsi_resources[] = {
{
.name = "PENDWN",
.start = DA9052_IRQ_PENDOWN,
.end = DA9052_IRQ_PENDOWN,
.flags = IORESOURCE_IRQ,
},
{
.name = "TSIRDY",
.start = DA9052_IRQ_TSIREADY,
.end = DA9052_IRQ_TSIREADY,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell da9052_subdev_info[] = {
{
.name = "da9052-regulator",
@ -574,13 +486,9 @@ static struct mfd_cell da9052_subdev_info[] = {
},
{
.name = "da9052-onkey",
.resources = &da9052_onkey_resource,
.num_resources = 1,
},
{
.name = "da9052-rtc",
.resources = &da9052_rtc_resource,
.num_resources = 1,
},
{
.name = "da9052-gpio",
@ -602,160 +510,15 @@ static struct mfd_cell da9052_subdev_info[] = {
},
{
.name = "da9052-tsi",
.resources = da9052_tsi_resources,
.num_resources = ARRAY_SIZE(da9052_tsi_resources),
},
{
.name = "da9052-bat",
.resources = da9052_bat_resources,
.num_resources = ARRAY_SIZE(da9052_bat_resources),
},
{
.name = "da9052-watchdog",
},
};
static struct regmap_irq da9052_irqs[] = {
[DA9052_IRQ_DCIN] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_VBUS] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_DCINREM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_VBUSREM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_VDDLOW] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_ALARM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_SEQRDY] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_COMP1V2] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_NONKEY] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_IDFLOAT] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_IDGND] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_CHGEND] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_TBAT] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_ADC_EOM] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_PENDOWN] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_TSIREADY] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_GPI0] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_GPI1] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_GPI2] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_GPI3] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_GPI4] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_GPI5] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_GPI6] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_GPI7] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_GPI8] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_GPI9] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_GPI10] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_GPI11] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_GPI12] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_GPI13] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_GPI14] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_GPI15] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_8,
},
};
static struct regmap_irq_chip da9052_regmap_irq_chip = {
.name = "da9052_irq",
.status_base = DA9052_EVENT_A_REG,
.mask_base = DA9052_IRQ_MASK_A_REG,
.ack_base = DA9052_EVENT_A_REG,
.num_regs = DA9052_NUM_IRQ_REGS,
.irqs = da9052_irqs,
.num_irqs = ARRAY_SIZE(da9052_irqs),
};
struct regmap_config da9052_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@ -782,45 +545,31 @@ int da9052_device_init(struct da9052 *da9052, u8 chip_id)
da9052->chip_id = chip_id;
if (!pdata || !pdata->irq_base)
da9052->irq_base = -1;
else
da9052->irq_base = pdata->irq_base;
ret = regmap_add_irq_chip(da9052->regmap, da9052->chip_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
da9052->irq_base, &da9052_regmap_irq_chip,
&da9052->irq_data);
if (ret < 0)
goto regmap_err;
da9052->irq_base = regmap_irq_chip_get_base(da9052->irq_data);
ret = request_threaded_irq(DA9052_IRQ_ADC_EOM, NULL, da9052_auxadc_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
"adc irq", da9052);
if (ret != 0)
dev_err(da9052->dev, "DA9052 ADC IRQ failed ret=%d\n", ret);
ret = da9052_irq_init(da9052);
if (ret != 0) {
dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
return ret;
}
ret = mfd_add_devices(da9052->dev, -1, da9052_subdev_info,
ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
if (ret)
if (ret) {
dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
goto err;
}
return 0;
err:
free_irq(DA9052_IRQ_ADC_EOM, da9052);
mfd_remove_devices(da9052->dev);
regmap_err:
da9052_irq_exit(da9052);
return ret;
}
void da9052_device_exit(struct da9052 *da9052)
{
free_irq(DA9052_IRQ_ADC_EOM, da9052);
regmap_del_irq_chip(da9052->chip_irq, da9052->irq_data);
mfd_remove_devices(da9052->dev);
da9052_irq_exit(da9052);
}
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");

288
drivers/mfd/da9052-irq.c Normal file
View File

@ -0,0 +1,288 @@
/*
* DA9052 interrupt support
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
* Based on arizona-irq.c, which is:
*
* Copyright 2012 Wolfson Microelectronics plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mfd/da9052/da9052.h>
#include <linux/mfd/da9052/reg.h>
#define DA9052_NUM_IRQ_REGS 4
#define DA9052_IRQ_MASK_POS_1 0x01
#define DA9052_IRQ_MASK_POS_2 0x02
#define DA9052_IRQ_MASK_POS_3 0x04
#define DA9052_IRQ_MASK_POS_4 0x08
#define DA9052_IRQ_MASK_POS_5 0x10
#define DA9052_IRQ_MASK_POS_6 0x20
#define DA9052_IRQ_MASK_POS_7 0x40
#define DA9052_IRQ_MASK_POS_8 0x80
static struct regmap_irq da9052_irqs[] = {
[DA9052_IRQ_DCIN] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_VBUS] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_DCINREM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_VBUSREM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_VDDLOW] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_ALARM] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_SEQRDY] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_COMP1V2] = {
.reg_offset = 0,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_NONKEY] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_IDFLOAT] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_IDGND] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_CHGEND] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_TBAT] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_ADC_EOM] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_PENDOWN] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_TSIREADY] = {
.reg_offset = 1,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_GPI0] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_GPI1] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_GPI2] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_GPI3] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_GPI4] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_GPI5] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_GPI6] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_GPI7] = {
.reg_offset = 2,
.mask = DA9052_IRQ_MASK_POS_8,
},
[DA9052_IRQ_GPI8] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_1,
},
[DA9052_IRQ_GPI9] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_2,
},
[DA9052_IRQ_GPI10] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_3,
},
[DA9052_IRQ_GPI11] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_4,
},
[DA9052_IRQ_GPI12] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_5,
},
[DA9052_IRQ_GPI13] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_6,
},
[DA9052_IRQ_GPI14] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_7,
},
[DA9052_IRQ_GPI15] = {
.reg_offset = 3,
.mask = DA9052_IRQ_MASK_POS_8,
},
};
static struct regmap_irq_chip da9052_regmap_irq_chip = {
.name = "da9052_irq",
.status_base = DA9052_EVENT_A_REG,
.mask_base = DA9052_IRQ_MASK_A_REG,
.ack_base = DA9052_EVENT_A_REG,
.num_regs = DA9052_NUM_IRQ_REGS,
.irqs = da9052_irqs,
.num_irqs = ARRAY_SIZE(da9052_irqs),
};
static int da9052_map_irq(struct da9052 *da9052, int irq)
{
return regmap_irq_get_virq(da9052->irq_data, irq);
}
int da9052_enable_irq(struct da9052 *da9052, int irq)
{
irq = da9052_map_irq(da9052, irq);
if (irq < 0)
return irq;
enable_irq(irq);
return 0;
}
EXPORT_SYMBOL_GPL(da9052_enable_irq);
int da9052_disable_irq(struct da9052 *da9052, int irq)
{
irq = da9052_map_irq(da9052, irq);
if (irq < 0)
return irq;
disable_irq(irq);
return 0;
}
EXPORT_SYMBOL_GPL(da9052_disable_irq);
int da9052_disable_irq_nosync(struct da9052 *da9052, int irq)
{
irq = da9052_map_irq(da9052, irq);
if (irq < 0)
return irq;
disable_irq_nosync(irq);
return 0;
}
EXPORT_SYMBOL_GPL(da9052_disable_irq_nosync);
int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
irq_handler_t handler, void *data)
{
irq = da9052_map_irq(da9052, irq);
if (irq < 0)
return irq;
return request_threaded_irq(irq, NULL, handler,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
name, data);
}
EXPORT_SYMBOL_GPL(da9052_request_irq);
void da9052_free_irq(struct da9052 *da9052, int irq, void *data)
{
irq = da9052_map_irq(da9052, irq);
if (irq < 0)
return;
free_irq(irq, data);
}
EXPORT_SYMBOL_GPL(da9052_free_irq);
static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data)
{
struct da9052 *da9052 = irq_data;
complete(&da9052->done);
return IRQ_HANDLED;
}
int da9052_irq_init(struct da9052 *da9052)
{
int ret;
ret = regmap_add_irq_chip(da9052->regmap, da9052->chip_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
-1, &da9052_regmap_irq_chip,
&da9052->irq_data);
if (ret < 0) {
dev_err(da9052->dev, "regmap_add_irq_chip failed: %d\n", ret);
goto regmap_err;
}
ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq",
da9052_auxadc_irq, da9052);
if (ret != 0) {
dev_err(da9052->dev, "DA9052_IRQ_ADC_EOM failed: %d\n", ret);
goto request_irq_err;
}
return 0;
request_irq_err:
regmap_del_irq_chip(da9052->chip_irq, da9052->irq_data);
regmap_err:
return ret;
}
int da9052_irq_exit(struct da9052 *da9052)
{
da9052_free_irq(da9052, DA9052_IRQ_ADC_EOM , da9052);
regmap_del_irq_chip(da9052->chip_irq, da9052->irq_data);
return 0;
}

8
drivers/mfd/db8500-prcmu.c
View File

@ -2763,7 +2763,7 @@ static int db8500_irq_init(struct device_node *np)
void __init db8500_prcmu_early_init(void)
{
if (cpu_is_u8500v2()) {
if (cpu_is_u8500v2() || cpu_is_u9540()) {
void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K);
if (tcpm_base != NULL) {
@ -2781,7 +2781,11 @@ void __init db8500_prcmu_early_init(void)
iounmap(tcpm_base);
}
tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE);
if (cpu_is_u9540())
tcdm_base = ioremap_nocache(U8500_PRCMU_TCDM_BASE,
SZ_4K + SZ_8K) + SZ_8K;
else
tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE);
} else {
pr_err("prcmu: Unsupported chip version\n");
BUG();

20
drivers/mfd/jz4740-adc.c
View File

@ -211,7 +211,7 @@ static int jz4740_adc_probe(struct platform_device *pdev)
int ret;
int irq_base;
adc = kmalloc(sizeof(*adc), GFP_KERNEL);
adc = devm_kzalloc(&pdev->dev, sizeof(*adc), GFP_KERNEL);
if (!adc) {
dev_err(&pdev->dev, "Failed to allocate driver structure\n");
return -ENOMEM;
@ -221,30 +221,27 @@ static int jz4740_adc_probe(struct platform_device *pdev)
if (adc->irq < 0) {
ret = adc->irq;
dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
goto err_free;
return ret;
}
irq_base = platform_get_irq(pdev, 1);
if (irq_base < 0) {
ret = irq_base;
dev_err(&pdev->dev, "Failed to get irq base: %d\n", ret);
goto err_free;
dev_err(&pdev->dev, "Failed to get irq base: %d\n", irq_base);
return irq_base;
}
mem_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem_base) {
ret = -ENOENT;
dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
goto err_free;
return -ENOENT;
}
/* Only request the shared registers for the MFD driver */
adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS,
pdev->name);
if (!adc->mem) {
ret = -EBUSY;
dev_err(&pdev->dev, "Failed to request mmio memory region\n");
goto err_free;
return -EBUSY;
}
adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem));
@ -301,9 +298,6 @@ err_iounmap:
iounmap(adc->base);
err_release_mem_region:
release_mem_region(adc->mem->start, resource_size(adc->mem));
err_free:
kfree(adc);
return ret;
}
@ -325,8 +319,6 @@ static int jz4740_adc_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
kfree(adc);
return 0;
}

16
drivers/mfd/lpc_ich.c
View File

@ -734,7 +734,7 @@ static int lpc_ich_init_gpio(struct pci_dev *dev,
pci_read_config_dword(dev, ACPIBASE, &base_addr_cfg);
base_addr = base_addr_cfg & 0x0000ff80;
if (!base_addr) {
dev_err(&dev->dev, "I/O space for ACPI uninitialized\n");
dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
lpc_ich_cells[LPC_GPIO].num_resources--;
goto gpe0_done;
}
@ -760,7 +760,7 @@ gpe0_done:
pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
base_addr = base_addr_cfg & 0x0000ff80;
if (!base_addr) {
dev_err(&dev->dev, "I/O space for GPIO uninitialized\n");
dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n");
ret = -ENODEV;
goto gpio_done;
}
@ -810,7 +810,7 @@ static int lpc_ich_init_wdt(struct pci_dev *dev,
pci_read_config_dword(dev, ACPIBASE, &base_addr_cfg);
base_addr = base_addr_cfg & 0x0000ff80;
if (!base_addr) {
dev_err(&dev->dev, "I/O space for ACPI uninitialized\n");
dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
ret = -ENODEV;
goto wdt_done;
}
@ -830,12 +830,15 @@ static int lpc_ich_init_wdt(struct pci_dev *dev,
* we have to read RCBA from PCI Config space 0xf0 and use
* it as base. GCS = RCBA + ICH6_GCS(0x3410).
*/
if (lpc_chipset_info[id->driver_data].iTCO_version == 2) {
if (lpc_chipset_info[id->driver_data].iTCO_version == 1) {
/* Don't register iomem for TCO ver 1 */
lpc_ich_cells[LPC_WDT].num_resources--;
} else {
pci_read_config_dword(dev, RCBABASE, &base_addr_cfg);
base_addr = base_addr_cfg & 0xffffc000;
if (!(base_addr_cfg & 1)) {
pr_err("RCBA is disabled by hardware/BIOS, "
"device disabled\n");
dev_notice(&dev->dev, "RCBA is disabled by "
"hardware/BIOS, device disabled\n");
ret = -ENODEV;
goto wdt_done;
}
@ -871,6 +874,7 @@ static int lpc_ich_probe(struct pci_dev *dev,
* successfully.
*/
if (!cell_added) {
dev_warn(&dev->dev, "No MFD cells added\n");
lpc_ich_restore_config_space(dev);
return -ENODEV;
}

100
drivers/mfd/mc13xxx-core.c
View File

@ -119,6 +119,11 @@
#define MC13XXX_REVISION_FAB (0x03 << 11)
#define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
#define MC34708_REVISION_REVMETAL (0x07 << 0)
#define MC34708_REVISION_REVFULL (0x07 << 3)
#define MC34708_REVISION_FIN (0x07 << 6)
#define MC34708_REVISION_FAB (0x07 << 9)
#define MC13XXX_ADC1 44
#define MC13XXX_ADC1_ADEN (1 << 0)
#define MC13XXX_ADC1_RAND (1 << 1)
@ -410,62 +415,52 @@ static irqreturn_t mc13xxx_irq_thread(int irq, void *data)
return IRQ_RETVAL(handled);
}
static const char *mc13xxx_chipname[] = {
[MC13XXX_ID_MC13783] = "mc13783",
[MC13XXX_ID_MC13892] = "mc13892",
};
#define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask))
static int mc13xxx_identify(struct mc13xxx *mc13xxx)
static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
{
u32 icid;
u32 revision;
int ret;
/*
* Get the generation ID from register 46, as apparently some older
* IC revisions only have this info at this location. Newer ICs seem to
* have both.
*/
ret = mc13xxx_reg_read(mc13xxx, 46, &icid);
if (ret)
return ret;
icid = (icid >> 6) & 0x7;
switch (icid) {
case 2:
mc13xxx->ictype = MC13XXX_ID_MC13783;
break;
case 7:
mc13xxx->ictype = MC13XXX_ID_MC13892;
break;
default:
mc13xxx->ictype = MC13XXX_ID_INVALID;
break;
}
if (mc13xxx->ictype == MC13XXX_ID_MC13783 ||
mc13xxx->ictype == MC13XXX_ID_MC13892) {
ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
"fin: %d, fab: %d, icid: %d/%d\n",
mc13xxx_chipname[mc13xxx->ictype],
maskval(revision, MC13XXX_REVISION_REVFULL),
maskval(revision, MC13XXX_REVISION_REVMETAL),
maskval(revision, MC13XXX_REVISION_FIN),
maskval(revision, MC13XXX_REVISION_FAB),
maskval(revision, MC13XXX_REVISION_ICID),
maskval(revision, MC13XXX_REVISION_ICIDCODE));
}
return (mc13xxx->ictype == MC13XXX_ID_INVALID) ? -ENODEV : 0;
dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
"fin: %d, fab: %d, icid: %d/%d\n",
mc13xxx->variant->name,
maskval(revision, MC13XXX_REVISION_REVFULL),
maskval(revision, MC13XXX_REVISION_REVMETAL),
maskval(revision, MC13XXX_REVISION_FIN),
maskval(revision, MC13XXX_REVISION_FAB),
maskval(revision, MC13XXX_REVISION_ICID),
maskval(revision, MC13XXX_REVISION_ICIDCODE));
}
static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
{
dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
mc13xxx->variant->name,
maskval(revision, MC34708_REVISION_REVFULL),
maskval(revision, MC34708_REVISION_REVMETAL),
maskval(revision, MC34708_REVISION_FIN),
maskval(revision, MC34708_REVISION_FAB));
}
/* These are only exported for mc13xxx-i2c and mc13xxx-spi */
struct mc13xxx_variant mc13xxx_variant_mc13783 = {
.name = "mc13783",
.print_revision = mc13xxx_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
struct mc13xxx_variant mc13xxx_variant_mc13892 = {
.name = "mc13892",
.print_revision = mc13xxx_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
struct mc13xxx_variant mc13xxx_variant_mc34708 = {
.name = "mc34708",
.print_revision = mc34708_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
{
return mc13xxx_chipname[mc13xxx->ictype];
return mc13xxx->variant->name;
}
int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
@ -653,13 +648,16 @@ int mc13xxx_common_init(struct mc13xxx *mc13xxx,
struct mc13xxx_platform_data *pdata, int irq)
{
int ret;
u32 revision;
mc13xxx_lock(mc13xxx);
ret = mc13xxx_identify(mc13xxx);
ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
if (ret)
goto err_revision;
mc13xxx->variant->print_revision(mc13xxx, revision);
/* mask all irqs */
ret = mc13xxx_reg_write(mc13xxx, MC13XXX_IRQMASK0, 0x00ffffff);
if (ret)

22
drivers/mfd/mc13xxx-i2c.c
View File

@ -24,7 +24,10 @@
static const struct i2c_device_id mc13xxx_i2c_device_id[] = {
{
.name = "mc13892",
.driver_data = MC13XXX_ID_MC13892,
.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc13892,
}, {
.name = "mc34708",
.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc34708,
}, {
/* sentinel */
}
@ -34,7 +37,10 @@ MODULE_DEVICE_TABLE(i2c, mc13xxx_i2c_device_id);
static const struct of_device_id mc13xxx_dt_ids[] = {
{
.compatible = "fsl,mc13892",
.data = (void *) &mc13xxx_i2c_device_id[0],
.data = &mc13xxx_variant_mc13892,
}, {
.compatible = "fsl,mc34708",
.data = &mc13xxx_variant_mc34708,
}, {
/* sentinel */
}
@ -76,11 +82,15 @@ static int mc13xxx_i2c_probe(struct i2c_client *client,
return ret;
}
ret = mc13xxx_common_init(mc13xxx, pdata, client->irq);
if (client->dev.of_node) {
const struct of_device_id *of_id =
of_match_device(mc13xxx_dt_ids, &client->dev);
mc13xxx->variant = of_id->data;
} else {
mc13xxx->variant = (void *)id->driver_data;
}
if (ret == 0 && (id->driver_data != mc13xxx->ictype))
dev_warn(mc13xxx->dev,
"device id doesn't match auto detection!\n");
ret = mc13xxx_common_init(mc13xxx, pdata, client->irq);
return ret;
}

29
drivers/mfd/mc13xxx-spi.c
View File

@ -28,10 +28,13 @@
static const struct spi_device_id mc13xxx_device_id[] = {
{
.name = "mc13783",
.driver_data = MC13XXX_ID_MC13783,
.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc13783,
}, {
.name = "mc13892",
.driver_data = MC13XXX_ID_MC13892,
.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc13892,
}, {
.name = "mc34708",
.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc34708,
}, {
/* sentinel */
}
@ -39,8 +42,9 @@ static const struct spi_device_id mc13xxx_device_id[] = {
MODULE_DEVICE_TABLE(spi, mc13xxx_device_id);
static const struct of_device_id mc13xxx_dt_ids[] = {
{ .compatible = "fsl,mc13783", .data = (void *) MC13XXX_ID_MC13783, },
{ .compatible = "fsl,mc13892", .data = (void *) MC13XXX_ID_MC13892, },
{ .compatible = "fsl,mc13783", .data = &mc13xxx_variant_mc13783, },
{ .compatible = "fsl,mc13892", .data = &mc13xxx_variant_mc13892, },
{ .compatible = "fsl,mc34708", .data = &mc13xxx_variant_mc34708, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids);
@ -144,19 +148,18 @@ static int mc13xxx_spi_probe(struct spi_device *spi)
return ret;
}
ret = mc13xxx_common_init(mc13xxx, pdata, spi->irq);
if (spi->dev.of_node) {
const struct of_device_id *of_id =
of_match_device(mc13xxx_dt_ids, &spi->dev);
if (ret) {
dev_set_drvdata(&spi->dev, NULL);
mc13xxx->variant = of_id->data;
} else {
const struct spi_device_id *devid =
spi_get_device_id(spi);
if (!devid || devid->driver_data != mc13xxx->ictype)
dev_warn(mc13xxx->dev,
"device id doesn't match auto detection!\n");
const struct spi_device_id *id_entry = spi_get_device_id(spi);
mc13xxx->variant = (void *)id_entry->driver_data;
}
return ret;
return mc13xxx_common_init(mc13xxx, pdata, spi->irq);
}
static int mc13xxx_spi_remove(struct spi_device *spi)

18
drivers/mfd/mc13xxx.h
View File

@ -13,19 +13,25 @@
#include <linux/regmap.h>
#include <linux/mfd/mc13xxx.h>
enum mc13xxx_id {
MC13XXX_ID_MC13783,
MC13XXX_ID_MC13892,
MC13XXX_ID_INVALID,
#define MC13XXX_NUMREGS 0x3f
struct mc13xxx;
struct mc13xxx_variant {
const char *name;
void (*print_revision)(struct mc13xxx *mc13xxx, u32 revision);
};
#define MC13XXX_NUMREGS 0x3f
extern struct mc13xxx_variant
mc13xxx_variant_mc13783,
mc13xxx_variant_mc13892,
mc13xxx_variant_mc34708;
struct mc13xxx {
struct regmap *regmap;
struct device *dev;
enum mc13xxx_id ictype;
const struct mc13xxx_variant *variant;
struct mutex lock;
int irq;

15
drivers/mfd/mfd-core.c
View File

@ -21,6 +21,10 @@
#include <linux/irqdomain.h>
#include <linux/of.h>
static struct device_type mfd_dev_type = {
.name = "mfd_device",
};
int mfd_cell_enable(struct platform_device *pdev)
{
const struct mfd_cell *cell = mfd_get_cell(pdev);
@ -91,6 +95,7 @@ static int mfd_add_device(struct device *parent, int id,
goto fail_device;
pdev->dev.parent = parent;
pdev->dev.type = &mfd_dev_type;
if (parent->of_node && cell->of_compatible) {
for_each_child_of_node(parent->of_node, np) {
@ -204,10 +209,16 @@ EXPORT_SYMBOL(mfd_add_devices);
static int mfd_remove_devices_fn(struct device *dev, void *c)
{
struct platform_device *pdev = to_platform_device(dev);
const struct mfd_cell *cell = mfd_get_cell(pdev);
struct platform_device *pdev;
const struct mfd_cell *cell;
atomic_t **usage_count = c;
if (dev->type != &mfd_dev_type)
return 0;
pdev = to_platform_device(dev);
cell = mfd_get_cell(pdev);
/* find the base address of usage_count pointers (for freeing) */
if (!*usage_count || (cell->usage_count < *usage_count))
*usage_count = cell->usage_count;

2
drivers/mfd/rc5t583-irq.c
View File

@ -345,7 +345,7 @@ int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base)
mutex_init(&rc5t583->irq_lock);
/* Initailize all int register to 0 */
for (i = 0; i < RC5T583_MAX_INTERRUPT_MASK_REGS; i++) {
for (i = 0; i < RC5T583_MAX_INTERRUPT_EN_REGS; i++) {
ret = rc5t583_write(rc5t583->dev, irq_en_add[i],
rc5t583->irq_en_reg[i]);
if (ret < 0)

264
drivers/mfd/retu-mfd.c Normal file
View File

@ -0,0 +1,264 @@
/*
* Retu MFD driver
*
* Copyright (C) 2004, 2005 Nokia Corporation
*
* Based on code written by Juha Yrjölä, David Weinehall and Mikko Ylinen.
* Rewritten by Aaro Koskinen.
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of this
* archive for more details.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/mfd/retu.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
/* Registers */
#define RETU_REG_ASICR 0x00 /* ASIC ID and revision */
#define RETU_REG_ASICR_VILMA (1 << 7) /* Bit indicating Vilma */
#define RETU_REG_IDR 0x01 /* Interrupt ID */
#define RETU_REG_IMR 0x02 /* Interrupt mask */
/* Interrupt sources */
#define RETU_INT_PWR 0 /* Power button */
struct retu_dev {
struct regmap *regmap;
struct device *dev;
struct mutex mutex;
struct regmap_irq_chip_data *irq_data;
};
static struct resource retu_pwrbutton_res[] = {
{
.name = "retu-pwrbutton",
.start = RETU_INT_PWR,
.end = RETU_INT_PWR,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell retu_devs[] = {
{
.name = "retu-wdt"
},
{
.name = "retu-pwrbutton",
.resources = retu_pwrbutton_res,
.num_resources = ARRAY_SIZE(retu_pwrbutton_res),
}
};
static struct regmap_irq retu_irqs[] = {
[RETU_INT_PWR] = {
.mask = 1 << RETU_INT_PWR,
}
};
static struct regmap_irq_chip retu_irq_chip = {
.name = "RETU",
.irqs = retu_irqs,
.num_irqs = ARRAY_SIZE(retu_irqs),
.num_regs = 1,
.status_base = RETU_REG_IDR,
.mask_base = RETU_REG_IMR,
.ack_base = RETU_REG_IDR,
};
/* Retu device registered for the power off. */
static struct retu_dev *retu_pm_power_off;
int retu_read(struct retu_dev *rdev, u8 reg)
{
int ret;
int value;
mutex_lock(&rdev->mutex);
ret = regmap_read(rdev->regmap, reg, &value);
mutex_unlock(&rdev->mutex);
return ret ? ret : value;
}
EXPORT_SYMBOL_GPL(retu_read);
int retu_write(struct retu_dev *rdev, u8 reg, u16 data)
{
int ret;
mutex_lock(&rdev->mutex);
ret = regmap_write(rdev->regmap, reg, data);
mutex_unlock(&rdev->mutex);
return ret;
}
EXPORT_SYMBOL_GPL(retu_write);
static void retu_power_off(void)
{
struct retu_dev *rdev = retu_pm_power_off;
int reg;
mutex_lock(&retu_pm_power_off->mutex);
/* Ignore power button state */
regmap_read(rdev->regmap, RETU_REG_CC1, &reg);
regmap_write(rdev->regmap, RETU_REG_CC1, reg | 2);
/* Expire watchdog immediately */
regmap_write(rdev->regmap, RETU_REG_WATCHDOG, 0);
/* Wait for poweroff */
for (;;)
cpu_relax();
mutex_unlock(&retu_pm_power_off->mutex);
}
static int retu_regmap_read(void *context, const void *reg, size_t reg_size,
void *val, size_t val_size)
{
int ret;
struct device *dev = context;
struct i2c_client *i2c = to_i2c_client(dev);
BUG_ON(reg_size != 1 || val_size != 2);
ret = i2c_smbus_read_word_data(i2c, *(u8 const *)reg);
if (ret < 0)
return ret;
*(u16 *)val = ret;
return 0;
}
static int retu_regmap_write(void *context, const void *data, size_t count)
{
u8 reg;
u16 val;
struct device *dev = context;
struct i2c_client *i2c = to_i2c_client(dev);
BUG_ON(count != sizeof(reg) + sizeof(val));
memcpy(&reg, data, sizeof(reg));
memcpy(&val, data + sizeof(reg), sizeof(val));
return i2c_smbus_write_word_data(i2c, reg, val);
}
static struct regmap_bus retu_bus = {
.read = retu_regmap_read,
.write = retu_regmap_write,
.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
};
static struct regmap_config retu_config = {
.reg_bits = 8,
.val_bits = 16,
};
static int __devinit retu_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct retu_dev *rdev;
int ret;
rdev = devm_kzalloc(&i2c->dev, sizeof(*rdev), GFP_KERNEL);
if (rdev == NULL)
return -ENOMEM;
i2c_set_clientdata(i2c, rdev);
rdev->dev = &i2c->dev;
mutex_init(&rdev->mutex);
rdev->regmap = devm_regmap_init(&i2c->dev, &retu_bus, &i2c->dev,
&retu_config);
if (IS_ERR(rdev->regmap))
return PTR_ERR(rdev->regmap);
ret = retu_read(rdev, RETU_REG_ASICR);
if (ret < 0) {
dev_err(rdev->dev, "could not read Retu revision: %d\n", ret);
return ret;
}
dev_info(rdev->dev, "Retu%s v%d.%d found\n",
(ret & RETU_REG_ASICR_VILMA) ? " & Vilma" : "",
(ret >> 4) & 0x7, ret & 0xf);
/* Mask all RETU interrupts. */
ret = retu_write(rdev, RETU_REG_IMR, 0xffff);
if (ret < 0)
return ret;
ret = regmap_add_irq_chip(rdev->regmap, i2c->irq, IRQF_ONESHOT, -1,
&retu_irq_chip, &rdev->irq_data);
if (ret < 0)
return ret;
ret = mfd_add_devices(rdev->dev, -1, retu_devs, ARRAY_SIZE(retu_devs),
NULL, regmap_irq_chip_get_base(rdev->irq_data),
NULL);
if (ret < 0) {
regmap_del_irq_chip(i2c->irq, rdev->irq_data);
return ret;
}
if (!pm_power_off) {
retu_pm_power_off = rdev;
pm_power_off = retu_power_off;
}
return 0;
}
static int __devexit retu_remove(struct i2c_client *i2c)
{
struct retu_dev *rdev = i2c_get_clientdata(i2c);
if (retu_pm_power_off == rdev) {
pm_power_off = NULL;
retu_pm_power_off = NULL;
}
mfd_remove_devices(rdev->dev);
regmap_del_irq_chip(i2c->irq, rdev->irq_data);
return 0;
}
static const struct i2c_device_id retu_id[] = {
{ "retu-mfd", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, retu_id);
static struct i2c_driver retu_driver = {
.driver = {
.name = "retu-mfd",
.owner = THIS_MODULE,
},
.probe = retu_probe,
.remove = retu_remove,
.id_table = retu_id,
};
module_i2c_driver(retu_driver);
MODULE_DESCRIPTION("Retu MFD driver");
MODULE_AUTHOR("Juha Yrjölä");
MODULE_AUTHOR("David Weinehall");
MODULE_AUTHOR("Mikko Ylinen");
MODULE_AUTHOR("Aaro Koskinen <aaro.koskinen@iki.fi>");
MODULE_LICENSE("GPL");

1
drivers/mfd/rtsx_pcr.c
View File

@ -22,6 +22,7 @@
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
#include <linux/highmem.h>
#include <linux/interrupt.h>

102
drivers/mfd/sec-irq.c
View File

@ -24,67 +24,67 @@
static struct regmap_irq s2mps11_irqs[] = {
[S2MPS11_IRQ_PWRONF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_PWRONF_MASK,
},
[S2MPS11_IRQ_PWRONR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_PWRONR_MASK,
},
[S2MPS11_IRQ_JIGONBF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_JIGONBF_MASK,
},
[S2MPS11_IRQ_JIGONBR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_JIGONBR_MASK,
},
[S2MPS11_IRQ_ACOKBF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_ACOKBF_MASK,
},
[S2MPS11_IRQ_ACOKBR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_ACOKBR_MASK,
},
[S2MPS11_IRQ_PWRON1S] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_PWRON1S_MASK,
},
[S2MPS11_IRQ_MRB] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S2MPS11_IRQ_MRB_MASK,
},
[S2MPS11_IRQ_RTC60S] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTC60S_MASK,
},
[S2MPS11_IRQ_RTCA1] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTCA1_MASK,
},
[S2MPS11_IRQ_RTCA2] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTCA2_MASK,
},
[S2MPS11_IRQ_SMPL] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_SMPL_MASK,
},
[S2MPS11_IRQ_RTC1S] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTC1S_MASK,
},
[S2MPS11_IRQ_WTSR] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S2MPS11_IRQ_WTSR_MASK,
},
[S2MPS11_IRQ_INT120C] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S2MPS11_IRQ_INT120C_MASK,
},
[S2MPS11_IRQ_INT140C] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S2MPS11_IRQ_INT140C_MASK,
},
};
@ -92,146 +92,146 @@ static struct regmap_irq s2mps11_irqs[] = {
static struct regmap_irq s5m8767_irqs[] = {
[S5M8767_IRQ_PWRR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_PWRR_MASK,
},
[S5M8767_IRQ_PWRF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_PWRF_MASK,
},
[S5M8767_IRQ_PWR1S] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_PWR1S_MASK,
},
[S5M8767_IRQ_JIGR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_JIGR_MASK,
},
[S5M8767_IRQ_JIGF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_JIGF_MASK,
},
[S5M8767_IRQ_LOWBAT2] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_LOWBAT2_MASK,
},
[S5M8767_IRQ_LOWBAT1] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8767_IRQ_LOWBAT1_MASK,
},
[S5M8767_IRQ_MRB] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8767_IRQ_MRB_MASK,
},
[S5M8767_IRQ_DVSOK2] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8767_IRQ_DVSOK2_MASK,
},
[S5M8767_IRQ_DVSOK3] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8767_IRQ_DVSOK3_MASK,
},
[S5M8767_IRQ_DVSOK4] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8767_IRQ_DVSOK4_MASK,
},
[S5M8767_IRQ_RTC60S] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_RTC60S_MASK,
},
[S5M8767_IRQ_RTCA1] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_RTCA1_MASK,
},
[S5M8767_IRQ_RTCA2] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_RTCA2_MASK,
},
[S5M8767_IRQ_SMPL] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_SMPL_MASK,
},
[S5M8767_IRQ_RTC1S] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_RTC1S_MASK,
},
[S5M8767_IRQ_WTSR] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8767_IRQ_WTSR_MASK,
},
};
static struct regmap_irq s5m8763_irqs[] = {
[S5M8763_IRQ_DCINF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_DCINF_MASK,
},
[S5M8763_IRQ_DCINR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_DCINR_MASK,
},
[S5M8763_IRQ_JIGF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_JIGF_MASK,
},
[S5M8763_IRQ_JIGR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_JIGR_MASK,
},
[S5M8763_IRQ_PWRONF] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_PWRONF_MASK,
},
[S5M8763_IRQ_PWRONR] = {
.reg_offset = 1,
.reg_offset = 0,
.mask = S5M8763_IRQ_PWRONR_MASK,
},
[S5M8763_IRQ_WTSREVNT] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8763_IRQ_WTSREVNT_MASK,
},
[S5M8763_IRQ_SMPLEVNT] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8763_IRQ_SMPLEVNT_MASK,
},
[S5M8763_IRQ_ALARM1] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8763_IRQ_ALARM1_MASK,
},
[S5M8763_IRQ_ALARM0] = {
.reg_offset = 2,
.reg_offset = 1,
.mask = S5M8763_IRQ_ALARM0_MASK,
},
[S5M8763_IRQ_ONKEY1S] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_ONKEY1S_MASK,
},
[S5M8763_IRQ_TOPOFFR] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_TOPOFFR_MASK,
},
[S5M8763_IRQ_DCINOVPR] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_DCINOVPR_MASK,
},
[S5M8763_IRQ_CHGRSTF] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_CHGRSTF_MASK,
},
[S5M8763_IRQ_DONER] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_DONER_MASK,
},
[S5M8763_IRQ_CHGFAULT] = {
.reg_offset = 3,
.reg_offset = 2,
.mask = S5M8763_IRQ_CHGFAULT_MASK,
},
[S5M8763_IRQ_LOBAT1] = {
.reg_offset = 4,
.reg_offset = 3,
.mask = S5M8763_IRQ_LOBAT1_MASK,
},
[S5M8763_IRQ_LOBAT2] = {
.reg_offset = 4,
.reg_offset = 3,
.mask = S5M8763_IRQ_LOBAT2_MASK,
},
};

542
drivers/mfd/sta2x11-mfd.c
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 2009-2011 Wind River Systems, Inc.
* Copyright (c) 2011 ST Microelectronics (Alessandro Rubini)
* Copyright (c) 2011 ST Microelectronics (Alessandro Rubini, Davide Ciminaghi)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -27,21 +27,28 @@
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
#include <linux/mfd/sta2x11-mfd.h>
#include <linux/regmap.h>
#include <asm/sta2x11.h>
static inline int __reg_within_range(unsigned int r,
unsigned int start,
unsigned int end)
{
return ((r >= start) && (r <= end));
}
/* This describes STA2X11 MFD chip for us, we may have several */
struct sta2x11_mfd {
struct sta2x11_instance *instance;
spinlock_t lock;
struct regmap *regmap[sta2x11_n_mfd_plat_devs];
spinlock_t lock[sta2x11_n_mfd_plat_devs];
struct list_head list;
void __iomem *sctl_regs;
void __iomem *apbreg_regs;
void __iomem *regs[sta2x11_n_mfd_plat_devs];
};
static LIST_HEAD(sta2x11_mfd_list);
@ -71,6 +78,7 @@ static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)
static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
{
int i;
struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
struct sta2x11_instance *instance;
@ -83,7 +91,8 @@ static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
if (!mfd)
return -ENOMEM;
INIT_LIST_HEAD(&mfd->list);
spin_lock_init(&mfd->lock);
for (i = 0; i < ARRAY_SIZE(mfd->lock); i++)
spin_lock_init(&mfd->lock[i]);
mfd->instance = instance;
list_add(&mfd->list, &sta2x11_mfd_list);
return 0;
@ -100,161 +109,276 @@ static int mfd_remove(struct pci_dev *pdev)
return 0;
}
/* These two functions are exported and are not expected to fail */
u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
/* This function is exported and is not expected to fail */
u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
enum sta2x11_mfd_plat_dev index)
{
struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
u32 r;
unsigned long flags;
void __iomem *regs;
if (!mfd) {
dev_warn(&pdev->dev, ": can't access sctl regs\n");
return 0;
}
if (!mfd->sctl_regs) {
regs = mfd->regs[index];
if (!regs) {
dev_warn(&pdev->dev, ": system ctl not initialized\n");
return 0;
}
spin_lock_irqsave(&mfd->lock, flags);
r = readl(mfd->sctl_regs + reg);
spin_lock_irqsave(&mfd->lock[index], flags);
r = readl(regs + reg);
r &= ~mask;
r |= val;
if (mask)
writel(r, mfd->sctl_regs + reg);
spin_unlock_irqrestore(&mfd->lock, flags);
writel(r, regs + reg);
spin_unlock_irqrestore(&mfd->lock[index], flags);
return r;
}
EXPORT_SYMBOL(sta2x11_sctl_mask);
EXPORT_SYMBOL(__sta2x11_mfd_mask);
u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
int sta2x11_mfd_get_regs_data(struct platform_device *dev,
enum sta2x11_mfd_plat_dev index,
void __iomem **regs,
spinlock_t **lock)
{
struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
u32 r;
unsigned long flags;
struct pci_dev *pdev = *(struct pci_dev **)(dev->dev.platform_data);
struct sta2x11_mfd *mfd;
if (!mfd) {
dev_warn(&pdev->dev, ": can't access apb regs\n");
return 0;
}
if (!mfd->apbreg_regs) {
dev_warn(&pdev->dev, ": apb bridge not initialized\n");
return 0;
}
spin_lock_irqsave(&mfd->lock, flags);
r = readl(mfd->apbreg_regs + reg);
r &= ~mask;
r |= val;
if (mask)
writel(r, mfd->apbreg_regs + reg);
spin_unlock_irqrestore(&mfd->lock, flags);
return r;
if (!pdev)
return -ENODEV;
mfd = sta2x11_mfd_find(pdev);
if (!mfd)
return -ENODEV;
if (index >= sta2x11_n_mfd_plat_devs)
return -ENODEV;
*regs = mfd->regs[index];
*lock = &mfd->lock[index];
pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs);
return *regs ? 0 : -ENODEV;
}
EXPORT_SYMBOL(sta2x11_apbreg_mask);
EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);
/* Two debugfs files, for our registers (FIXME: one instance only) */
#define REG(regname) {.name = #regname, .offset = SCTL_ ## regname}
static struct debugfs_reg32 sta2x11_sctl_regs[] = {
REG(SCCTL), REG(ARMCFG), REG(SCPLLCTL), REG(SCPLLFCTRL),
REG(SCRESFRACT), REG(SCRESCTRL1), REG(SCRESXTRL2), REG(SCPEREN0),
REG(SCPEREN1), REG(SCPEREN2), REG(SCGRST), REG(SCPCIPMCR1),
REG(SCPCIPMCR2), REG(SCPCIPMSR1), REG(SCPCIPMSR2), REG(SCPCIPMSR3),
REG(SCINTREN), REG(SCRISR), REG(SCCLKSTAT0), REG(SCCLKSTAT1),
REG(SCCLKSTAT2), REG(SCRSTSTA),
};
#undef REG
/*
* Special sta2x11-mfd regmap lock/unlock functions
*/
static struct debugfs_regset32 sctl_regset = {
.regs = sta2x11_sctl_regs,
.nregs = ARRAY_SIZE(sta2x11_sctl_regs),
static void sta2x11_regmap_lock(void *__lock)
{
spinlock_t *lock = __lock;
spin_lock(lock);
}
static void sta2x11_regmap_unlock(void *__lock)
{
spinlock_t *lock = __lock;
spin_unlock(lock);
}
/* OTP (one time programmable registers do not require locking */
static void sta2x11_regmap_nolock(void *__lock)
{
}
static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
[sta2x11_sctl] = STA2X11_MFD_SCTL_NAME,
[sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME,
[sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME,
[sta2x11_scr] = STA2X11_MFD_SCR_NAME,
};
#define REG(regname) {.name = #regname, .offset = regname}
static struct debugfs_reg32 sta2x11_apbreg_regs[] = {
REG(APBREG_BSR), REG(APBREG_PAER), REG(APBREG_PWAC), REG(APBREG_PRAC),
REG(APBREG_PCG), REG(APBREG_PUR), REG(APBREG_EMU_PCG),
};
#undef REG
static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
{
return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
}
static struct debugfs_regset32 apbreg_regset = {
.regs = sta2x11_apbreg_regs,
.nregs = ARRAY_SIZE(sta2x11_apbreg_regs),
static struct regmap_config sta2x11_sctl_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.lock = sta2x11_regmap_lock,
.unlock = sta2x11_regmap_unlock,
.max_register = SCTL_SCRSTSTA,
.writeable_reg = sta2x11_sctl_writeable_reg,
};
static struct dentry *sta2x11_sctl_debugfs;
static struct dentry *sta2x11_apbreg_debugfs;
static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg)
{
return (reg == STA2X11_SECR_CR) ||
__reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1);
}
/* Probe for the two platform devices */
static int sta2x11_sctl_probe(struct platform_device *dev)
static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg)
{
return false;
}
static struct regmap_config sta2x11_scr_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.lock = sta2x11_regmap_nolock,
.unlock = sta2x11_regmap_nolock,
.max_register = STA2X11_SECR_FVR1,
.readable_reg = sta2x11_scr_readable_reg,
.writeable_reg = sta2x11_scr_writeable_reg,
};
static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
{
/* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
if (reg >= APBREG_BSR_SARAC)
reg -= APBREG_BSR_SARAC;
switch (reg) {
case APBREG_BSR:
case APBREG_PAER:
case APBREG_PWAC:
case APBREG_PRAC:
case APBREG_PCG:
case APBREG_PUR:
case APBREG_EMU_PCG:
return true;
default:
return false;
}
}
static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
{
if (reg >= APBREG_BSR_SARAC)
reg -= APBREG_BSR_SARAC;
if (!sta2x11_apbreg_readable_reg(dev, reg))
return false;
return reg != APBREG_PAER;
}
static struct regmap_config sta2x11_apbreg_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.lock = sta2x11_regmap_lock,
.unlock = sta2x11_regmap_unlock,
.max_register = APBREG_EMU_PCG_SARAC,
.readable_reg = sta2x11_apbreg_readable_reg,
.writeable_reg = sta2x11_apbreg_writeable_reg,
};
static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
unsigned int reg)
{
return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG ||
__reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) ||
__reg_within_range(reg, MASTER_LOCK_REG,
SYSTEM_CONFIG_STATUS_REG) ||
reg == MSP_CLK_CTRL_REG ||
__reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
}
static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
unsigned int reg)
{
if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
return false;
switch (reg) {
case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
case SYSTEM_CONFIG_STATUS_REG:
case COMPENSATION_REG1:
case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
return false;
default:
return true;
}
}
static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.lock = sta2x11_regmap_lock,
.unlock = sta2x11_regmap_unlock,
.max_register = TEST_CTL_REG,
.readable_reg = sta2x11_apb_soc_regs_readable_reg,
.writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
};
static struct regmap_config *
sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
[sta2x11_sctl] = &sta2x11_sctl_regmap_config,
[sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
[sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
[sta2x11_scr] = &sta2x11_scr_regmap_config,
};
/* Probe for the four platform devices */
static int sta2x11_mfd_platform_probe(struct platform_device *dev,
enum sta2x11_mfd_plat_dev index)
{
struct pci_dev **pdev;
struct sta2x11_mfd *mfd;
struct resource *res;
const char *name = sta2x11_mfd_names[index];
struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];
pdev = dev->dev.platform_data;
mfd = sta2x11_mfd_find(*pdev);
if (!mfd)
return -ENODEV;
if (!regmap_config)
return -ENODEV;
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
if (!res)
return -ENOMEM;
if (!request_mem_region(res->start, resource_size(res),
"sta2x11-sctl"))
if (!request_mem_region(res->start, resource_size(res), name))
return -EBUSY;
mfd->sctl_regs = ioremap(res->start, resource_size(res));
if (!mfd->sctl_regs) {
mfd->regs[index] = ioremap(res->start, resource_size(res));
if (!mfd->regs[index]) {
release_mem_region(res->start, resource_size(res));
return -ENOMEM;
}
sctl_regset.base = mfd->sctl_regs;
sta2x11_sctl_debugfs = debugfs_create_regset32("sta2x11-sctl",
S_IFREG | S_IRUGO,
NULL, &sctl_regset);
regmap_config->lock_arg = &mfd->lock;
/*
No caching, registers could be reached both via regmap and via
void __iomem *
*/
regmap_config->cache_type = REGCACHE_NONE;
mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
regmap_config);
WARN_ON(!mfd->regmap[index]);
return 0;
}
static int sta2x11_sctl_probe(struct platform_device *dev)
{
return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
}
static int sta2x11_apbreg_probe(struct platform_device *dev)
{
struct pci_dev **pdev;
struct sta2x11_mfd *mfd;
struct resource *res;
pdev = dev->dev.platform_data;
dev_dbg(&dev->dev, "%s: pdata is %p\n", __func__, pdev);
dev_dbg(&dev->dev, "%s: *pdata is %p\n", __func__, *pdev);
mfd = sta2x11_mfd_find(*pdev);
if (!mfd)
return -ENODEV;
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
if (!res)
return -ENOMEM;
if (!request_mem_region(res->start, resource_size(res),
"sta2x11-apbreg"))
return -EBUSY;
mfd->apbreg_regs = ioremap(res->start, resource_size(res));
if (!mfd->apbreg_regs) {
release_mem_region(res->start, resource_size(res));
return -ENOMEM;
}
dev_dbg(&dev->dev, "%s: regbase %p\n", __func__, mfd->apbreg_regs);
apbreg_regset.base = mfd->apbreg_regs;
sta2x11_apbreg_debugfs = debugfs_create_regset32("sta2x11-apbreg",
S_IFREG | S_IRUGO,
NULL, &apbreg_regset);
return 0;
return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
}
/* The two platform drivers */
static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
{
return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
}
static int sta2x11_scr_probe(struct platform_device *dev)
{
return sta2x11_mfd_platform_probe(dev, sta2x11_scr);
}
/* The three platform drivers */
static struct platform_driver sta2x11_sctl_platform_driver = {
.driver = {
.name = "sta2x11-sctl",
.name = STA2X11_MFD_SCTL_NAME,
.owner = THIS_MODULE,
},
.probe = sta2x11_sctl_probe,
@ -268,7 +392,7 @@ static int __init sta2x11_sctl_init(void)
static struct platform_driver sta2x11_platform_driver = {
.driver = {
.name = "sta2x11-apbreg",
.name = STA2X11_MFD_APBREG_NAME,
.owner = THIS_MODULE,
},
.probe = sta2x11_apbreg_probe,
@ -280,13 +404,44 @@ static int __init sta2x11_apbreg_init(void)
return platform_driver_register(&sta2x11_platform_driver);
}
static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
.driver = {
.name = STA2X11_MFD_APB_SOC_REGS_NAME,
.owner = THIS_MODULE,
},
.probe = sta2x11_apb_soc_regs_probe,
};
static int __init sta2x11_apb_soc_regs_init(void)
{
pr_info("%s\n", __func__);
return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
}
static struct platform_driver sta2x11_scr_platform_driver = {
.driver = {
.name = STA2X11_MFD_SCR_NAME,
.owner = THIS_MODULE,
},
.probe = sta2x11_scr_probe,
};
static int __init sta2x11_scr_init(void)
{
pr_info("%s\n", __func__);
return platform_driver_register(&sta2x11_scr_platform_driver);
}
/*
* What follows is the PCI device that hosts the above two pdevs.
* What follows are the PCI devices that host the above pdevs.
* Each logic block is 4kB and they are all consecutive: we use this info.
*/
/* Bar 0 */
enum bar0_cells {
/* Mfd 0 device */
/* Mfd 0, Bar 0 */
enum mfd0_bar0_cells {
STA2X11_GPIO_0 = 0,
STA2X11_GPIO_1,
STA2X11_GPIO_2,
@ -295,8 +450,8 @@ enum bar0_cells {
STA2X11_SCR,
STA2X11_TIME,
};
/* Bar 1 */
enum bar1_cells {
/* Mfd 0 , Bar 1 */
enum mfd0_bar1_cells {
STA2X11_APBREG = 0,
};
#define CELL_4K(_name, _cell) { \
@ -307,40 +462,71 @@ enum bar1_cells {
static const struct resource gpio_resources[] = {
{
.name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */
/* 4 consecutive cells, 1 driver */
.name = STA2X11_MFD_GPIO_NAME,
.start = 0,
.end = (4 * 4096) - 1,
.flags = IORESOURCE_MEM,
}
};
static const struct resource sctl_resources[] = {
CELL_4K("sta2x11-sctl", STA2X11_SCTL),
CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL),
};
static const struct resource scr_resources[] = {
CELL_4K("sta2x11-scr", STA2X11_SCR),
CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR),
};
static const struct resource time_resources[] = {
CELL_4K("sta2x11-time", STA2X11_TIME),
CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME),
};
static const struct resource apbreg_resources[] = {
CELL_4K("sta2x11-apbreg", STA2X11_APBREG),
CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG),
};
#define DEV(_name, _r) \
{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
static struct mfd_cell sta2x11_mfd_bar0[] = {
DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */
DEV("sta2x11-sctl", sctl_resources),
DEV("sta2x11-scr", scr_resources),
DEV("sta2x11-time", time_resources),
static struct mfd_cell sta2x11_mfd0_bar0[] = {
/* offset 0: we add pdata later */
DEV(STA2X11_MFD_GPIO_NAME, gpio_resources),
DEV(STA2X11_MFD_SCTL_NAME, sctl_resources),
DEV(STA2X11_MFD_SCR_NAME, scr_resources),
DEV(STA2X11_MFD_TIME_NAME, time_resources),
};
static struct mfd_cell sta2x11_mfd_bar1[] = {
DEV("sta2x11-apbreg", apbreg_resources),
static struct mfd_cell sta2x11_mfd0_bar1[] = {
DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources),
};
/* Mfd 1 devices */
/* Mfd 1, Bar 0 */
enum mfd1_bar0_cells {
STA2X11_VIC = 0,
};
/* Mfd 1, Bar 1 */
enum mfd1_bar1_cells {
STA2X11_APB_SOC_REGS = 0,
};
static const __devinitconst struct resource vic_resources[] = {
CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC),
};
static const __devinitconst struct resource apb_soc_regs_resources[] = {
CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS),
};
static __devinitdata struct mfd_cell sta2x11_mfd1_bar0[] = {
DEV(STA2X11_MFD_VIC_NAME, vic_resources),
};
static __devinitdata struct mfd_cell sta2x11_mfd1_bar1[] = {
DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources),
};
static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
{
pci_save_state(pdev);
@ -363,11 +549,63 @@ static int sta2x11_mfd_resume(struct pci_dev *pdev)
return 0;
}
struct sta2x11_mfd_bar_setup_data {
struct mfd_cell *cells;
int ncells;
};
struct sta2x11_mfd_setup_data {
struct sta2x11_mfd_bar_setup_data bars[2];
};
#define STA2X11_MFD0 0
#define STA2X11_MFD1 1
static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
/* Mfd 0: gpio, sctl, scr, timers / apbregs */
[STA2X11_MFD0] = {
.bars = {
[0] = {
.cells = sta2x11_mfd0_bar0,
.ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
},
[1] = {
.cells = sta2x11_mfd0_bar1,
.ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
},
},
},
/* Mfd 1: vic / apb-soc-regs */
[STA2X11_MFD1] = {
.bars = {
[0] = {
.cells = sta2x11_mfd1_bar0,
.ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
},
[1] = {
.cells = sta2x11_mfd1_bar1,
.ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
},
},
},
};
static void sta2x11_mfd_setup(struct pci_dev *pdev,
struct sta2x11_mfd_setup_data *sd)
{
int i, j;
for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
for (j = 0; j < sd->bars[i].ncells; j++) {
sd->bars[i].cells[j].pdata_size = sizeof(pdev);
sd->bars[i].cells[j].platform_data = &pdev;
}
}
static int sta2x11_mfd_probe(struct pci_dev *pdev,
const struct pci_device_id *pci_id)
const struct pci_device_id *pci_id)
{
int err, i;
struct sta2x11_gpio_pdata *gpio_data;
struct sta2x11_mfd_setup_data *setup_data;
dev_info(&pdev->dev, "%s\n", __func__);
@ -381,46 +619,29 @@ static int sta2x11_mfd_probe(struct pci_dev *pdev,
if (err)
dev_info(&pdev->dev, "Enable msi failed\n");
/* Read gpio config data as pci device's platform data */
gpio_data = dev_get_platdata(&pdev->dev);
if (!gpio_data)
dev_warn(&pdev->dev, "no gpio configuration\n");
dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__,
gpio_data, &gpio_data);
dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__,
pdev, &pdev);
setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
&mfd_setup_data[STA2X11_MFD0] :
&mfd_setup_data[STA2X11_MFD1];
/* platform data is the pci device for all of them */
for (i = 0; i < ARRAY_SIZE(sta2x11_mfd_bar0); i++) {
sta2x11_mfd_bar0[i].pdata_size = sizeof(pdev);
sta2x11_mfd_bar0[i].platform_data = &pdev;
}
sta2x11_mfd_bar1[0].pdata_size = sizeof(pdev);
sta2x11_mfd_bar1[0].platform_data = &pdev;
sta2x11_mfd_setup(pdev, setup_data);
/* Record this pdev before mfd_add_devices: their probe looks for it */
sta2x11_mfd_add(pdev, GFP_ATOMIC);
if (!sta2x11_mfd_find(pdev))
sta2x11_mfd_add(pdev, GFP_ATOMIC);
err = mfd_add_devices(&pdev->dev, -1,
sta2x11_mfd_bar0,
ARRAY_SIZE(sta2x11_mfd_bar0),
&pdev->resource[0],
0, NULL);
if (err) {
dev_err(&pdev->dev, "mfd_add_devices[0] failed: %d\n", err);
goto err_disable;
}
err = mfd_add_devices(&pdev->dev, -1,
sta2x11_mfd_bar1,
ARRAY_SIZE(sta2x11_mfd_bar1),
&pdev->resource[1],
0, NULL);
if (err) {
dev_err(&pdev->dev, "mfd_add_devices[1] failed: %d\n", err);
goto err_disable;
/* Just 2 bars for all mfd's at present */
for (i = 0; i < 2; i++) {
err = mfd_add_devices(&pdev->dev, -1,
setup_data->bars[i].cells,
setup_data->bars[i].ncells,
&pdev->resource[i],
0, NULL);
if (err) {
dev_err(&pdev->dev,
"mfd_add_devices[%d] failed: %d\n", i, err);
goto err_disable;
}
}
return 0;
@ -434,6 +655,7 @@ err_disable:
static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
{0,},
};
@ -459,6 +681,8 @@ static int __init sta2x11_mfd_init(void)
*/
subsys_initcall(sta2x11_apbreg_init);
subsys_initcall(sta2x11_sctl_init);
subsys_initcall(sta2x11_apb_soc_regs_init);
subsys_initcall(sta2x11_scr_init);
rootfs_initcall(sta2x11_mfd_init);
MODULE_LICENSE("GPL v2");

8
drivers/mfd/stmpe-i2c.c
View File

@ -82,11 +82,13 @@ static const struct i2c_device_id stmpe_i2c_id[] = {
MODULE_DEVICE_TABLE(i2c, stmpe_id);
static struct i2c_driver stmpe_i2c_driver = {
.driver.name = "stmpe-i2c",
.driver.owner = THIS_MODULE,
.driver = {
.name = "stmpe-i2c",
.owner = THIS_MODULE,
#ifdef CONFIG_PM
.driver.pm = &stmpe_dev_pm_ops,
.pm = &stmpe_dev_pm_ops,
#endif
},
.probe = stmpe_i2c_probe,
.remove = stmpe_i2c_remove,
.id_table = stmpe_i2c_id,

206
drivers/mfd/stmpe.c
View File

@ -7,11 +7,15 @@
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
*/
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/mfd/core.h>
@ -312,14 +316,10 @@ static struct mfd_cell stmpe_gpio_cell_noirq = {
static struct resource stmpe_keypad_resources[] = {
{
.name = "KEYPAD",
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
{
.name = "KEYPAD_OVER",
.start = 1,
.end = 1,
.flags = IORESOURCE_IRQ,
},
};
@ -399,14 +399,10 @@ static struct stmpe_variant_info stmpe801_noirq = {
static struct resource stmpe_ts_resources[] = {
{
.name = "TOUCH_DET",
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
{
.name = "FIFO_TH",
.start = 1,
.end = 1,
.flags = IORESOURCE_IRQ,
},
};
@ -528,12 +524,12 @@ static const u8 stmpe1601_regs[] = {
static struct stmpe_variant_block stmpe1601_blocks[] = {
{
.cell = &stmpe_gpio_cell,
.irq = STMPE24XX_IRQ_GPIOC,
.irq = STMPE1601_IRQ_GPIOC,
.block = STMPE_BLOCK_GPIO,
},
{
.cell = &stmpe_keypad_cell,
.irq = STMPE24XX_IRQ_KEYPAD,
.irq = STMPE1601_IRQ_KEYPAD,
.block = STMPE_BLOCK_KEYPAD,
},
};
@ -767,7 +763,9 @@ static irqreturn_t stmpe_irq(int irq, void *data)
int i;
if (variant->id_val == STMPE801_ID) {
handle_nested_irq(stmpe->irq_base);
int base = irq_create_mapping(stmpe->domain, 0);
handle_nested_irq(base);
return IRQ_HANDLED;
}
@ -788,8 +786,9 @@ static irqreturn_t stmpe_irq(int irq, void *data)
while (status) {
int bit = __ffs(status);
int line = bank * 8 + bit;
int nestedirq = irq_create_mapping(stmpe->domain, line);
handle_nested_irq(stmpe->irq_base + line);
handle_nested_irq(nestedirq);
status &= ~(1 << bit);
}
@ -830,7 +829,7 @@ static void stmpe_irq_sync_unlock(struct irq_data *data)
static void stmpe_irq_mask(struct irq_data *data)
{
struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
int offset = data->irq - stmpe->irq_base;
int offset = data->hwirq;
int regoffset = offset / 8;
int mask = 1 << (offset % 8);
@ -840,7 +839,7 @@ static void stmpe_irq_mask(struct irq_data *data)
static void stmpe_irq_unmask(struct irq_data *data)
{
struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
int offset = data->irq - stmpe->irq_base;
int offset = data->hwirq;
int regoffset = offset / 8;
int mask = 1 << (offset % 8);
@ -855,43 +854,59 @@ static struct irq_chip stmpe_irq_chip = {
.irq_unmask = stmpe_irq_unmask,
};
static int __devinit stmpe_irq_init(struct stmpe *stmpe)
static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
irq_hw_number_t hwirq)
{
struct stmpe *stmpe = d->host_data;
struct irq_chip *chip = NULL;
int num_irqs = stmpe->variant->num_irqs;
int base = stmpe->irq_base;
int irq;
if (stmpe->variant->id_val != STMPE801_ID)
chip = &stmpe_irq_chip;
for (irq = base; irq < base + num_irqs; irq++) {
irq_set_chip_data(irq, stmpe);
irq_set_chip_and_handler(irq, chip, handle_edge_irq);
irq_set_nested_thread(irq, 1);
irq_set_chip_data(virq, stmpe);
irq_set_chip_and_handler(virq, chip, handle_edge_irq);
irq_set_nested_thread(virq, 1);
#ifdef CONFIG_ARM
set_irq_flags(irq, IRQF_VALID);
set_irq_flags(virq, IRQF_VALID);
#else
irq_set_noprobe(irq);
irq_set_noprobe(virq);
#endif
}
return 0;
}
static void stmpe_irq_remove(struct stmpe *stmpe)
static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
{
int num_irqs = stmpe->variant->num_irqs;
int base = stmpe->irq_base;
int irq;
for (irq = base; irq < base + num_irqs; irq++) {
#ifdef CONFIG_ARM
set_irq_flags(irq, 0);
set_irq_flags(virq, 0);
#endif
irq_set_chip_and_handler(irq, NULL, NULL);
irq_set_chip_data(irq, NULL);
irq_set_chip_and_handler(virq, NULL, NULL);
irq_set_chip_data(virq, NULL);
}
static struct irq_domain_ops stmpe_irq_ops = {
.map = stmpe_irq_map,
.unmap = stmpe_irq_unmap,
.xlate = irq_domain_xlate_twocell,
};
static int __devinit stmpe_irq_init(struct stmpe *stmpe,
struct device_node *np)
{
int base = 0;
int num_irqs = stmpe->variant->num_irqs;
if (!np)
base = stmpe->irq_base;
stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
&stmpe_irq_ops, stmpe);
if (!stmpe->domain) {
dev_err(stmpe->dev, "Failed to create irqdomain\n");
return -ENOSYS;
}
return 0;
}
static int __devinit stmpe_chip_init(struct stmpe *stmpe)
@ -942,13 +957,6 @@ static int __devinit stmpe_chip_init(struct stmpe *stmpe)
else
icr |= STMPE_ICR_LSB_HIGH;
}
if (stmpe->pdata->irq_invert_polarity) {
if (id == STMPE801_ID)
icr ^= STMPE801_REG_SYS_CTRL_INT_HI;
else
icr ^= STMPE_ICR_LSB_HIGH;
}
}
if (stmpe->pdata->autosleep) {
@ -961,10 +969,10 @@ static int __devinit stmpe_chip_init(struct stmpe *stmpe)
}
static int __devinit stmpe_add_device(struct stmpe *stmpe,
struct mfd_cell *cell, int irq)
struct mfd_cell *cell)
{
return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
NULL, stmpe->irq_base + irq, NULL);
NULL, stmpe->irq_base, stmpe->domain);
}
static int __devinit stmpe_devices_init(struct stmpe *stmpe)
@ -972,7 +980,7 @@ static int __devinit stmpe_devices_init(struct stmpe *stmpe)
struct stmpe_variant_info *variant = stmpe->variant;
unsigned int platform_blocks = stmpe->pdata->blocks;
int ret = -EINVAL;
int i;
int i, j;
for (i = 0; i < variant->num_blocks; i++) {
struct stmpe_variant_block *block = &variant->blocks[i];
@ -980,8 +988,17 @@ static int __devinit stmpe_devices_init(struct stmpe *stmpe)
if (!(platform_blocks & block->block))
continue;
for (j = 0; j < block->cell->num_resources; j++) {
struct resource *res =
(struct resource *) &block->cell->resources[j];
/* Dynamically fill in a variant's IRQ. */
if (res->flags & IORESOURCE_IRQ)
res->start = res->end = block->irq + j;
}
platform_blocks &= ~block->block;
ret = stmpe_add_device(stmpe, block->cell, block->irq);
ret = stmpe_add_device(stmpe, block->cell);
if (ret)
return ret;
}
@ -994,17 +1011,56 @@ static int __devinit stmpe_devices_init(struct stmpe *stmpe)
return ret;
}
void __devinit stmpe_of_probe(struct stmpe_platform_data *pdata,
struct device_node *np)
{
struct device_node *child;
pdata->id = -1;
pdata->irq_trigger = IRQF_TRIGGER_NONE;
of_property_read_u32(np, "st,autosleep-timeout",
&pdata->autosleep_timeout);
pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
for_each_child_of_node(np, child) {
if (!strcmp(child->name, "stmpe_gpio")) {
pdata->blocks |= STMPE_BLOCK_GPIO;
} else if (!strcmp(child->name, "stmpe_keypad")) {
pdata->blocks |= STMPE_BLOCK_KEYPAD;
} else if (!strcmp(child->name, "stmpe_touchscreen")) {
pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
} else if (!strcmp(child->name, "stmpe_adc")) {
pdata->blocks |= STMPE_BLOCK_ADC;
} else if (!strcmp(child->name, "stmpe_pwm")) {
pdata->blocks |= STMPE_BLOCK_PWM;
} else if (!strcmp(child->name, "stmpe_rotator")) {
pdata->blocks |= STMPE_BLOCK_ROTATOR;
}
}
}
/* Called from client specific probe routines */
int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
{
struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
struct device_node *np = ci->dev->of_node;
struct stmpe *stmpe;
int ret;
if (!pdata)
return -EINVAL;
if (!pdata) {
if (!np)
return -EINVAL;
stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
stmpe_of_probe(pdata, np);
}
stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
if (!stmpe)
return -ENOMEM;
@ -1026,11 +1082,12 @@ int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
ci->init(stmpe);
if (pdata->irq_over_gpio) {
ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe");
ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
GPIOF_DIR_IN, "stmpe");
if (ret) {
dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
ret);
goto out_free;
return ret;
}
stmpe->irq = gpio_to_irq(pdata->irq_gpio);
@ -1047,51 +1104,40 @@ int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
dev_err(stmpe->dev,
"%s does not support no-irq mode!\n",
stmpe->variant->name);
ret = -ENODEV;
goto free_gpio;
return -ENODEV;
}
stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
} else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
pdata->irq_trigger =
irqd_get_trigger_type(irq_get_irq_data(stmpe->irq));
}
ret = stmpe_chip_init(stmpe);
if (ret)
goto free_gpio;
return ret;
if (stmpe->irq >= 0) {
ret = stmpe_irq_init(stmpe);
ret = stmpe_irq_init(stmpe, np);
if (ret)
goto free_gpio;
return ret;
ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq,
pdata->irq_trigger | IRQF_ONESHOT,
ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
"stmpe", stmpe);
if (ret) {
dev_err(stmpe->dev, "failed to request IRQ: %d\n",
ret);
goto out_removeirq;
return ret;
}
}
ret = stmpe_devices_init(stmpe);
if (ret) {
dev_err(stmpe->dev, "failed to add children\n");
goto out_removedevs;
}
if (!ret)
return 0;
return 0;
out_removedevs:
dev_err(stmpe->dev, "failed to add children\n");
mfd_remove_devices(stmpe->dev);
if (stmpe->irq >= 0)
free_irq(stmpe->irq, stmpe);
out_removeirq:
if (stmpe->irq >= 0)
stmpe_irq_remove(stmpe);
free_gpio:
if (pdata->irq_over_gpio)
gpio_free(pdata->irq_gpio);
out_free:
kfree(stmpe);
return ret;
}
@ -1099,16 +1145,6 @@ int stmpe_remove(struct stmpe *stmpe)
{
mfd_remove_devices(stmpe->dev);
if (stmpe->irq >= 0) {
free_irq(stmpe->irq, stmpe);
stmpe_irq_remove(stmpe);
}
if (stmpe->pdata->irq_over_gpio)
gpio_free(stmpe->pdata->irq_gpio);
kfree(stmpe);
return 0;
}

274
drivers/mfd/ti_am335x_tscadc.c Normal file
View File

@ -0,0 +1,274 @@
/*
* TI Touch Screen / ADC MFD driver
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/pm_runtime.h>
#include <linux/mfd/ti_am335x_tscadc.h>
#include <linux/input/ti_am335x_tsc.h>
#include <linux/platform_data/ti_am335x_adc.h>
static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
{
unsigned int val;
regmap_read(tsadc->regmap_tscadc, reg, &val);
return val;
}
static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
unsigned int val)
{
regmap_write(tsadc->regmap_tscadc, reg, val);
}
static const struct regmap_config tscadc_regmap_config = {
.name = "ti_tscadc",
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
};
static void tscadc_idle_config(struct ti_tscadc_dev *config)
{
unsigned int idleconfig;
idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
tscadc_writel(config, REG_IDLECONFIG, idleconfig);
}
static int __devinit ti_tscadc_probe(struct platform_device *pdev)
{
struct ti_tscadc_dev *tscadc;
struct resource *res;
struct clk *clk;
struct mfd_tscadc_board *pdata = pdev->dev.platform_data;
struct mfd_cell *cell;
int err, ctrl;
int clk_value, clock_rate;
int tsc_wires, adc_channels = 0, total_channels;
if (!pdata) {
dev_err(&pdev->dev, "Could not find platform data\n");
return -EINVAL;
}
if (pdata->adc_init)
adc_channels = pdata->adc_init->adc_channels;
tsc_wires = pdata->tsc_init->wires;
total_channels = tsc_wires + adc_channels;
if (total_channels > 8) {
dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
return -EINVAL;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "no memory resource defined.\n");
return -EINVAL;
}
/* Allocate memory for device */
tscadc = devm_kzalloc(&pdev->dev,
sizeof(struct ti_tscadc_dev), GFP_KERNEL);
if (!tscadc) {
dev_err(&pdev->dev, "failed to allocate memory.\n");
return -ENOMEM;
}
tscadc->dev = &pdev->dev;
err = platform_get_irq(pdev, 0);
if (err < 0) {
dev_err(&pdev->dev, "no irq ID is specified.\n");
goto ret;
} else
tscadc->irq = err;
res = devm_request_mem_region(&pdev->dev,
res->start, resource_size(res), pdev->name);
if (!res) {
dev_err(&pdev->dev, "failed to reserve registers.\n");
return -EBUSY;
}
tscadc->tscadc_base = devm_ioremap(&pdev->dev,
res->start, resource_size(res));
if (!tscadc->tscadc_base) {
dev_err(&pdev->dev, "failed to map registers.\n");
return -ENOMEM;
}
tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
tscadc->tscadc_base, &tscadc_regmap_config);
if (IS_ERR(tscadc->regmap_tscadc)) {
dev_err(&pdev->dev, "regmap init failed\n");
err = PTR_ERR(tscadc->regmap_tscadc);
goto ret;
}
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
/*
* The TSC_ADC_Subsystem has 2 clock domains
* OCP_CLK and ADC_CLK.
* The ADC clock is expected to run at target of 3MHz,
* and expected to capture 12-bit data at a rate of 200 KSPS.
* The TSC_ADC_SS controller design assumes the OCP clock is
* at least 6x faster than the ADC clock.
*/
clk = clk_get(&pdev->dev, "adc_tsc_fck");
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "failed to get TSC fck\n");
err = PTR_ERR(clk);
goto err_disable_clk;
}
clock_rate = clk_get_rate(clk);
clk_put(clk);
clk_value = clock_rate / ADC_CLK;
if (clk_value < MAX_CLK_DIV) {
dev_err(&pdev->dev, "clock input less than min clock requirement\n");
err = -EINVAL;
goto err_disable_clk;
}
/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
clk_value = clk_value - 1;
tscadc_writel(tscadc, REG_CLKDIV, clk_value);
/* Set the control register bits */
ctrl = CNTRLREG_STEPCONFIGWRT |
CNTRLREG_TSCENB |
CNTRLREG_STEPID |
CNTRLREG_4WIRE;
tscadc_writel(tscadc, REG_CTRL, ctrl);
/* Set register bits for Idle Config Mode */
tscadc_idle_config(tscadc);
/* Enable the TSC module enable bit */
ctrl = tscadc_readl(tscadc, REG_CTRL);
ctrl |= CNTRLREG_TSCSSENB;
tscadc_writel(tscadc, REG_CTRL, ctrl);
/* TSC Cell */
cell = &tscadc->cells[TSC_CELL];
cell->name = "tsc";
cell->platform_data = tscadc;
cell->pdata_size = sizeof(*tscadc);
/* ADC Cell */
cell = &tscadc->cells[ADC_CELL];
cell->name = "tiadc";
cell->platform_data = tscadc;
cell->pdata_size = sizeof(*tscadc);
err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
TSCADC_CELLS, NULL, 0, NULL);
if (err < 0)
goto err_disable_clk;
device_init_wakeup(&pdev->dev, true);
platform_set_drvdata(pdev, tscadc);
return 0;
err_disable_clk:
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
ret:
return err;
}
static int __devexit ti_tscadc_remove(struct platform_device *pdev)
{
struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
tscadc_writel(tscadc, REG_SE, 0x00);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
mfd_remove_devices(tscadc->dev);
return 0;
}
#ifdef CONFIG_PM
static int tscadc_suspend(struct device *dev)
{
struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
tscadc_writel(tscadc_dev, REG_SE, 0x00);
pm_runtime_put_sync(dev);
return 0;
}
static int tscadc_resume(struct device *dev)
{
struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
unsigned int restore, ctrl;
pm_runtime_get_sync(dev);
/* context restore */
ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
CNTRLREG_STEPID | CNTRLREG_4WIRE;
tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
tscadc_idle_config(tscadc_dev);
tscadc_writel(tscadc_dev, REG_SE, STPENB_STEPENB);
restore = tscadc_readl(tscadc_dev, REG_CTRL);
tscadc_writel(tscadc_dev, REG_CTRL,
(restore | CNTRLREG_TSCSSENB));
return 0;
}
static const struct dev_pm_ops tscadc_pm_ops = {
.suspend = tscadc_suspend,
.resume = tscadc_resume,
};
#define TSCADC_PM_OPS (&tscadc_pm_ops)
#else
#define TSCADC_PM_OPS NULL
#endif
static struct platform_driver ti_tscadc_driver = {
.driver = {
.name = "ti_tscadc",
.owner = THIS_MODULE,
.pm = TSCADC_PM_OPS,
},
.probe = ti_tscadc_probe,
.remove = __devexit_p(ti_tscadc_remove),
};
module_platform_driver(ti_tscadc_driver);
MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");

21
drivers/mfd/tps6507x.c
View File

@ -86,9 +86,9 @@ static int tps6507x_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct tps6507x_dev *tps6507x;
int ret = 0;
tps6507x = kzalloc(sizeof(struct tps6507x_dev), GFP_KERNEL);
tps6507x = devm_kzalloc(&i2c->dev, sizeof(struct tps6507x_dev),
GFP_KERNEL);
if (tps6507x == NULL)
return -ENOMEM;
@ -98,19 +98,8 @@ static int tps6507x_i2c_probe(struct i2c_client *i2c,
tps6507x->read_dev = tps6507x_i2c_read_device;
tps6507x->write_dev = tps6507x_i2c_write_device;
ret = mfd_add_devices(tps6507x->dev, -1,
tps6507x_devs, ARRAY_SIZE(tps6507x_devs),
NULL, 0, NULL);
if (ret < 0)
goto err;
return ret;
err:
mfd_remove_devices(tps6507x->dev);
kfree(tps6507x);
return ret;
return mfd_add_devices(tps6507x->dev, -1, tps6507x_devs,
ARRAY_SIZE(tps6507x_devs), NULL, 0, NULL);
}
static int tps6507x_i2c_remove(struct i2c_client *i2c)
@ -118,8 +107,6 @@ static int tps6507x_i2c_remove(struct i2c_client *i2c)
struct tps6507x_dev *tps6507x = i2c_get_clientdata(i2c);
mfd_remove_devices(tps6507x->dev);
kfree(tps6507x);
return 0;
}

312
drivers/mfd/tps65090.c
View File

@ -25,7 +25,6 @@
#include <linux/i2c.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tps65090.h>
#include <linux/regmap.h>
#include <linux/err.h>
#define NUM_INT_REG 2
@ -39,204 +38,102 @@
#define TPS65090_INT_MSK 0x2
#define TPS65090_INT_MSK2 0x3
struct tps65090_irq_data {
u8 mask_reg;
u8 mask_pos;
};
#define TPS65090_IRQ(_reg, _mask_pos) \
{ \
.mask_reg = (_reg), \
.mask_pos = (_mask_pos), \
}
static const struct tps65090_irq_data tps65090_irqs[] = {
[0] = TPS65090_IRQ(0, 0),
[1] = TPS65090_IRQ(0, 1),
[2] = TPS65090_IRQ(0, 2),
[3] = TPS65090_IRQ(0, 3),
[4] = TPS65090_IRQ(0, 4),
[5] = TPS65090_IRQ(0, 5),
[6] = TPS65090_IRQ(0, 6),
[7] = TPS65090_IRQ(0, 7),
[8] = TPS65090_IRQ(1, 0),
[9] = TPS65090_IRQ(1, 1),
[10] = TPS65090_IRQ(1, 2),
[11] = TPS65090_IRQ(1, 3),
[12] = TPS65090_IRQ(1, 4),
[13] = TPS65090_IRQ(1, 5),
[14] = TPS65090_IRQ(1, 6),
[15] = TPS65090_IRQ(1, 7),
};
#define TPS65090_INT1_MASK_VAC_STATUS_CHANGE 1
#define TPS65090_INT1_MASK_VSYS_STATUS_CHANGE 2
#define TPS65090_INT1_MASK_BAT_STATUS_CHANGE 3
#define TPS65090_INT1_MASK_CHARGING_STATUS_CHANGE 4
#define TPS65090_INT1_MASK_CHARGING_COMPLETE 5
#define TPS65090_INT1_MASK_OVERLOAD_DCDC1 6
#define TPS65090_INT1_MASK_OVERLOAD_DCDC2 7
#define TPS65090_INT2_MASK_OVERLOAD_DCDC3 0
#define TPS65090_INT2_MASK_OVERLOAD_FET1 1
#define TPS65090_INT2_MASK_OVERLOAD_FET2 2
#define TPS65090_INT2_MASK_OVERLOAD_FET3 3
#define TPS65090_INT2_MASK_OVERLOAD_FET4 4
#define TPS65090_INT2_MASK_OVERLOAD_FET5 5
#define TPS65090_INT2_MASK_OVERLOAD_FET6 6
#define TPS65090_INT2_MASK_OVERLOAD_FET7 7
static struct mfd_cell tps65090s[] = {
{
.name = "tps65090-pmic",
},
{
.name = "tps65090-regulator",
.name = "tps65090-charger",
},
};
int tps65090_write(struct device *dev, int reg, uint8_t val)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_write(tps->rmap, reg, val);
}
EXPORT_SYMBOL_GPL(tps65090_write);
static const struct regmap_irq tps65090_irqs[] = {
/* INT1 IRQs*/
[TPS65090_IRQ_VAC_STATUS_CHANGE] = {
.mask = TPS65090_INT1_MASK_VAC_STATUS_CHANGE,
},
[TPS65090_IRQ_VSYS_STATUS_CHANGE] = {
.mask = TPS65090_INT1_MASK_VSYS_STATUS_CHANGE,
},
[TPS65090_IRQ_BAT_STATUS_CHANGE] = {
.mask = TPS65090_INT1_MASK_BAT_STATUS_CHANGE,
},
[TPS65090_IRQ_CHARGING_STATUS_CHANGE] = {
.mask = TPS65090_INT1_MASK_CHARGING_STATUS_CHANGE,
},
[TPS65090_IRQ_CHARGING_COMPLETE] = {
.mask = TPS65090_INT1_MASK_CHARGING_COMPLETE,
},
[TPS65090_IRQ_OVERLOAD_DCDC1] = {
.mask = TPS65090_INT1_MASK_OVERLOAD_DCDC1,
},
[TPS65090_IRQ_OVERLOAD_DCDC2] = {
.mask = TPS65090_INT1_MASK_OVERLOAD_DCDC2,
},
/* INT2 IRQs*/
[TPS65090_IRQ_OVERLOAD_DCDC3] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_DCDC3,
},
[TPS65090_IRQ_OVERLOAD_FET1] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET1,
},
[TPS65090_IRQ_OVERLOAD_FET2] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET2,
},
[TPS65090_IRQ_OVERLOAD_FET3] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET3,
},
[TPS65090_IRQ_OVERLOAD_FET4] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET4,
},
[TPS65090_IRQ_OVERLOAD_FET5] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET5,
},
[TPS65090_IRQ_OVERLOAD_FET6] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET6,
},
[TPS65090_IRQ_OVERLOAD_FET7] = {
.reg_offset = 1,
.mask = TPS65090_INT2_MASK_OVERLOAD_FET7,
},
};
int tps65090_read(struct device *dev, int reg, uint8_t *val)
{
struct tps65090 *tps = dev_get_drvdata(dev);
unsigned int temp_val;
int ret;
ret = regmap_read(tps->rmap, reg, &temp_val);
if (!ret)
*val = temp_val;
return ret;
}
EXPORT_SYMBOL_GPL(tps65090_read);
int tps65090_set_bits(struct device *dev, int reg, uint8_t bit_num)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
}
EXPORT_SYMBOL_GPL(tps65090_set_bits);
int tps65090_clr_bits(struct device *dev, int reg, uint8_t bit_num)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
}
EXPORT_SYMBOL_GPL(tps65090_clr_bits);
static void tps65090_irq_lock(struct irq_data *data)
{
struct tps65090 *tps65090 = irq_data_get_irq_chip_data(data);
mutex_lock(&tps65090->irq_lock);
}
static void tps65090_irq_mask(struct irq_data *irq_data)
{
struct tps65090 *tps65090 = irq_data_get_irq_chip_data(irq_data);
unsigned int __irq = irq_data->hwirq;
const struct tps65090_irq_data *data = &tps65090_irqs[__irq];
tps65090_set_bits(tps65090->dev, (TPS65090_INT_MSK + data->mask_reg),
data->mask_pos);
}
static void tps65090_irq_unmask(struct irq_data *irq_data)
{
struct tps65090 *tps65090 = irq_data_get_irq_chip_data(irq_data);
unsigned int __irq = irq_data->irq - tps65090->irq_base;
const struct tps65090_irq_data *data = &tps65090_irqs[__irq];
tps65090_clr_bits(tps65090->dev, (TPS65090_INT_MSK + data->mask_reg),
data->mask_pos);
}
static void tps65090_irq_sync_unlock(struct irq_data *data)
{
struct tps65090 *tps65090 = irq_data_get_irq_chip_data(data);
mutex_unlock(&tps65090->irq_lock);
}
static irqreturn_t tps65090_irq(int irq, void *data)
{
struct tps65090 *tps65090 = data;
int ret = 0;
u8 status, mask;
unsigned long int acks = 0;
int i;
for (i = 0; i < NUM_INT_REG; i++) {
ret = tps65090_read(tps65090->dev, TPS65090_INT_MSK + i, &mask);
if (ret < 0) {
dev_err(tps65090->dev,
"failed to read mask reg [addr:%d]\n",
TPS65090_INT_MSK + i);
return IRQ_NONE;
}
ret = tps65090_read(tps65090->dev, TPS65090_INT_STS + i,
&status);
if (ret < 0) {
dev_err(tps65090->dev,
"failed to read status reg [addr:%d]\n",
TPS65090_INT_STS + i);
return IRQ_NONE;
}
if (status) {
/* Ack only those interrupts which are not masked */
status &= (~mask);
ret = tps65090_write(tps65090->dev,
TPS65090_INT_STS + i, status);
if (ret < 0) {
dev_err(tps65090->dev,
"failed to write interrupt status\n");
return IRQ_NONE;
}
acks |= (status << (i * 8));
}
}
for_each_set_bit(i, &acks, ARRAY_SIZE(tps65090_irqs))
handle_nested_irq(tps65090->irq_base + i);
return acks ? IRQ_HANDLED : IRQ_NONE;
}
static int tps65090_irq_init(struct tps65090 *tps65090, int irq,
int irq_base)
{
int i, ret;
if (!irq_base) {
dev_err(tps65090->dev, "IRQ base not set\n");
return -EINVAL;
}
mutex_init(&tps65090->irq_lock);
for (i = 0; i < NUM_INT_REG; i++)
tps65090_write(tps65090->dev, TPS65090_INT_MSK + i, 0xFF);
for (i = 0; i < NUM_INT_REG; i++)
tps65090_write(tps65090->dev, TPS65090_INT_STS + i, 0xff);
tps65090->irq_base = irq_base;
tps65090->irq_chip.name = "tps65090";
tps65090->irq_chip.irq_mask = tps65090_irq_mask;
tps65090->irq_chip.irq_unmask = tps65090_irq_unmask;
tps65090->irq_chip.irq_bus_lock = tps65090_irq_lock;
tps65090->irq_chip.irq_bus_sync_unlock = tps65090_irq_sync_unlock;
for (i = 0; i < ARRAY_SIZE(tps65090_irqs); i++) {
int __irq = i + tps65090->irq_base;
irq_set_chip_data(__irq, tps65090);
irq_set_chip_and_handler(__irq, &tps65090->irq_chip,
handle_simple_irq);
irq_set_nested_thread(__irq, 1);
#ifdef CONFIG_ARM
set_irq_flags(__irq, IRQF_VALID);
#endif
}
ret = request_threaded_irq(irq, NULL, tps65090_irq, IRQF_ONESHOT,
"tps65090", tps65090);
if (!ret) {
device_init_wakeup(tps65090->dev, 1);
enable_irq_wake(irq);
}
return ret;
}
static struct regmap_irq_chip tps65090_irq_chip = {
.name = "tps65090",
.irqs = tps65090_irqs,
.num_irqs = ARRAY_SIZE(tps65090_irqs),
.num_regs = NUM_INT_REG,
.status_base = TPS65090_INT_STS,
.mask_base = TPS65090_INT_MSK,
.mask_invert = true,
};
static bool is_volatile_reg(struct device *dev, unsigned int reg)
{
if (reg == TPS65090_INT_STS)
if ((reg == TPS65090_INT_STS) || (reg == TPS65090_INT_STS2))
return true;
else
return false;
@ -263,36 +160,36 @@ static int tps65090_i2c_probe(struct i2c_client *client,
return -EINVAL;
}
tps65090 = devm_kzalloc(&client->dev, sizeof(struct tps65090),
GFP_KERNEL);
if (tps65090 == NULL)
tps65090 = devm_kzalloc(&client->dev, sizeof(*tps65090), GFP_KERNEL);
if (!tps65090) {
dev_err(&client->dev, "mem alloc for tps65090 failed\n");
return -ENOMEM;
}
tps65090->client = client;
tps65090->dev = &client->dev;
i2c_set_clientdata(client, tps65090);
mutex_init(&tps65090->lock);
if (client->irq) {
ret = tps65090_irq_init(tps65090, client->irq, pdata->irq_base);
if (ret) {
dev_err(&client->dev, "IRQ init failed with err: %d\n",
ret);
goto err_exit;
}
}
tps65090->rmap = devm_regmap_init_i2c(tps65090->client,
&tps65090_regmap_config);
tps65090->rmap = devm_regmap_init_i2c(client, &tps65090_regmap_config);
if (IS_ERR(tps65090->rmap)) {
ret = PTR_ERR(tps65090->rmap);
dev_err(&client->dev, "regmap_init failed with err: %d\n", ret);
goto err_irq_exit;
return ret;
}
if (client->irq) {
ret = regmap_add_irq_chip(tps65090->rmap, client->irq,
IRQF_ONESHOT | IRQF_TRIGGER_LOW, pdata->irq_base,
&tps65090_irq_chip, &tps65090->irq_data);
if (ret) {
dev_err(&client->dev,
"IRQ init failed with err: %d\n", ret);
return ret;
}
}
ret = mfd_add_devices(tps65090->dev, -1, tps65090s,
ARRAY_SIZE(tps65090s), NULL, 0, NULL);
ARRAY_SIZE(tps65090s), NULL,
regmap_irq_chip_get_base(tps65090->irq_data), NULL);
if (ret) {
dev_err(&client->dev, "add mfd devices failed with err: %d\n",
ret);
@ -303,8 +200,7 @@ static int tps65090_i2c_probe(struct i2c_client *client,
err_irq_exit:
if (client->irq)
free_irq(client->irq, tps65090);
err_exit:
regmap_del_irq_chip(client->irq, tps65090->irq_data);
return ret;
}
@ -314,7 +210,7 @@ static int tps65090_i2c_remove(struct i2c_client *client)
mfd_remove_devices(tps65090->dev);
if (client->irq)
free_irq(client->irq, tps65090);
regmap_del_irq_chip(client->irq, tps65090->irq_data);
return 0;
}

12
drivers/mfd/tps65217.c
View File

@ -160,6 +160,7 @@ static int tps65217_probe(struct i2c_client *client,
unsigned int version;
unsigned int chip_id = ids->driver_data;
const struct of_device_id *match;
bool status_off = false;
int ret;
if (client->dev.of_node) {
@ -170,6 +171,8 @@ static int tps65217_probe(struct i2c_client *client,
return -EINVAL;
}
chip_id = (unsigned int)match->data;
status_off = of_property_read_bool(client->dev.of_node,
"ti,pmic-shutdown-controller");
}
if (!chip_id) {
@ -207,6 +210,15 @@ static int tps65217_probe(struct i2c_client *client,
return ret;
}
/* Set the PMIC to shutdown on PWR_EN toggle */
if (status_off) {
ret = tps65217_set_bits(tps, TPS65217_REG_STATUS,
TPS65217_STATUS_OFF, TPS65217_STATUS_OFF,
TPS65217_PROTECT_NONE);
if (ret)
dev_warn(tps->dev, "unable to set the status OFF\n");
}
dev_info(tps->dev, "TPS65217 ID %#x version 1.%d\n",
(version & TPS65217_CHIPID_CHIP_MASK) >> 4,
version & TPS65217_CHIPID_REV_MASK);

103
drivers/mfd/tps6586x.c
View File

@ -17,12 +17,14 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
@ -92,6 +94,14 @@ static const struct tps6586x_irq_data tps6586x_irqs[] = {
[TPS6586X_INT_RTC_ALM2] = TPS6586X_IRQ(TPS6586X_INT_MASK4, 1 << 1),
};
static struct resource tps6586x_rtc_resources[] = {
{
.start = TPS6586X_INT_RTC_ALM1,
.end = TPS6586X_INT_RTC_ALM1,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell tps6586x_cell[] = {
{
.name = "tps6586x-gpio",
@ -101,6 +111,8 @@ static struct mfd_cell tps6586x_cell[] = {
},
{
.name = "tps6586x-rtc",
.num_resources = ARRAY_SIZE(tps6586x_rtc_resources),
.resources = &tps6586x_rtc_resources[0],
},
{
.name = "tps6586x-onkey",
@ -117,6 +129,7 @@ struct tps6586x {
int irq_base;
u32 irq_en;
u8 mask_reg[5];
struct irq_domain *irq_domain;
};
static inline struct tps6586x *dev_to_tps6586x(struct device *dev)
@ -185,6 +198,14 @@ int tps6586x_update(struct device *dev, int reg, uint8_t val, uint8_t mask)
}
EXPORT_SYMBOL_GPL(tps6586x_update);
int tps6586x_irq_get_virq(struct device *dev, int irq)
{
struct tps6586x *tps6586x = dev_to_tps6586x(dev);
return irq_create_mapping(tps6586x->irq_domain, irq);
}
EXPORT_SYMBOL_GPL(tps6586x_irq_get_virq);
static int __remove_subdev(struct device *dev, void *unused)
{
platform_device_unregister(to_platform_device(dev));
@ -206,7 +227,7 @@ static void tps6586x_irq_lock(struct irq_data *data)
static void tps6586x_irq_enable(struct irq_data *irq_data)
{
struct tps6586x *tps6586x = irq_data_get_irq_chip_data(irq_data);
unsigned int __irq = irq_data->irq - tps6586x->irq_base;
unsigned int __irq = irq_data->hwirq;
const struct tps6586x_irq_data *data = &tps6586x_irqs[__irq];
tps6586x->mask_reg[data->mask_reg] &= ~data->mask_mask;
@ -217,7 +238,7 @@ static void tps6586x_irq_disable(struct irq_data *irq_data)
{
struct tps6586x *tps6586x = irq_data_get_irq_chip_data(irq_data);
unsigned int __irq = irq_data->irq - tps6586x->irq_base;
unsigned int __irq = irq_data->hwirq;
const struct tps6586x_irq_data *data = &tps6586x_irqs[__irq];
tps6586x->mask_reg[data->mask_reg] |= data->mask_mask;
@ -240,6 +261,39 @@ static void tps6586x_irq_sync_unlock(struct irq_data *data)
mutex_unlock(&tps6586x->irq_lock);
}
static struct irq_chip tps6586x_irq_chip = {
.name = "tps6586x",
.irq_bus_lock = tps6586x_irq_lock,
.irq_bus_sync_unlock = tps6586x_irq_sync_unlock,
.irq_disable = tps6586x_irq_disable,
.irq_enable = tps6586x_irq_enable,
};
static int tps6586x_irq_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
struct tps6586x *tps6586x = h->host_data;
irq_set_chip_data(virq, tps6586x);
irq_set_chip_and_handler(virq, &tps6586x_irq_chip, handle_simple_irq);
irq_set_nested_thread(virq, 1);
/* ARM needs us to explicitly flag the IRQ as valid
* and will set them noprobe when we do so. */
#ifdef CONFIG_ARM
set_irq_flags(virq, IRQF_VALID);
#else
irq_set_noprobe(virq);
#endif
return 0;
}
static struct irq_domain_ops tps6586x_domain_ops = {
.map = tps6586x_irq_map,
.xlate = irq_domain_xlate_twocell,
};
static irqreturn_t tps6586x_irq(int irq, void *data)
{
struct tps6586x *tps6586x = data;
@ -260,7 +314,8 @@ static irqreturn_t tps6586x_irq(int irq, void *data)
int i = __ffs(acks);
if (tps6586x->irq_en & (1 << i))
handle_nested_irq(tps6586x->irq_base + i);
handle_nested_irq(
irq_find_mapping(tps6586x->irq_domain, i));
acks &= ~(1 << i);
}
@ -273,11 +328,8 @@ static int tps6586x_irq_init(struct tps6586x *tps6586x, int irq,
{
int i, ret;
u8 tmp[4];
if (!irq_base) {
dev_warn(tps6586x->dev, "No interrupt support on IRQ base\n");
return -EINVAL;
}
int new_irq_base;
int irq_num = ARRAY_SIZE(tps6586x_irqs);
mutex_init(&tps6586x->irq_lock);
for (i = 0; i < 5; i++) {
@ -287,25 +339,24 @@ static int tps6586x_irq_init(struct tps6586x *tps6586x, int irq,
tps6586x_reads(tps6586x->dev, TPS6586X_INT_ACK1, sizeof(tmp), tmp);
tps6586x->irq_base = irq_base;
tps6586x->irq_chip.name = "tps6586x";
tps6586x->irq_chip.irq_enable = tps6586x_irq_enable;
tps6586x->irq_chip.irq_disable = tps6586x_irq_disable;
tps6586x->irq_chip.irq_bus_lock = tps6586x_irq_lock;
tps6586x->irq_chip.irq_bus_sync_unlock = tps6586x_irq_sync_unlock;
for (i = 0; i < ARRAY_SIZE(tps6586x_irqs); i++) {
int __irq = i + tps6586x->irq_base;
irq_set_chip_data(__irq, tps6586x);
irq_set_chip_and_handler(__irq, &tps6586x->irq_chip,
handle_simple_irq);
irq_set_nested_thread(__irq, 1);
#ifdef CONFIG_ARM
set_irq_flags(__irq, IRQF_VALID);
#endif
if (irq_base > 0) {
new_irq_base = irq_alloc_descs(irq_base, 0, irq_num, -1);
if (new_irq_base < 0) {
dev_err(tps6586x->dev,
"Failed to alloc IRQs: %d\n", new_irq_base);
return new_irq_base;
}
} else {
new_irq_base = 0;
}
tps6586x->irq_domain = irq_domain_add_simple(tps6586x->dev->of_node,
irq_num, new_irq_base, &tps6586x_domain_ops,
tps6586x);
if (!tps6586x->irq_domain) {
dev_err(tps6586x->dev, "Failed to create IRQ domain\n");
return -ENOMEM;
}
ret = request_threaded_irq(irq, NULL, tps6586x_irq, IRQF_ONESHOT,
"tps6586x", tps6586x);
@ -461,7 +512,7 @@ static int tps6586x_i2c_probe(struct i2c_client *client,
ret = mfd_add_devices(tps6586x->dev, -1,
tps6586x_cell, ARRAY_SIZE(tps6586x_cell),
NULL, 0, NULL);
NULL, 0, tps6586x->irq_domain);
if (ret < 0) {
dev_err(&client->dev, "mfd_add_devices failed: %d\n", ret);
goto err_mfd_add;

260
drivers/mfd/tps65910-irq.c
View File

@ -1,260 +0,0 @@
/*
* tps65910-irq.c -- TI TPS6591x
*
* Copyright 2010 Texas Instruments Inc.
*
* Author: Graeme Gregory <gg@slimlogic.co.uk>
* Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/gpio.h>
#include <linux/mfd/tps65910.h>
/*
* This is a threaded IRQ handler so can access I2C/SPI. Since all
* interrupts are clear on read the IRQ line will be reasserted and
* the physical IRQ will be handled again if another interrupt is
* asserted while we run - in the normal course of events this is a
* rare occurrence so we save I2C/SPI reads. We're also assuming that
* it's rare to get lots of interrupts firing simultaneously so try to
* minimise I/O.
*/
static irqreturn_t tps65910_irq(int irq, void *irq_data)
{
struct tps65910 *tps65910 = irq_data;
unsigned int reg;
u32 irq_sts;
u32 irq_mask;
int i;
tps65910_reg_read(tps65910, TPS65910_INT_STS, &reg);
irq_sts = reg;
tps65910_reg_read(tps65910, TPS65910_INT_STS2, &reg);
irq_sts |= reg << 8;
switch (tps65910_chip_id(tps65910)) {
case TPS65911:
tps65910_reg_read(tps65910, TPS65910_INT_STS3, &reg);
irq_sts |= reg << 16;
}
tps65910_reg_read(tps65910, TPS65910_INT_MSK, &reg);
irq_mask = reg;
tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &reg);
irq_mask |= reg << 8;
switch (tps65910_chip_id(tps65910)) {
case TPS65911:
tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &reg);
irq_mask |= reg << 16;
}
irq_sts &= ~irq_mask;
if (!irq_sts)
return IRQ_NONE;
for (i = 0; i < tps65910->irq_num; i++) {
if (!(irq_sts & (1 << i)))
continue;
handle_nested_irq(irq_find_mapping(tps65910->domain, i));
}
/* Write the STS register back to clear IRQs we handled */
reg = irq_sts & 0xFF;
irq_sts >>= 8;
tps65910_reg_write(tps65910, TPS65910_INT_STS, reg);
reg = irq_sts & 0xFF;
tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg);
switch (tps65910_chip_id(tps65910)) {
case TPS65911:
reg = irq_sts >> 8;
tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg);
}
return IRQ_HANDLED;
}
static void tps65910_irq_lock(struct irq_data *data)
{
struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
mutex_lock(&tps65910->irq_lock);
}
static void tps65910_irq_sync_unlock(struct irq_data *data)
{
struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
u32 reg_mask;
unsigned int reg;
tps65910_reg_read(tps65910, TPS65910_INT_MSK, &reg);
reg_mask = reg;
tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &reg);
reg_mask |= reg << 8;
switch (tps65910_chip_id(tps65910)) {
case TPS65911:
tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &reg);
reg_mask |= reg << 16;
}
if (tps65910->irq_mask != reg_mask) {
reg = tps65910->irq_mask & 0xFF;
tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg);
reg = tps65910->irq_mask >> 8 & 0xFF;
tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg);
switch (tps65910_chip_id(tps65910)) {
case TPS65911:
reg = tps65910->irq_mask >> 16;
tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg);
}
}
mutex_unlock(&tps65910->irq_lock);
}
static void tps65910_irq_enable(struct irq_data *data)
{
struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
tps65910->irq_mask &= ~(1 << data->hwirq);
}
static void tps65910_irq_disable(struct irq_data *data)
{
struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
tps65910->irq_mask |= (1 << data->hwirq);
}
#ifdef CONFIG_PM_SLEEP
static int tps65910_irq_set_wake(struct irq_data *data, unsigned int enable)
{
struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
return irq_set_irq_wake(tps65910->chip_irq, enable);
}
#else
#define tps65910_irq_set_wake NULL
#endif
static struct irq_chip tps65910_irq_chip = {
.name = "tps65910",
.irq_bus_lock = tps65910_irq_lock,
.irq_bus_sync_unlock = tps65910_irq_sync_unlock,
.irq_disable = tps65910_irq_disable,
.irq_enable = tps65910_irq_enable,
.irq_set_wake = tps65910_irq_set_wake,
};
static int tps65910_irq_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
struct tps65910 *tps65910 = h->host_data;
irq_set_chip_data(virq, tps65910);
irq_set_chip_and_handler(virq, &tps65910_irq_chip, handle_edge_irq);
irq_set_nested_thread(virq, 1);
/* ARM needs us to explicitly flag the IRQ as valid
* and will set them noprobe when we do so. */
#ifdef CONFIG_ARM
set_irq_flags(virq, IRQF_VALID);
#else
irq_set_noprobe(virq);
#endif
return 0;
}
static struct irq_domain_ops tps65910_domain_ops = {
.map = tps65910_irq_map,
.xlate = irq_domain_xlate_twocell,
};
int tps65910_irq_init(struct tps65910 *tps65910, int irq,
struct tps65910_platform_data *pdata)
{
int ret;
int flags = IRQF_ONESHOT;
if (!irq) {
dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
return -EINVAL;
}
if (!pdata) {
dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
return -EINVAL;
}
switch (tps65910_chip_id(tps65910)) {
case TPS65910:
tps65910->irq_num = TPS65910_NUM_IRQ;
break;
case TPS65911:
tps65910->irq_num = TPS65911_NUM_IRQ;
break;
}
if (pdata->irq_base > 0) {
pdata->irq_base = irq_alloc_descs(pdata->irq_base, 0,
tps65910->irq_num, -1);
if (pdata->irq_base < 0) {
dev_warn(tps65910->dev, "Failed to alloc IRQs: %d\n",
pdata->irq_base);
return pdata->irq_base;
}
}
tps65910->irq_mask = 0xFFFFFF;
mutex_init(&tps65910->irq_lock);
tps65910->chip_irq = irq;
tps65910->irq_base = pdata->irq_base;
if (pdata->irq_base > 0)
tps65910->domain = irq_domain_add_legacy(tps65910->dev->of_node,
tps65910->irq_num,
pdata->irq_base,
0,
&tps65910_domain_ops, tps65910);
else
tps65910->domain = irq_domain_add_linear(tps65910->dev->of_node,
tps65910->irq_num,
&tps65910_domain_ops, tps65910);
if (!tps65910->domain) {
dev_err(tps65910->dev, "Failed to create IRQ domain\n");
return -ENOMEM;
}
ret = request_threaded_irq(irq, NULL, tps65910_irq, flags,
"tps65910", tps65910);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
if (ret != 0)
dev_err(tps65910->dev, "Failed to request IRQ: %d\n", ret);
return ret;
}
int tps65910_irq_exit(struct tps65910 *tps65910)
{
if (tps65910->chip_irq)
free_irq(tps65910->chip_irq, tps65910);
return 0;
}

234
drivers/mfd/tps65910.c
View File

@ -19,6 +19,9 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/mfd/core.h>
#include <linux/regmap.h>
#include <linux/mfd/tps65910.h>
@ -50,6 +53,219 @@ static struct mfd_cell tps65910s[] = {
};
static const struct regmap_irq tps65911_irqs[] = {
/* INT_STS */
[TPS65911_IRQ_PWRHOLD_F] = {
.mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_VBAT_VMHI] = {
.mask = INT_MSK_VMBHI_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_PWRON] = {
.mask = INT_MSK_PWRON_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_PWRON_LP] = {
.mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_PWRHOLD_R] = {
.mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_HOTDIE] = {
.mask = INT_MSK_HOTDIE_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_RTC_ALARM] = {
.mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65911_IRQ_RTC_PERIOD] = {
.mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
.reg_offset = 0,
},
/* INT_STS2 */
[TPS65911_IRQ_GPIO0_R] = {
.mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO0_F] = {
.mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO1_R] = {
.mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO1_F] = {
.mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO2_R] = {
.mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO2_F] = {
.mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO3_R] = {
.mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65911_IRQ_GPIO3_F] = {
.mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
.reg_offset = 1,
},
/* INT_STS2 */
[TPS65911_IRQ_GPIO4_R] = {
.mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_GPIO4_F] = {
.mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_GPIO5_R] = {
.mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_GPIO5_F] = {
.mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_WTCHDG] = {
.mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_VMBCH2_H] = {
.mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_VMBCH2_L] = {
.mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
.reg_offset = 2,
},
[TPS65911_IRQ_PWRDN] = {
.mask = INT_MSK3_PWRDN_IT_MSK_MASK,
.reg_offset = 2,
},
};
static const struct regmap_irq tps65910_irqs[] = {
/* INT_STS */
[TPS65910_IRQ_VBAT_VMBDCH] = {
.mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_VBAT_VMHI] = {
.mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_PWRON] = {
.mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_PWRON_LP] = {
.mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_PWRHOLD] = {
.mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_HOTDIE] = {
.mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_RTC_ALARM] = {
.mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
.reg_offset = 0,
},
[TPS65910_IRQ_RTC_PERIOD] = {
.mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
.reg_offset = 0,
},
/* INT_STS2 */
[TPS65910_IRQ_GPIO_R] = {
.mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
.reg_offset = 1,
},
[TPS65910_IRQ_GPIO_F] = {
.mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
.reg_offset = 1,
},
};
static struct regmap_irq_chip tps65911_irq_chip = {
.name = "tps65910",
.irqs = tps65911_irqs,
.num_irqs = ARRAY_SIZE(tps65911_irqs),
.num_regs = 3,
.irq_reg_stride = 2,
.status_base = TPS65910_INT_STS,
.mask_base = TPS65910_INT_MSK,
.ack_base = TPS65910_INT_STS,
};
static struct regmap_irq_chip tps65910_irq_chip = {
.name = "tps65910",
.irqs = tps65910_irqs,
.num_irqs = ARRAY_SIZE(tps65910_irqs),
.num_regs = 2,
.irq_reg_stride = 2,
.status_base = TPS65910_INT_STS,
.mask_base = TPS65910_INT_MSK,
.ack_base = TPS65910_INT_STS,
};
static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
struct tps65910_platform_data *pdata)
{
int ret = 0;
static struct regmap_irq_chip *tps6591x_irqs_chip;
if (!irq) {
dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
return -EINVAL;
}
if (!pdata) {
dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
return -EINVAL;
}
switch (tps65910_chip_id(tps65910)) {
case TPS65910:
tps6591x_irqs_chip = &tps65910_irq_chip;
break;
case TPS65911:
tps6591x_irqs_chip = &tps65911_irq_chip;
break;
}
tps65910->chip_irq = irq;
ret = regmap_add_irq_chip(tps65910->regmap, tps65910->chip_irq,
IRQF_ONESHOT, pdata->irq_base,
tps6591x_irqs_chip, &tps65910->irq_data);
if (ret < 0)
dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret);
return ret;
}
static int tps65910_irq_exit(struct tps65910 *tps65910)
{
if (tps65910->chip_irq > 0)
regmap_del_irq_chip(tps65910->chip_irq, tps65910->irq_data);
return 0;
}
static bool is_volatile_reg(struct device *dev, unsigned int reg)
{
struct tps65910 *tps65910 = dev_get_drvdata(dev);
@ -270,7 +486,6 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
tps65910->dev = &i2c->dev;
tps65910->i2c_client = i2c;
tps65910->id = chip_id;
mutex_init(&tps65910->io_mutex);
tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config);
if (IS_ERR(tps65910->regmap)) {
@ -279,14 +494,6 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
return ret;
}
ret = mfd_add_devices(tps65910->dev, -1,
tps65910s, ARRAY_SIZE(tps65910s),
NULL, 0, NULL);
if (ret < 0) {
dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
return ret;
}
init_data->irq = pmic_plat_data->irq;
init_data->irq_base = pmic_plat_data->irq_base;
@ -299,6 +506,15 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
pm_power_off = tps65910_power_off;
}
ret = mfd_add_devices(tps65910->dev, -1,
tps65910s, ARRAY_SIZE(tps65910s),
NULL, 0,
regmap_irq_get_domain(tps65910->irq_data));
if (ret < 0) {
dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
return ret;
}
return ret;
}

574
drivers/mfd/tps80031.c Normal file
View File

@ -0,0 +1,574 @@
/*
* tps80031.c -- TI TPS80031/TPS80032 mfd core driver.
*
* MFD core driver for TI TPS80031/TPS80032 Fully Integrated
* Power Management with Power Path and Battery Charger
*
* Copyright (c) 2012, NVIDIA Corporation.
*
* Author: Laxman Dewangan <ldewangan@nvidia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
* whether express or implied; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307, USA
*/
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tps80031.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/slab.h>
static struct resource tps80031_rtc_resources[] = {
{
.start = TPS80031_INT_RTC_ALARM,
.end = TPS80031_INT_RTC_ALARM,
.flags = IORESOURCE_IRQ,
},
};
/* TPS80031 sub mfd devices */
static struct mfd_cell tps80031_cell[] = {
{
.name = "tps80031-pmic",
},
{
.name = "tps80031-clock",
},
{
.name = "tps80031-rtc",
.num_resources = ARRAY_SIZE(tps80031_rtc_resources),
.resources = tps80031_rtc_resources,
},
{
.name = "tps80031-gpadc",
},
{
.name = "tps80031-fuel-gauge",
},
{
.name = "tps80031-charger",
},
};
static int tps80031_slave_address[TPS80031_NUM_SLAVES] = {
TPS80031_I2C_ID0_ADDR,
TPS80031_I2C_ID1_ADDR,
TPS80031_I2C_ID2_ADDR,
TPS80031_I2C_ID3_ADDR,
};
struct tps80031_pupd_data {
u8 reg;
u8 pullup_bit;
u8 pulldown_bit;
};
#define TPS80031_IRQ(_reg, _mask) \
{ \
.reg_offset = (TPS80031_INT_MSK_LINE_##_reg) - \
TPS80031_INT_MSK_LINE_A, \
.mask = BIT(_mask), \
}
static const struct regmap_irq tps80031_main_irqs[] = {
[TPS80031_INT_PWRON] = TPS80031_IRQ(A, 0),
[TPS80031_INT_RPWRON] = TPS80031_IRQ(A, 1),
[TPS80031_INT_SYS_VLOW] = TPS80031_IRQ(A, 2),
[TPS80031_INT_RTC_ALARM] = TPS80031_IRQ(A, 3),
[TPS80031_INT_RTC_PERIOD] = TPS80031_IRQ(A, 4),
[TPS80031_INT_HOT_DIE] = TPS80031_IRQ(A, 5),
[TPS80031_INT_VXX_SHORT] = TPS80031_IRQ(A, 6),
[TPS80031_INT_SPDURATION] = TPS80031_IRQ(A, 7),
[TPS80031_INT_WATCHDOG] = TPS80031_IRQ(B, 0),
[TPS80031_INT_BAT] = TPS80031_IRQ(B, 1),
[TPS80031_INT_SIM] = TPS80031_IRQ(B, 2),
[TPS80031_INT_MMC] = TPS80031_IRQ(B, 3),
[TPS80031_INT_RES] = TPS80031_IRQ(B, 4),
[TPS80031_INT_GPADC_RT] = TPS80031_IRQ(B, 5),
[TPS80031_INT_GPADC_SW2_EOC] = TPS80031_IRQ(B, 6),
[TPS80031_INT_CC_AUTOCAL] = TPS80031_IRQ(B, 7),
[TPS80031_INT_ID_WKUP] = TPS80031_IRQ(C, 0),
[TPS80031_INT_VBUSS_WKUP] = TPS80031_IRQ(C, 1),
[TPS80031_INT_ID] = TPS80031_IRQ(C, 2),
[TPS80031_INT_VBUS] = TPS80031_IRQ(C, 3),
[TPS80031_INT_CHRG_CTRL] = TPS80031_IRQ(C, 4),
[TPS80031_INT_EXT_CHRG] = TPS80031_IRQ(C, 5),
[TPS80031_INT_INT_CHRG] = TPS80031_IRQ(C, 6),
[TPS80031_INT_RES2] = TPS80031_IRQ(C, 7),
};
static struct regmap_irq_chip tps80031_irq_chip = {
.name = "tps80031",
.irqs = tps80031_main_irqs,
.num_irqs = ARRAY_SIZE(tps80031_main_irqs),
.num_regs = 3,
.status_base = TPS80031_INT_STS_A,
.mask_base = TPS80031_INT_MSK_LINE_A,
};
#define PUPD_DATA(_reg, _pulldown_bit, _pullup_bit) \
{ \
.reg = TPS80031_CFG_INPUT_PUPD##_reg, \
.pulldown_bit = _pulldown_bit, \
.pullup_bit = _pullup_bit, \
}
static const struct tps80031_pupd_data tps80031_pupds[] = {
[TPS80031_PREQ1] = PUPD_DATA(1, BIT(0), BIT(1)),
[TPS80031_PREQ2A] = PUPD_DATA(1, BIT(2), BIT(3)),
[TPS80031_PREQ2B] = PUPD_DATA(1, BIT(4), BIT(5)),
[TPS80031_PREQ2C] = PUPD_DATA(1, BIT(6), BIT(7)),
[TPS80031_PREQ3] = PUPD_DATA(2, BIT(0), BIT(1)),
[TPS80031_NRES_WARM] = PUPD_DATA(2, 0, BIT(2)),
[TPS80031_PWM_FORCE] = PUPD_DATA(2, BIT(5), 0),
[TPS80031_CHRG_EXT_CHRG_STATZ] = PUPD_DATA(2, 0, BIT(6)),
[TPS80031_SIM] = PUPD_DATA(3, BIT(0), BIT(1)),
[TPS80031_MMC] = PUPD_DATA(3, BIT(2), BIT(3)),
[TPS80031_GPADC_START] = PUPD_DATA(3, BIT(4), 0),
[TPS80031_DVSI2C_SCL] = PUPD_DATA(4, 0, BIT(0)),
[TPS80031_DVSI2C_SDA] = PUPD_DATA(4, 0, BIT(1)),
[TPS80031_CTLI2C_SCL] = PUPD_DATA(4, 0, BIT(2)),
[TPS80031_CTLI2C_SDA] = PUPD_DATA(4, 0, BIT(3)),
};
static struct tps80031 *tps80031_power_off_dev;
int tps80031_ext_power_req_config(struct device *dev,
unsigned long ext_ctrl_flag, int preq_bit,
int state_reg_add, int trans_reg_add)
{
u8 res_ass_reg = 0;
int preq_mask_bit = 0;
int ret;
if (!(ext_ctrl_flag & TPS80031_EXT_PWR_REQ))
return 0;
if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ1) {
res_ass_reg = TPS80031_PREQ1_RES_ASS_A + (preq_bit >> 3);
preq_mask_bit = 5;
} else if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ2) {
res_ass_reg = TPS80031_PREQ2_RES_ASS_A + (preq_bit >> 3);
preq_mask_bit = 6;
} else if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ3) {
res_ass_reg = TPS80031_PREQ3_RES_ASS_A + (preq_bit >> 3);
preq_mask_bit = 7;
}
/* Configure REQ_ASS registers */
ret = tps80031_set_bits(dev, TPS80031_SLAVE_ID1, res_ass_reg,
BIT(preq_bit & 0x7));
if (ret < 0) {
dev_err(dev, "reg 0x%02x setbit failed, err = %d\n",
res_ass_reg, ret);
return ret;
}
/* Unmask the PREQ */
ret = tps80031_clr_bits(dev, TPS80031_SLAVE_ID1,
TPS80031_PHOENIX_MSK_TRANSITION, BIT(preq_mask_bit));
if (ret < 0) {
dev_err(dev, "reg 0x%02x clrbit failed, err = %d\n",
TPS80031_PHOENIX_MSK_TRANSITION, ret);
return ret;
}
/* Switch regulator control to resource now */
if (ext_ctrl_flag & (TPS80031_PWR_REQ_INPUT_PREQ2 |
TPS80031_PWR_REQ_INPUT_PREQ3)) {
ret = tps80031_update(dev, TPS80031_SLAVE_ID1, state_reg_add,
0x0, TPS80031_STATE_MASK);
if (ret < 0)
dev_err(dev, "reg 0x%02x update failed, err = %d\n",
state_reg_add, ret);
} else {
ret = tps80031_update(dev, TPS80031_SLAVE_ID1, trans_reg_add,
TPS80031_TRANS_SLEEP_OFF,
TPS80031_TRANS_SLEEP_MASK);
if (ret < 0)
dev_err(dev, "reg 0x%02x update failed, err = %d\n",
trans_reg_add, ret);
}
return ret;
}
EXPORT_SYMBOL_GPL(tps80031_ext_power_req_config);
static void tps80031_power_off(void)
{
dev_info(tps80031_power_off_dev->dev, "switching off PMU\n");
tps80031_write(tps80031_power_off_dev->dev, TPS80031_SLAVE_ID1,
TPS80031_PHOENIX_DEV_ON, TPS80031_DEVOFF);
}
static void tps80031_pupd_init(struct tps80031 *tps80031,
struct tps80031_platform_data *pdata)
{
struct tps80031_pupd_init_data *pupd_init_data = pdata->pupd_init_data;
int data_size = pdata->pupd_init_data_size;
int i;
for (i = 0; i < data_size; ++i) {
struct tps80031_pupd_init_data *pupd_init = &pupd_init_data[i];
const struct tps80031_pupd_data *pupd =
&tps80031_pupds[pupd_init->input_pin];
u8 update_value = 0;
u8 update_mask = pupd->pulldown_bit | pupd->pullup_bit;
if (pupd_init->setting == TPS80031_PUPD_PULLDOWN)
update_value = pupd->pulldown_bit;
else if (pupd_init->setting == TPS80031_PUPD_PULLUP)
update_value = pupd->pullup_bit;
tps80031_update(tps80031->dev, TPS80031_SLAVE_ID1, pupd->reg,
update_value, update_mask);
}
}
static int tps80031_init_ext_control(struct tps80031 *tps80031,
struct tps80031_platform_data *pdata)
{
struct device *dev = tps80031->dev;
int ret;
int i;
/* Clear all external control for this rail */
for (i = 0; i < 9; ++i) {
ret = tps80031_write(dev, TPS80031_SLAVE_ID1,
TPS80031_PREQ1_RES_ASS_A + i, 0);
if (ret < 0) {
dev_err(dev, "reg 0x%02x write failed, err = %d\n",
TPS80031_PREQ1_RES_ASS_A + i, ret);
return ret;
}
}
/* Mask the PREQ */
ret = tps80031_set_bits(dev, TPS80031_SLAVE_ID1,
TPS80031_PHOENIX_MSK_TRANSITION, 0x7 << 5);
if (ret < 0) {
dev_err(dev, "reg 0x%02x set_bits failed, err = %d\n",
TPS80031_PHOENIX_MSK_TRANSITION, ret);
return ret;
}
return ret;
}
static int __devinit tps80031_irq_init(struct tps80031 *tps80031, int irq,
int irq_base)
{
struct device *dev = tps80031->dev;
int i, ret;
/*
* The MASK register used for updating status register when
* interrupt occurs and LINE register used to pass the status
* to actual interrupt line. As per datasheet:
* When INT_MSK_LINE [i] is set to 1, the associated interrupt
* number i is INT line masked, which means that no interrupt is
* generated on the INT line.
* When INT_MSK_LINE [i] is set to 0, the associated interrupt
* number i is line enabled: An interrupt is generated on the
* INT line.
* In any case, the INT_STS [i] status bit may or may not be updated,
* only linked to the INT_MSK_STS [i] configuration register bit.
*
* When INT_MSK_STS [i] is set to 1, the associated interrupt number
* i is status masked, which means that no interrupt is stored in
* the INT_STS[i] status bit. Note that no interrupt number i is
* generated on the INT line, even if the INT_MSK_LINE [i] register
* bit is set to 0.
* When INT_MSK_STS [i] is set to 0, the associated interrupt number i
* is status enabled: An interrupt status is updated in the INT_STS [i]
* register. The interrupt may or may not be generated on the INT line,
* depending on the INT_MSK_LINE [i] configuration register bit.
*/
for (i = 0; i < 3; i++)
tps80031_write(dev, TPS80031_SLAVE_ID2,
TPS80031_INT_MSK_STS_A + i, 0x00);
ret = regmap_add_irq_chip(tps80031->regmap[TPS80031_SLAVE_ID2], irq,
IRQF_ONESHOT, irq_base,
&tps80031_irq_chip, &tps80031->irq_data);
if (ret < 0) {
dev_err(dev, "add irq failed, err = %d\n", ret);
return ret;
}
return ret;
}
static bool rd_wr_reg_id0(struct device *dev, unsigned int reg)
{
switch (reg) {
case TPS80031_SMPS1_CFG_FORCE ... TPS80031_SMPS2_CFG_VOLTAGE:
return true;
default:
return false;
}
}
static bool rd_wr_reg_id1(struct device *dev, unsigned int reg)
{
switch (reg) {
case TPS80031_SECONDS_REG ... TPS80031_RTC_RESET_STATUS_REG:
case TPS80031_VALIDITY0 ... TPS80031_VALIDITY7:
case TPS80031_PHOENIX_START_CONDITION ... TPS80031_KEY_PRESS_DUR_CFG:
case TPS80031_SMPS4_CFG_TRANS ... TPS80031_SMPS3_CFG_VOLTAGE:
case TPS80031_BROADCAST_ADDR_ALL ... TPS80031_BROADCAST_ADDR_CLK_RST:
case TPS80031_VANA_CFG_TRANS ... TPS80031_LDO7_CFG_VOLTAGE:
case TPS80031_REGEN1_CFG_TRANS ... TPS80031_TMP_CFG_STATE:
case TPS80031_PREQ1_RES_ASS_A ... TPS80031_PREQ3_RES_ASS_C:
case TPS80031_SMPS_OFFSET ... TPS80031_BATDEBOUNCING:
case TPS80031_CFG_INPUT_PUPD1 ... TPS80031_CFG_SMPS_PD:
case TPS80031_BACKUP_REG:
return true;
default:
return false;
}
}
static bool is_volatile_reg_id1(struct device *dev, unsigned int reg)
{
switch (reg) {
case TPS80031_SMPS4_CFG_TRANS ... TPS80031_SMPS3_CFG_VOLTAGE:
case TPS80031_VANA_CFG_TRANS ... TPS80031_LDO7_CFG_VOLTAGE:
case TPS80031_REGEN1_CFG_TRANS ... TPS80031_TMP_CFG_STATE:
case TPS80031_PREQ1_RES_ASS_A ... TPS80031_PREQ3_RES_ASS_C:
case TPS80031_SMPS_OFFSET ... TPS80031_BATDEBOUNCING:
case TPS80031_CFG_INPUT_PUPD1 ... TPS80031_CFG_SMPS_PD:
return true;
default:
return false;
}
}
static bool rd_wr_reg_id2(struct device *dev, unsigned int reg)
{
switch (reg) {
case TPS80031_USB_VENDOR_ID_LSB ... TPS80031_USB_OTG_REVISION:
case TPS80031_GPADC_CTRL ... TPS80031_CTRL_P1:
case TPS80031_RTCH0_LSB ... TPS80031_GPCH0_MSB:
case TPS80031_TOGGLE1 ... TPS80031_VIBMODE:
case TPS80031_PWM1ON ... TPS80031_PWM2OFF:
case TPS80031_FG_REG_00 ... TPS80031_FG_REG_11:
case TPS80031_INT_STS_A ... TPS80031_INT_MSK_STS_C:
case TPS80031_CONTROLLER_CTRL2 ... TPS80031_LED_PWM_CTRL2:
return true;
default:
return false;
}
}
static bool rd_wr_reg_id3(struct device *dev, unsigned int reg)
{
switch (reg) {
case TPS80031_GPADC_TRIM0 ... TPS80031_GPADC_TRIM18:
return true;
default:
return false;
}
}
static const struct regmap_config tps80031_regmap_configs[] = {
{
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = rd_wr_reg_id0,
.readable_reg = rd_wr_reg_id0,
.max_register = TPS80031_MAX_REGISTER,
},
{
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = rd_wr_reg_id1,
.readable_reg = rd_wr_reg_id1,
.volatile_reg = is_volatile_reg_id1,
.max_register = TPS80031_MAX_REGISTER,
},
{
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = rd_wr_reg_id2,
.readable_reg = rd_wr_reg_id2,
.max_register = TPS80031_MAX_REGISTER,
},
{
.reg_bits = 8,
.val_bits = 8,
.writeable_reg = rd_wr_reg_id3,
.readable_reg = rd_wr_reg_id3,
.max_register = TPS80031_MAX_REGISTER,
},
};
static int __devinit tps80031_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct tps80031_platform_data *pdata = client->dev.platform_data;
struct tps80031 *tps80031;
int ret;
uint8_t es_version;
uint8_t ep_ver;
int i;
if (!pdata) {
dev_err(&client->dev, "tps80031 requires platform data\n");
return -EINVAL;
}
tps80031 = devm_kzalloc(&client->dev, sizeof(*tps80031), GFP_KERNEL);
if (!tps80031) {
dev_err(&client->dev, "Malloc failed for tps80031\n");
return -ENOMEM;
}
for (i = 0; i < TPS80031_NUM_SLAVES; i++) {
if (tps80031_slave_address[i] == client->addr)
tps80031->clients[i] = client;
else
tps80031->clients[i] = i2c_new_dummy(client->adapter,
tps80031_slave_address[i]);
if (!tps80031->clients[i]) {
dev_err(&client->dev, "can't attach client %d\n", i);
ret = -ENOMEM;
goto fail_client_reg;
}
i2c_set_clientdata(tps80031->clients[i], tps80031);
tps80031->regmap[i] = devm_regmap_init_i2c(tps80031->clients[i],
&tps80031_regmap_configs[i]);
if (IS_ERR(tps80031->regmap[i])) {
ret = PTR_ERR(tps80031->regmap[i]);
dev_err(&client->dev,
"regmap %d init failed, err %d\n", i, ret);
goto fail_client_reg;
}
}
ret = tps80031_read(&client->dev, TPS80031_SLAVE_ID3,
TPS80031_JTAGVERNUM, &es_version);
if (ret < 0) {
dev_err(&client->dev,
"Silicon version number read failed: %d\n", ret);
goto fail_client_reg;
}
ret = tps80031_read(&client->dev, TPS80031_SLAVE_ID3,
TPS80031_EPROM_REV, &ep_ver);
if (ret < 0) {
dev_err(&client->dev,
"Silicon eeprom version read failed: %d\n", ret);
goto fail_client_reg;
}
dev_info(&client->dev, "ES version 0x%02x and EPROM version 0x%02x\n",
es_version, ep_ver);
tps80031->es_version = es_version;
tps80031->dev = &client->dev;
i2c_set_clientdata(client, tps80031);
tps80031->chip_info = id->driver_data;
ret = tps80031_irq_init(tps80031, client->irq, pdata->irq_base);
if (ret) {
dev_err(&client->dev, "IRQ init failed: %d\n", ret);
goto fail_client_reg;
}
tps80031_pupd_init(tps80031, pdata);
tps80031_init_ext_control(tps80031, pdata);
ret = mfd_add_devices(tps80031->dev, -1,
tps80031_cell, ARRAY_SIZE(tps80031_cell),
NULL, 0,
regmap_irq_get_domain(tps80031->irq_data));
if (ret < 0) {
dev_err(&client->dev, "mfd_add_devices failed: %d\n", ret);
goto fail_mfd_add;
}
if (pdata->use_power_off && !pm_power_off) {
tps80031_power_off_dev = tps80031;
pm_power_off = tps80031_power_off;
}
return 0;
fail_mfd_add:
regmap_del_irq_chip(client->irq, tps80031->irq_data);
fail_client_reg:
for (i = 0; i < TPS80031_NUM_SLAVES; i++) {
if (tps80031->clients[i] && (tps80031->clients[i] != client))
i2c_unregister_device(tps80031->clients[i]);
}
return ret;
}
static int __devexit tps80031_remove(struct i2c_client *client)
{
struct tps80031 *tps80031 = i2c_get_clientdata(client);
int i;
if (tps80031_power_off_dev == tps80031) {
tps80031_power_off_dev = NULL;
pm_power_off = NULL;
}
mfd_remove_devices(tps80031->dev);
regmap_del_irq_chip(client->irq, tps80031->irq_data);
for (i = 0; i < TPS80031_NUM_SLAVES; i++) {
if (tps80031->clients[i] != client)
i2c_unregister_device(tps80031->clients[i]);
}
return 0;
}
static const struct i2c_device_id tps80031_id_table[] = {
{ "tps80031", TPS80031 },
{ "tps80032", TPS80032 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tps80031_id_table);
static struct i2c_driver tps80031_driver = {
.driver = {
.name = "tps80031",
.owner = THIS_MODULE,
},
.probe = tps80031_probe,
.remove = __devexit_p(tps80031_remove),
.id_table = tps80031_id_table,
};
static int __init tps80031_init(void)
{
return i2c_add_driver(&tps80031_driver);
}
subsys_initcall(tps80031_init);
static void __exit tps80031_exit(void)
{
i2c_del_driver(&tps80031_driver);
}
module_exit(tps80031_exit);
MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
MODULE_DESCRIPTION("TPS80031 core driver");
MODULE_LICENSE("GPL v2");

223
drivers/mfd/twl-core.c
View File

@ -32,6 +32,7 @@
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/device.h>
@ -65,9 +66,6 @@
/* Triton Core internal information (BEGIN) */
/* Last - for index max*/
#define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
#define TWL_NUM_SLAVES 4
#define SUB_CHIP_ID0 0
@ -171,13 +169,7 @@ EXPORT_SYMBOL(twl_rev);
/* Structure for each TWL4030/TWL6030 Slave */
struct twl_client {
struct i2c_client *client;
u8 address;
/* max numb of i2c_msg required is for read =2 */
struct i2c_msg xfer_msg[2];
/* To lock access to xfer_msg */
struct mutex xfer_lock;
struct regmap *regmap;
};
static struct twl_client twl_modules[TWL_NUM_SLAVES];
@ -189,7 +181,7 @@ struct twl_mapping {
};
static struct twl_mapping *twl_map;
static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
static struct twl_mapping twl4030_map[] = {
/*
* NOTE: don't change this table without updating the
* <linux/i2c/twl.h> defines for TWL4030_MODULE_*
@ -197,34 +189,62 @@ static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
*/
{ 0, TWL4030_BASEADD_USB },
{ 1, TWL4030_BASEADD_AUDIO_VOICE },
{ 1, TWL4030_BASEADD_GPIO },
{ 1, TWL4030_BASEADD_INTBR },
{ 1, TWL4030_BASEADD_PIH },
{ 1, TWL4030_BASEADD_TEST },
{ 1, TWL4030_BASEADD_TEST },
{ 2, TWL4030_BASEADD_KEYPAD },
{ 2, TWL4030_BASEADD_MADC },
{ 2, TWL4030_BASEADD_INTERRUPTS },
{ 2, TWL4030_BASEADD_LED },
{ 2, TWL4030_BASEADD_MAIN_CHARGE },
{ 2, TWL4030_BASEADD_PRECHARGE },
{ 2, TWL4030_BASEADD_PWM0 },
{ 2, TWL4030_BASEADD_PWM1 },
{ 2, TWL4030_BASEADD_PWMA },
{ 2, TWL4030_BASEADD_PWMB },
{ 2, TWL5031_BASEADD_ACCESSORY },
{ 2, TWL5031_BASEADD_INTERRUPTS },
{ 3, TWL4030_BASEADD_BACKUP },
{ 3, TWL4030_BASEADD_INT },
{ 3, TWL4030_BASEADD_PM_MASTER },
{ 3, TWL4030_BASEADD_PM_RECEIVER },
{ 3, TWL4030_BASEADD_RTC },
{ 3, TWL4030_BASEADD_SECURED_REG },
};
static struct regmap_config twl4030_regmap_config[4] = {
{
/* Address 0x48 */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
{
/* Address 0x49 */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
{
/* Address 0x4a */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
{
/* Address 0x4b */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
};
static struct twl_mapping twl6030_map[] = {
/*
* NOTE: don't change this table without updating the
@ -254,14 +274,35 @@ static struct twl_mapping twl6030_map[] = {
{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
{ SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
{ SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
{ SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
{ SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
{ SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
{ SUB_CHIP_ID1, TWL6025_BASEADD_CHARGER },
};
static struct regmap_config twl6030_regmap_config[3] = {
{
/* Address 0x48 */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
{
/* Address 0x49 */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
{
/* Address 0x4a */
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
},
};
/*----------------------------------------------------------------------*/
/* Exported Functions */
@ -283,9 +324,8 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
int ret;
int sid;
struct twl_client *twl;
struct i2c_msg *msg;
if (unlikely(mod_no > TWL_MODULE_LAST)) {
if (unlikely(mod_no >= TWL_MODULE_LAST)) {
pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
return -EPERM;
}
@ -301,32 +341,14 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
}
twl = &twl_modules[sid];
mutex_lock(&twl->xfer_lock);
/*
* [MSG1]: fill the register address data
* fill the data Tx buffer
*/
msg = &twl->xfer_msg[0];
msg->addr = twl->address;
msg->len = num_bytes + 1;
msg->flags = 0;
msg->buf = value;
/* over write the first byte of buffer with the register address */
*value = twl_map[mod_no].base + reg;
ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
mutex_unlock(&twl->xfer_lock);
ret = regmap_bulk_write(twl->regmap, twl_map[mod_no].base + reg,
value, num_bytes);
/* i2c_transfer returns number of messages transferred */
if (ret != 1) {
pr_err("%s: i2c_write failed to transfer all messages\n",
DRIVER_NAME);
if (ret < 0)
return ret;
else
return -EIO;
} else {
return 0;
}
if (ret)
pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
DRIVER_NAME, mod_no, reg, num_bytes);
return ret;
}
EXPORT_SYMBOL(twl_i2c_write);
@ -342,12 +364,10 @@ EXPORT_SYMBOL(twl_i2c_write);
int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
{
int ret;
u8 val;
int sid;
struct twl_client *twl;
struct i2c_msg *msg;
if (unlikely(mod_no > TWL_MODULE_LAST)) {
if (unlikely(mod_no >= TWL_MODULE_LAST)) {
pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
return -EPERM;
}
@ -363,34 +383,14 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
}
twl = &twl_modules[sid];
mutex_lock(&twl->xfer_lock);
/* [MSG1] fill the register address data */
msg = &twl->xfer_msg[0];
msg->addr = twl->address;
msg->len = 1;
msg->flags = 0; /* Read the register value */
val = twl_map[mod_no].base + reg;
msg->buf = &val;
/* [MSG2] fill the data rx buffer */
msg = &twl->xfer_msg[1];
msg->addr = twl->address;
msg->flags = I2C_M_RD; /* Read the register value */
msg->len = num_bytes; /* only n bytes */
msg->buf = value;
ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
mutex_unlock(&twl->xfer_lock);
ret = regmap_bulk_read(twl->regmap, twl_map[mod_no].base + reg,
value, num_bytes);
/* i2c_transfer returns number of messages transferred */
if (ret != 2) {
pr_err("%s: i2c_read failed to transfer all messages\n",
DRIVER_NAME);
if (ret < 0)
return ret;
else
return -EIO;
} else {
return 0;
}
if (ret)
pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
DRIVER_NAME, mod_no, reg, num_bytes);
return ret;
}
EXPORT_SYMBOL(twl_i2c_read);
@ -404,12 +404,7 @@ EXPORT_SYMBOL(twl_i2c_read);
*/
int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
{
/* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
u8 temp_buffer[2] = { 0 };
/* offset 1 contains the data */
temp_buffer[1] = value;
return twl_i2c_write(mod_no, temp_buffer, reg, 1);
return twl_i2c_write(mod_no, &value, reg, 1);
}
EXPORT_SYMBOL(twl_i2c_write_u8);
@ -646,8 +641,9 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
return PTR_ERR(child);
}
if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc) {
child = add_child(2, "twl4030_madc",
if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
twl_class_is_4030()) {
child = add_child(SUB_CHIP_ID2, "twl4030_madc",
pdata->madc, sizeof(*pdata->madc),
true, irq_base + MADC_INTR_OFFSET, 0);
if (IS_ERR(child))
@ -663,15 +659,21 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
* HW security concerns, and "least privilege".
*/
sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
child = add_child(sub_chip_id, "twl_rtc",
NULL, 0,
child = add_child(sub_chip_id, "twl_rtc", NULL, 0,
true, irq_base + RTC_INTR_OFFSET, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
if (IS_ENABLED(CONFIG_PWM_TWL6030) && twl_class_is_6030()) {
child = add_child(SUB_CHIP_ID1, "twl6030-pwm", NULL, 0,
if (IS_ENABLED(CONFIG_PWM_TWL)) {
child = add_child(SUB_CHIP_ID1, "twl-pwm", NULL, 0,
false, 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
child = add_child(SUB_CHIP_ID1, "twl-pwmled", NULL, 0,
false, 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
@ -723,9 +725,8 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
}
child = add_child(0, "twl4030_usb",
pdata->usb, sizeof(*pdata->usb),
true,
child = add_child(SUB_CHIP_ID0, "twl4030_usb",
pdata->usb, sizeof(*pdata->usb), true,
/* irq0 = USB_PRES, irq1 = USB */
irq_base + USB_PRES_INTR_OFFSET,
irq_base + USB_INTR_OFFSET);
@ -773,9 +774,8 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
pdata->usb->features = features;
child = add_child(0, "twl6030_usb",
pdata->usb, sizeof(*pdata->usb),
true,
child = add_child(SUB_CHIP_ID0, "twl6030_usb",
pdata->usb, sizeof(*pdata->usb), true,
/* irq1 = VBUS_PRES, irq0 = USB ID */
irq_base + USBOTG_INTR_OFFSET,
irq_base + USB_PRES_INTR_OFFSET);
@ -799,22 +799,22 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
}
if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
child = add_child(SUB_CHIP_ID3, "twl4030_wdt", NULL, 0,
false, 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
child = add_child(1, "twl4030_pwrbutton",
NULL, 0, true, irq_base + 8 + 0, 0);
child = add_child(SUB_CHIP_ID3, "twl4030_pwrbutton", NULL, 0,
true, irq_base + 8 + 0, 0);
if (IS_ERR(child))
return PTR_ERR(child);
}
if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
twl_class_is_4030()) {
sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
child = add_child(sub_chip_id, "twl4030-audio",
child = add_child(SUB_CHIP_ID1, "twl4030-audio",
pdata->audio, sizeof(*pdata->audio),
false, 0, 0);
if (IS_ERR(child))
@ -1054,7 +1054,7 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
!(features & (TPS_SUBSET | TWL5031))) {
child = add_child(3, "twl4030_bci",
child = add_child(SUB_CHIP_ID3, "twl4030_bci",
pdata->bci, sizeof(*pdata->bci), false,
/* irq0 = CHG_PRES, irq1 = BCI */
irq_base + BCI_PRES_INTR_OFFSET,
@ -1077,8 +1077,8 @@ static inline int __init protect_pm_master(void)
{
int e = 0;
e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
return e;
}
@ -1086,12 +1086,10 @@ static inline int __init unprotect_pm_master(void)
{
int e = 0;
e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
return e;
}
@ -1176,6 +1174,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
struct twl4030_platform_data *pdata = client->dev.platform_data;
struct device_node *node = client->dev.of_node;
struct platform_device *pdev;
struct regmap_config *twl_regmap_config;
int irq_base = 0;
int status;
unsigned i, num_slaves;
@ -1229,22 +1228,23 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
if ((id->driver_data) & TWL6030_CLASS) {
twl_id = TWL6030_CLASS_ID;
twl_map = &twl6030_map[0];
twl_regmap_config = twl6030_regmap_config;
num_slaves = TWL_NUM_SLAVES - 1;
} else {
twl_id = TWL4030_CLASS_ID;
twl_map = &twl4030_map[0];
twl_regmap_config = twl4030_regmap_config;
num_slaves = TWL_NUM_SLAVES;
}
for (i = 0; i < num_slaves; i++) {
struct twl_client *twl = &twl_modules[i];
twl->address = client->addr + i;
if (i == 0) {
twl->client = client;
} else {
twl->client = i2c_new_dummy(client->adapter,
twl->address);
client->addr + i);
if (!twl->client) {
dev_err(&client->dev,
"can't attach client %d\n", i);
@ -1252,7 +1252,16 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
goto fail;
}
}
mutex_init(&twl->xfer_lock);
twl->regmap = devm_regmap_init_i2c(twl->client,
&twl_regmap_config[i]);
if (IS_ERR(twl->regmap)) {
status = PTR_ERR(twl->regmap);
dev_err(&client->dev,
"Failed to allocate regmap %d, err: %d\n", i,
status);
goto fail;
}
}
inuse = true;

10
drivers/mfd/twl4030-irq.c
View File

@ -295,8 +295,8 @@ static irqreturn_t handle_twl4030_pih(int irq, void *devid)
irqreturn_t ret;
u8 pih_isr;
ret = twl_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr,
REG_PIH_ISR_P1);
ret = twl_i2c_read_u8(TWL_MODULE_PIH, &pih_isr,
REG_PIH_ISR_P1);
if (ret) {
pr_warning("twl4030: I2C error %d reading PIH ISR\n", ret);
return IRQ_NONE;
@ -501,7 +501,7 @@ static void twl4030_sih_bus_sync_unlock(struct irq_data *data)
} imr;
/* byte[0] gets overwritten as we write ... */
imr.word = cpu_to_le32(agent->imr << 8);
imr.word = cpu_to_le32(agent->imr);
agent->imr_change_pending = false;
/* write the whole mask ... simpler than subsetting it */
@ -526,7 +526,7 @@ static void twl4030_sih_bus_sync_unlock(struct irq_data *data)
* any processor on the other IRQ line, EDR registers are
* shared.
*/
status = twl_i2c_read(sih->module, bytes + 1,
status = twl_i2c_read(sih->module, bytes,
sih->edr_offset, sih->bytes_edr);
if (status) {
pr_err("twl4030: %s, %s --> %d\n", __func__,
@ -538,7 +538,7 @@ static void twl4030_sih_bus_sync_unlock(struct irq_data *data)
while (edge_change) {
int i = fls(edge_change) - 1;
struct irq_data *idata;
int byte = 1 + (i >> 2);
int byte = i >> 2;
int off = (i & 0x3) * 2;
unsigned int type;

14
drivers/mfd/twl4030-madc.c
View File

@ -173,7 +173,7 @@ static int twl4030battery_temperature(int raw_volt)
volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R;
/* Getting and calculating the supply current in micro ampers */
ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val,
ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
REG_BCICTL2);
if (ret < 0)
return ret;
@ -196,7 +196,7 @@ static int twl4030battery_current(int raw_volt)
int ret;
u8 val;
ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val,
ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
TWL4030_BCI_BCICTL1);
if (ret)
return ret;
@ -635,7 +635,7 @@ static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
int ret;
u8 regval;
ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
&regval, TWL4030_BCI_BCICTL1);
if (ret) {
dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X",
@ -646,7 +646,7 @@ static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
regval |= chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
else
regval &= chan ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN;
ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
regval, TWL4030_BCI_BCICTL1);
if (ret) {
dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n",
@ -668,7 +668,7 @@ static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
u8 regval;
int ret;
ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
&regval, TWL4030_MADC_CTRL1);
if (ret) {
dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n",
@ -725,7 +725,7 @@ static int twl4030_madc_probe(struct platform_device *pdev)
if (ret < 0)
goto err_current_generator;
ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE,
ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
&regval, TWL4030_BCI_BCICTL1);
if (ret) {
dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n",
@ -733,7 +733,7 @@ static int twl4030_madc_probe(struct platform_device *pdev)
goto err_i2c;
}
regval |= TWL4030_BCI_MESBAT;
ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE,
ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
regval, TWL4030_BCI_BCICTL1);
if (ret) {
dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n",

124
drivers/mfd/twl4030-power.c
View File

@ -128,12 +128,10 @@ static int twl4030_write_script_byte(u8 address, u8 byte)
{
int err;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
R_MEMORY_ADDRESS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS);
if (err)
goto out;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte,
R_MEMORY_DATA);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA);
out:
return err;
}
@ -189,19 +187,16 @@ static int twl4030_config_wakeup3_sequence(u8 address)
u8 data;
/* Set SLEEP to ACTIVE SEQ address for P3 */
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
R_SEQ_ADD_S2A3);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3);
if (err)
goto out;
/* P3 LVL_WAKEUP should be on LEVEL */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
R_P3_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS);
if (err)
goto out;
data |= LVL_WAKEUP;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
R_P3_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS);
out:
if (err)
pr_err("TWL4030 wakeup sequence for P3 config error\n");
@ -214,43 +209,38 @@ static int twl4030_config_wakeup12_sequence(u8 address)
u8 data;
/* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
R_SEQ_ADD_S2A12);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12);
if (err)
goto out;
/* P1/P2 LVL_WAKEUP should be on LEVEL */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
R_P1_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS);
if (err)
goto out;
data |= LVL_WAKEUP;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
R_P1_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS);
if (err)
goto out;
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
R_P2_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS);
if (err)
goto out;
data |= LVL_WAKEUP;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
R_P2_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS);
if (err)
goto out;
if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
/* Disabling AC charger effect on sleep-active transitions */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
R_CFG_P1_TRANSITION);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data,
R_CFG_P1_TRANSITION);
if (err)
goto out;
data &= ~(1<<1);
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data ,
R_CFG_P1_TRANSITION);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data,
R_CFG_P1_TRANSITION);
if (err)
goto out;
}
@ -267,8 +257,7 @@ static int twl4030_config_sleep_sequence(u8 address)
int err;
/* Set ACTIVE to SLEEP SEQ address in T2 memory*/
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
R_SEQ_ADD_A2S);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);
if (err)
pr_err("TWL4030 sleep sequence config error\n");
@ -282,42 +271,35 @@ static int twl4030_config_warmreset_sequence(u8 address)
u8 rd_data;
/* Set WARM RESET SEQ address for P1 */
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
R_SEQ_ADD_WARM);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM);
if (err)
goto out;
/* P1/P2/P3 enable WARMRESET */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
R_P1_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS);
if (err)
goto out;
rd_data |= ENABLE_WARMRESET;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
R_P1_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS);
if (err)
goto out;
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
R_P2_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS);
if (err)
goto out;
rd_data |= ENABLE_WARMRESET;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
R_P2_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS);
if (err)
goto out;
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
R_P3_SW_EVENTS);
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS);
if (err)
goto out;
rd_data |= ENABLE_WARMRESET;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
R_P3_SW_EVENTS);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS);
out:
if (err)
pr_err("TWL4030 warmreset seq config error\n");
@ -341,7 +323,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
rconfig_addr = res_config_addrs[rconfig->resource];
/* Set resource group */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp,
err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp,
rconfig_addr + DEV_GRP_OFFSET);
if (err) {
pr_err("TWL4030 Resource %d group could not be read\n",
@ -352,7 +334,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
grp &= ~DEV_GRP_MASK;
grp |= rconfig->devgroup << DEV_GRP_SHIFT;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
grp, rconfig_addr + DEV_GRP_OFFSET);
if (err < 0) {
pr_err("TWL4030 failed to program devgroup\n");
@ -361,7 +343,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
}
/* Set resource types */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type,
err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type,
rconfig_addr + TYPE_OFFSET);
if (err < 0) {
pr_err("TWL4030 Resource %d type could not be read\n",
@ -379,7 +361,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
type |= rconfig->type2 << TYPE2_SHIFT;
}
err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
type, rconfig_addr + TYPE_OFFSET);
if (err < 0) {
pr_err("TWL4030 failed to program resource type\n");
@ -387,7 +369,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
}
/* Set remap states */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &remap,
err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap,
rconfig_addr + REMAP_OFFSET);
if (err < 0) {
pr_err("TWL4030 Resource %d remap could not be read\n",
@ -405,7 +387,7 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT;
}
err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
remap,
rconfig_addr + REMAP_OFFSET);
if (err < 0) {
@ -463,49 +445,47 @@ int twl4030_remove_script(u8 flags)
{
int err = 0;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err) {
pr_err("twl4030: unable to unlock PROTECT_KEY\n");
return err;
}
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err) {
pr_err("twl4030: unable to unlock PROTECT_KEY\n");
return err;
}
if (flags & TWL4030_WRST_SCRIPT) {
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_WARM);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_WARM);
if (err)
return err;
}
if (flags & TWL4030_WAKEUP12_SCRIPT) {
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_S2A12);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_S2A12);
if (err)
return err;
}
if (flags & TWL4030_WAKEUP3_SCRIPT) {
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_S2A3);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_S2A3);
if (err)
return err;
}
if (flags & TWL4030_SLEEP_SCRIPT) {
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_A2S);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
R_SEQ_ADD_A2S);
if (err)
return err;
}
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err)
pr_err("TWL4030 Unable to relock registers\n");
@ -521,7 +501,7 @@ void twl4030_power_off(void)
{
int err;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, PWR_DEVOFF,
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF,
TWL4030_PM_MASTER_P1_SW_EVENTS);
if (err)
pr_err("TWL4030 Unable to power off\n");
@ -534,15 +514,13 @@ void twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
struct twl4030_resconfig *resconfig;
u8 val, address = twl4030_start_script_address;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err)
goto unlock;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err)
goto unlock;
@ -567,14 +545,14 @@ void twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
/* Board has to be wired properly to use this feature */
if (twl4030_scripts->use_poweroff && !pm_power_off) {
/* Default for SEQ_OFFSYNC is set, lets ensure this */
err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &val,
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
TWL4030_PM_MASTER_CFG_P123_TRANSITION);
if (err) {
pr_warning("TWL4030 Unable to read registers\n");
} else if (!(val & SEQ_OFFSYNC)) {
val |= SEQ_OFFSYNC;
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, val,
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
TWL4030_PM_MASTER_CFG_P123_TRANSITION);
if (err) {
pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
@ -586,8 +564,8 @@ void twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
}
relock:
err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
TWL4030_PM_MASTER_PROTECT_KEY);
if (err)
pr_err("TWL4030 Unable to relock registers\n");
return;

4
drivers/mfd/twl6030-irq.c
View File

@ -355,7 +355,7 @@ int twl6030_init_irq(struct device *dev, int irq_num)
static struct irq_chip twl6030_irq_chip;
int status = 0;
int i;
u8 mask[4];
u8 mask[3];
nr_irqs = TWL6030_NR_IRQS;
@ -370,9 +370,9 @@ int twl6030_init_irq(struct device *dev, int irq_num)
irq_end = irq_base + nr_irqs;
mask[0] = 0xFF;
mask[1] = 0xFF;
mask[2] = 0xFF;
mask[3] = 0xFF;
/* mask all int lines */
twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_LINE_A, 3);

205
drivers/mfd/twl6040-irq.c
View File

@ -1,205 +0,0 @@
/*
* Interrupt controller support for TWL6040
*
* Author: Misael Lopez Cruz <misael.lopez@ti.com>
*
* Copyright: (C) 2011 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/twl6040.h>
struct twl6040_irq_data {
int mask;
int status;
};
static struct twl6040_irq_data twl6040_irqs[] = {
{
.mask = TWL6040_THMSK,
.status = TWL6040_THINT,
},
{
.mask = TWL6040_PLUGMSK,
.status = TWL6040_PLUGINT | TWL6040_UNPLUGINT,
},
{
.mask = TWL6040_HOOKMSK,
.status = TWL6040_HOOKINT,
},
{
.mask = TWL6040_HFMSK,
.status = TWL6040_HFINT,
},
{
.mask = TWL6040_VIBMSK,
.status = TWL6040_VIBINT,
},
{
.mask = TWL6040_READYMSK,
.status = TWL6040_READYINT,
},
};
static inline
struct twl6040_irq_data *irq_to_twl6040_irq(struct twl6040 *twl6040,
int irq)
{
return &twl6040_irqs[irq - twl6040->irq_base];
}
static void twl6040_irq_lock(struct irq_data *data)
{
struct twl6040 *twl6040 = irq_data_get_irq_chip_data(data);
mutex_lock(&twl6040->irq_mutex);
}
static void twl6040_irq_sync_unlock(struct irq_data *data)
{
struct twl6040 *twl6040 = irq_data_get_irq_chip_data(data);
/* write back to hardware any change in irq mask */
if (twl6040->irq_masks_cur != twl6040->irq_masks_cache) {
twl6040->irq_masks_cache = twl6040->irq_masks_cur;
twl6040_reg_write(twl6040, TWL6040_REG_INTMR,
twl6040->irq_masks_cur);
}
mutex_unlock(&twl6040->irq_mutex);
}
static void twl6040_irq_enable(struct irq_data *data)
{
struct twl6040 *twl6040 = irq_data_get_irq_chip_data(data);
struct twl6040_irq_data *irq_data = irq_to_twl6040_irq(twl6040,
data->irq);
twl6040->irq_masks_cur &= ~irq_data->mask;
}
static void twl6040_irq_disable(struct irq_data *data)
{
struct twl6040 *twl6040 = irq_data_get_irq_chip_data(data);
struct twl6040_irq_data *irq_data = irq_to_twl6040_irq(twl6040,
data->irq);
twl6040->irq_masks_cur |= irq_data->mask;
}
static struct irq_chip twl6040_irq_chip = {
.name = "twl6040",
.irq_bus_lock = twl6040_irq_lock,
.irq_bus_sync_unlock = twl6040_irq_sync_unlock,
.irq_enable = twl6040_irq_enable,
.irq_disable = twl6040_irq_disable,
};
static irqreturn_t twl6040_irq_thread(int irq, void *data)
{
struct twl6040 *twl6040 = data;
u8 intid;
int i;
intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
/* apply masking and report (backwards to handle READYINT first) */
for (i = ARRAY_SIZE(twl6040_irqs) - 1; i >= 0; i--) {
if (twl6040->irq_masks_cur & twl6040_irqs[i].mask)
intid &= ~twl6040_irqs[i].status;
if (intid & twl6040_irqs[i].status)
handle_nested_irq(twl6040->irq_base + i);
}
/* ack unmasked irqs */
twl6040_reg_write(twl6040, TWL6040_REG_INTID, intid);
return IRQ_HANDLED;
}
int twl6040_irq_init(struct twl6040 *twl6040)
{
struct device_node *node = twl6040->dev->of_node;
int i, nr_irqs, irq_base, ret;
u8 val;
mutex_init(&twl6040->irq_mutex);
/* mask the individual interrupt sources */
twl6040->irq_masks_cur = TWL6040_ALLINT_MSK;
twl6040->irq_masks_cache = TWL6040_ALLINT_MSK;
twl6040_reg_write(twl6040, TWL6040_REG_INTMR, TWL6040_ALLINT_MSK);
nr_irqs = ARRAY_SIZE(twl6040_irqs);
irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
if (IS_ERR_VALUE(irq_base)) {
dev_err(twl6040->dev, "Fail to allocate IRQ descs\n");
return irq_base;
}
twl6040->irq_base = irq_base;
irq_domain_add_legacy(node, ARRAY_SIZE(twl6040_irqs), irq_base, 0,
&irq_domain_simple_ops, NULL);
/* Register them with genirq */
for (i = irq_base; i < irq_base + nr_irqs; i++) {
irq_set_chip_data(i, twl6040);
irq_set_chip_and_handler(i, &twl6040_irq_chip,
handle_level_irq);
irq_set_nested_thread(i, 1);
/* ARM needs us to explicitly flag the IRQ as valid
* and will set them noprobe when we do so. */
#ifdef CONFIG_ARM
set_irq_flags(i, IRQF_VALID);
#else
irq_set_noprobe(i);
#endif
}
ret = request_threaded_irq(twl6040->irq, NULL, twl6040_irq_thread,
IRQF_ONESHOT, "twl6040", twl6040);
if (ret) {
dev_err(twl6040->dev, "failed to request IRQ %d: %d\n",
twl6040->irq, ret);
return ret;
}
/* reset interrupts */
val = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
/* interrupts cleared on write */
twl6040_clear_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_INTCLRMODE);
return 0;
}
EXPORT_SYMBOL(twl6040_irq_init);
void twl6040_irq_exit(struct twl6040 *twl6040)
{
free_irq(twl6040->irq, twl6040);
}
EXPORT_SYMBOL(twl6040_irq_exit);

138
drivers/mfd/twl6040-core.c → drivers/mfd/twl6040.c
View File

@ -37,7 +37,6 @@
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/err.h>
#include <linux/mfd/core.h>
#include <linux/mfd/twl6040.h>
#include <linux/regulator/consumer.h>
@ -104,7 +103,7 @@ int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
EXPORT_SYMBOL(twl6040_clear_bits);
/* twl6040 codec manual power-up sequence */
static int twl6040_power_up(struct twl6040 *twl6040)
static int twl6040_power_up_manual(struct twl6040 *twl6040)
{
u8 ldoctl, ncpctl, lppllctl;
int ret;
@ -158,11 +157,12 @@ ncp_err:
ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
dev_err(twl6040->dev, "manual power-up failed\n");
return ret;
}
/* twl6040 manual power-down sequence */
static void twl6040_power_down(struct twl6040 *twl6040)
static void twl6040_power_down_manual(struct twl6040 *twl6040)
{
u8 ncpctl, ldoctl, lppllctl;
@ -192,45 +192,48 @@ static void twl6040_power_down(struct twl6040 *twl6040)
twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
}
static irqreturn_t twl6040_naudint_handler(int irq, void *data)
static irqreturn_t twl6040_readyint_handler(int irq, void *data)
{
struct twl6040 *twl6040 = data;
u8 intid, status;
intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
complete(&twl6040->ready);
if (intid & TWL6040_READYINT)
complete(&twl6040->ready);
return IRQ_HANDLED;
}
if (intid & TWL6040_THINT) {
status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
if (status & TWL6040_TSHUTDET) {
dev_warn(twl6040->dev,
"Thermal shutdown, powering-off");
twl6040_power(twl6040, 0);
} else {
dev_warn(twl6040->dev,
"Leaving thermal shutdown, powering-on");
twl6040_power(twl6040, 1);
}
static irqreturn_t twl6040_thint_handler(int irq, void *data)
{
struct twl6040 *twl6040 = data;
u8 status;
status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
if (status & TWL6040_TSHUTDET) {
dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
twl6040_power(twl6040, 0);
} else {
dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
twl6040_power(twl6040, 1);
}
return IRQ_HANDLED;
}
static int twl6040_power_up_completion(struct twl6040 *twl6040,
int naudint)
static int twl6040_power_up_automatic(struct twl6040 *twl6040)
{
int time_left;
u8 intid;
gpio_set_value(twl6040->audpwron, 1);
time_left = wait_for_completion_timeout(&twl6040->ready,
msecs_to_jiffies(144));
if (!time_left) {
u8 intid;
dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
if (!(intid & TWL6040_READYINT)) {
dev_err(twl6040->dev,
"timeout waiting for READYINT\n");
dev_err(twl6040->dev, "automatic power-up failed\n");
gpio_set_value(twl6040->audpwron, 0);
return -ETIMEDOUT;
}
}
@ -240,8 +243,6 @@ static int twl6040_power_up_completion(struct twl6040 *twl6040,
int twl6040_power(struct twl6040 *twl6040, int on)
{
int audpwron = twl6040->audpwron;
int naudint = twl6040->irq;
int ret = 0;
mutex_lock(&twl6040->mutex);
@ -251,23 +252,17 @@ int twl6040_power(struct twl6040 *twl6040, int on)
if (twl6040->power_count++)
goto out;
if (gpio_is_valid(audpwron)) {
/* use AUDPWRON line */
gpio_set_value(audpwron, 1);
/* wait for power-up completion */
ret = twl6040_power_up_completion(twl6040, naudint);
if (gpio_is_valid(twl6040->audpwron)) {
/* use automatic power-up sequence */
ret = twl6040_power_up_automatic(twl6040);
if (ret) {
dev_err(twl6040->dev,
"automatic power-down failed\n");
twl6040->power_count = 0;
goto out;
}
} else {
/* use manual power-up sequence */
ret = twl6040_power_up(twl6040);
ret = twl6040_power_up_manual(twl6040);
if (ret) {
dev_err(twl6040->dev,
"manual power-up failed\n");
twl6040->power_count = 0;
goto out;
}
@ -288,15 +283,15 @@ int twl6040_power(struct twl6040 *twl6040, int on)
if (--twl6040->power_count)
goto out;
if (gpio_is_valid(audpwron)) {
if (gpio_is_valid(twl6040->audpwron)) {
/* use AUDPWRON line */
gpio_set_value(audpwron, 0);
gpio_set_value(twl6040->audpwron, 0);
/* power-down sequence latency */
usleep_range(500, 700);
} else {
/* use manual power-down sequence */
twl6040_power_down(twl6040);
twl6040_power_down_manual(twl6040);
}
twl6040->sysclk = 0;
twl6040->mclk = 0;
@ -503,6 +498,25 @@ static struct regmap_config twl6040_regmap_config = {
.readable_reg = twl6040_readable_reg,
};
static const struct regmap_irq twl6040_irqs[] = {
{ .reg_offset = 0, .mask = TWL6040_THINT, },
{ .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
{ .reg_offset = 0, .mask = TWL6040_HOOKINT, },
{ .reg_offset = 0, .mask = TWL6040_HFINT, },
{ .reg_offset = 0, .mask = TWL6040_VIBINT, },
{ .reg_offset = 0, .mask = TWL6040_READYINT, },
};
static struct regmap_irq_chip twl6040_irq_chip = {
.name = "twl6040",
.irqs = twl6040_irqs,
.num_irqs = ARRAY_SIZE(twl6040_irqs),
.num_regs = 1,
.status_base = TWL6040_REG_INTID,
.mask_base = TWL6040_REG_INTMR,
};
static int __devinit twl6040_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@ -578,18 +592,31 @@ static int __devinit twl6040_probe(struct i2c_client *client,
goto gpio_err;
}
/* codec interrupt */
ret = twl6040_irq_init(twl6040);
if (ret)
ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq,
IRQF_ONESHOT, 0, &twl6040_irq_chip,
&twl6040->irq_data);
if (ret < 0)
goto irq_init_err;
ret = request_threaded_irq(twl6040->irq_base + TWL6040_IRQ_READY,
NULL, twl6040_naudint_handler, IRQF_ONESHOT,
twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
TWL6040_IRQ_READY);
twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
TWL6040_IRQ_TH);
ret = request_threaded_irq(twl6040->irq_ready, NULL,
twl6040_readyint_handler, IRQF_ONESHOT,
"twl6040_irq_ready", twl6040);
if (ret) {
dev_err(twl6040->dev, "READY IRQ request failed: %d\n",
ret);
goto irq_err;
dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
goto readyirq_err;
}
ret = request_threaded_irq(twl6040->irq_th, NULL,
twl6040_thint_handler, IRQF_ONESHOT,
"twl6040_irq_th", twl6040);
if (ret) {
dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
goto thirq_err;
}
/* dual-access registers controlled by I2C only */
@ -601,7 +628,7 @@ static int __devinit twl6040_probe(struct i2c_client *client,
* The ASoC codec can work without pdata, pass the platform_data only if
* it has been provided.
*/
irq = twl6040->irq_base + TWL6040_IRQ_PLUG;
irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
cell = &twl6040->cells[children];
cell->name = "twl6040-codec";
twl6040_codec_rsrc[0].start = irq;
@ -615,7 +642,7 @@ static int __devinit twl6040_probe(struct i2c_client *client,
children++;
if (twl6040_has_vibra(pdata, node)) {
irq = twl6040->irq_base + TWL6040_IRQ_VIB;
irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
cell = &twl6040->cells[children];
cell->name = "twl6040-vibra";
@ -654,9 +681,11 @@ static int __devinit twl6040_probe(struct i2c_client *client,
return 0;
mfd_err:
free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040);
irq_err:
twl6040_irq_exit(twl6040);
free_irq(twl6040->irq_th, twl6040);
thirq_err:
free_irq(twl6040->irq_ready, twl6040);
readyirq_err:
regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
irq_init_err:
if (gpio_is_valid(twl6040->audpwron))
gpio_free(twl6040->audpwron);
@ -680,8 +709,9 @@ static int __devexit twl6040_remove(struct i2c_client *client)
if (gpio_is_valid(twl6040->audpwron))
gpio_free(twl6040->audpwron);
free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040);
twl6040_irq_exit(twl6040);
free_irq(twl6040->irq_ready, twl6040);
free_irq(twl6040->irq_th, twl6040);
regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
mfd_remove_devices(&client->dev);
i2c_set_clientdata(client, NULL);

137
drivers/mfd/viperboard.c Normal file
View File

@ -0,0 +1,137 @@
/*
* Nano River Technologies viperboard driver
*
* This is the core driver for the viperboard. There are cell drivers
* available for I2C, ADC and both GPIOs. SPI is not yet supported.
* The drivers do not support all features the board exposes. See user
* manual of the viperboard.
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/mfd/core.h>
#include <linux/mfd/viperboard.h>
#include <linux/usb.h>
static const struct usb_device_id vprbrd_table[] = {
{ USB_DEVICE(0x2058, 0x1005) }, /* Nano River Technologies */
{ } /* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, vprbrd_table);
static struct mfd_cell vprbrd_devs[] = {
{
.name = "viperboard-gpio",
},
{
.name = "viperboard-i2c",
},
{
.name = "viperboard-adc",
},
};
static int vprbrd_probe(struct usb_interface *interface,
const struct usb_device_id *id)
{
struct vprbrd *vb;
u16 version = 0;
int pipe, ret;
/* allocate memory for our device state and initialize it */
vb = kzalloc(sizeof(*vb), GFP_KERNEL);
if (vb == NULL) {
dev_err(&interface->dev, "Out of memory\n");
return -ENOMEM;
}
mutex_init(&vb->lock);
vb->usb_dev = usb_get_dev(interface_to_usbdev(interface));
/* save our data pointer in this interface device */
usb_set_intfdata(interface, vb);
dev_set_drvdata(&vb->pdev.dev, vb);
/* get version information, major first, minor then */
pipe = usb_rcvctrlpipe(vb->usb_dev, 0);
ret = usb_control_msg(vb->usb_dev, pipe, VPRBRD_USB_REQUEST_MAJOR,
VPRBRD_USB_TYPE_IN, 0x0000, 0x0000, vb->buf, 1,
VPRBRD_USB_TIMEOUT_MS);
if (ret == 1)
version = vb->buf[0];
ret = usb_control_msg(vb->usb_dev, pipe, VPRBRD_USB_REQUEST_MINOR,
VPRBRD_USB_TYPE_IN, 0x0000, 0x0000, vb->buf, 1,
VPRBRD_USB_TIMEOUT_MS);
if (ret == 1) {
version <<= 8;
version = version | vb->buf[0];
}
dev_info(&interface->dev,
"version %x.%02x found at bus %03d address %03d\n",
version >> 8, version & 0xff,
vb->usb_dev->bus->busnum, vb->usb_dev->devnum);
ret = mfd_add_devices(&interface->dev, -1, vprbrd_devs,
ARRAY_SIZE(vprbrd_devs), NULL, 0, NULL);
if (ret != 0) {
dev_err(&interface->dev, "Failed to add mfd devices to core.");
goto error;
}
return 0;
error:
if (vb) {
usb_put_dev(vb->usb_dev);
kfree(vb);
}
return ret;
}
static void vprbrd_disconnect(struct usb_interface *interface)
{
struct vprbrd *vb = usb_get_intfdata(interface);
mfd_remove_devices(&interface->dev);
usb_set_intfdata(interface, NULL);
usb_put_dev(vb->usb_dev);
kfree(vb);
dev_dbg(&interface->dev, "disconnected\n");
}
static struct usb_driver vprbrd_driver = {
.name = "viperboard",
.probe = vprbrd_probe,
.disconnect = vprbrd_disconnect,
.id_table = vprbrd_table,
};
module_usb_driver(vprbrd_driver);
MODULE_DESCRIPTION("Nano River Technologies viperboard mfd core driver");
MODULE_AUTHOR("Lars Poeschel <poeschel@lemonage.de>");
MODULE_LICENSE("GPL");

35
drivers/mfd/wm5102-tables.c
View File

@ -56,6 +56,18 @@ static const struct reg_default wm5102_reva_patch[] = {
{ 0x80, 0x0000 },
};
static const struct reg_default wm5102_revb_patch[] = {
{ 0x80, 0x0003 },
{ 0x081, 0xE022 },
{ 0x410, 0x6080 },
{ 0x418, 0x6080 },
{ 0x420, 0x6080 },
{ 0x428, 0xC000 },
{ 0x441, 0x8014 },
{ 0x458, 0x000b },
{ 0x80, 0x0000 },
};
/* We use a function so we can use ARRAY_SIZE() */
int wm5102_patch(struct arizona *arizona)
{
@ -65,7 +77,9 @@ int wm5102_patch(struct arizona *arizona)
wm5102_reva_patch,
ARRAY_SIZE(wm5102_reva_patch));
default:
return 0;
return regmap_register_patch(arizona->regmap,
wm5102_revb_patch,
ARRAY_SIZE(wm5102_revb_patch));
}
}
@ -291,6 +305,7 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */
{ 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */
{ 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */
{ 0x00000212, 0x0001 }, /* R530 - LDO1 Control 2 */
{ 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */
{ 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */
{ 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */
@ -1056,6 +1071,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_FLL1_CONTROL_5:
case ARIZONA_FLL1_CONTROL_6:
case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
case ARIZONA_FLL1_NCO_TEST_0:
case ARIZONA_FLL1_SYNCHRONISER_1:
case ARIZONA_FLL1_SYNCHRONISER_2:
case ARIZONA_FLL1_SYNCHRONISER_3:
@ -1071,6 +1087,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_FLL2_CONTROL_5:
case ARIZONA_FLL2_CONTROL_6:
case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
case ARIZONA_FLL2_NCO_TEST_0:
case ARIZONA_FLL2_SYNCHRONISER_1:
case ARIZONA_FLL2_SYNCHRONISER_2:
case ARIZONA_FLL2_SYNCHRONISER_3:
@ -1805,6 +1822,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_DSP1_CLOCKING_1:
case ARIZONA_DSP1_STATUS_1:
case ARIZONA_DSP1_STATUS_2:
case ARIZONA_DSP1_STATUS_3:
return true;
default:
return false;
@ -1813,15 +1831,23 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
{
if (reg > 0xffff)
return true;
switch (reg) {
case ARIZONA_SOFTWARE_RESET:
case ARIZONA_DEVICE_REVISION:
case ARIZONA_OUTPUT_STATUS_1:
case ARIZONA_RAW_OUTPUT_STATUS_1:
case ARIZONA_SLIMBUS_RX_PORT_STATUS:
case ARIZONA_SLIMBUS_TX_PORT_STATUS:
case ARIZONA_SAMPLE_RATE_1_STATUS:
case ARIZONA_SAMPLE_RATE_2_STATUS:
case ARIZONA_SAMPLE_RATE_3_STATUS:
case ARIZONA_HAPTICS_STATUS:
case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
case ARIZONA_FLL1_NCO_TEST_0:
case ARIZONA_FLL2_NCO_TEST_0:
case ARIZONA_FX_CTRL2:
case ARIZONA_INTERRUPT_STATUS_1:
case ARIZONA_INTERRUPT_STATUS_2:
@ -1847,6 +1873,7 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
case ARIZONA_AOD_IRQ_RAW_STATUS:
case ARIZONA_DSP1_STATUS_1:
case ARIZONA_DSP1_STATUS_2:
case ARIZONA_DSP1_STATUS_3:
case ARIZONA_HEADPHONE_DETECT_2:
case ARIZONA_MIC_DETECT_3:
return true;
@ -1855,12 +1882,14 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
}
}
#define WM5102_MAX_REGISTER 0x1a8fff
const struct regmap_config wm5102_spi_regmap = {
.reg_bits = 32,
.pad_bits = 16,
.val_bits = 16,
.max_register = ARIZONA_DSP1_STATUS_2,
.max_register = WM5102_MAX_REGISTER,
.readable_reg = wm5102_readable_register,
.volatile_reg = wm5102_volatile_register,
@ -1874,7 +1903,7 @@ const struct regmap_config wm5102_i2c_regmap = {
.reg_bits = 32,
.val_bits = 16,
.max_register = ARIZONA_DSP1_STATUS_2,
.max_register = WM5102_MAX_REGISTER,
.readable_reg = wm5102_readable_register,
.volatile_reg = wm5102_volatile_register,

17
drivers/mfd/wm8994-core.c
View File

@ -535,11 +535,10 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
break;
case 2:
case 3:
default:
regmap_patch = wm8994_revc_patch;
patch_regs = ARRAY_SIZE(wm8994_revc_patch);
break;
default:
break;
}
break;
@ -558,17 +557,9 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
/* Revision C did not change the relevant layer */
if (wm8994->revision > 1)
wm8994->revision++;
switch (wm8994->revision) {
case 0:
case 1:
case 2:
case 3:
regmap_patch = wm1811_reva_patch;
patch_regs = ARRAY_SIZE(wm1811_reva_patch);
break;
default:
break;
}
regmap_patch = wm1811_reva_patch;
patch_regs = ARRAY_SIZE(wm1811_reva_patch);
break;
default:

2
drivers/mmc/host/Makefile
View File

@ -49,6 +49,8 @@ obj-$(CONFIG_MMC_WMT) += wmt-sdmmc.o
obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o
obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o
obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o

4
drivers/mmc/host/rtsx_pci_sdmmc.c
View File

@ -21,6 +21,7 @@
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/highmem.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
@ -382,8 +383,6 @@ static int sd_rw_multi(struct realtek_pci_sdmmc *host, struct mmc_request *mrq)
0xFF, (u8)data->blocks);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
0xFF, (u8)(data->blocks >> 8));
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
CARD_DATA_SOURCE, 0x01, RING_BUFFER);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,
DMA_DONE_INT, DMA_DONE_INT);
@ -407,6 +406,7 @@ static int sd_rw_multi(struct realtek_pci_sdmmc *host, struct mmc_request *mrq)
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0x01, RING_BUFFER);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
trans_mode | SD_TRANSFER_START);
rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,

44
drivers/power/da9052-battery.c
View File

@ -440,8 +440,10 @@ static int da9052_bat_check_health(struct da9052_battery *bat, int *health)
static irqreturn_t da9052_bat_irq(int irq, void *data)
{
struct da9052_battery *bat = data;
int virq;
irq -= bat->da9052->irq_base;
virq = regmap_irq_get_virq(bat->da9052->irq_data, irq);
irq -= virq;
if (irq == DA9052_IRQ_CHGEND)
bat->status = POWER_SUPPLY_STATUS_FULL;
@ -567,7 +569,7 @@ static struct power_supply template_battery = {
.get_property = da9052_bat_get_property,
};
static const char *const da9052_bat_irqs[] = {
static char *da9052_bat_irqs[] = {
"BATT TEMP",
"DCIN DET",
"DCIN REM",
@ -576,12 +578,20 @@ static const char *const da9052_bat_irqs[] = {
"CHG END",
};
static int da9052_bat_irq_bits[] = {
DA9052_IRQ_TBAT,
DA9052_IRQ_DCIN,
DA9052_IRQ_DCINREM,
DA9052_IRQ_VBUS,
DA9052_IRQ_VBUSREM,
DA9052_IRQ_CHGEND,
};
static s32 da9052_bat_probe(struct platform_device *pdev)
{
struct da9052_pdata *pdata;
struct da9052_battery *bat;
int ret;
int irq;
int i;
bat = kzalloc(sizeof(struct da9052_battery), GFP_KERNEL);
@ -602,15 +612,14 @@ static s32 da9052_bat_probe(struct platform_device *pdev)
bat->psy.use_for_apm = 1;
for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++) {
irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]);
ret = request_threaded_irq(bat->da9052->irq_base + irq,
NULL, da9052_bat_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
da9052_bat_irqs[i], bat);
ret = da9052_request_irq(bat->da9052,
da9052_bat_irq_bits[i], da9052_bat_irqs[i],
da9052_bat_irq, bat);
if (ret != 0) {
dev_err(bat->da9052->dev,
"DA9052 failed to request %s IRQ %d: %d\n",
da9052_bat_irqs[i], irq, ret);
"DA9052 failed to request %s IRQ: %d\n",
da9052_bat_irqs[i], ret);
goto err;
}
}
@ -623,23 +632,20 @@ static s32 da9052_bat_probe(struct platform_device *pdev)
return 0;
err:
while (--i >= 0) {
irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]);
free_irq(bat->da9052->irq_base + irq, bat);
}
while (--i >= 0)
da9052_free_irq(bat->da9052, da9052_bat_irq_bits[i], bat);
kfree(bat);
return ret;
}
static int da9052_bat_remove(struct platform_device *pdev)
{
int i;
int irq;
struct da9052_battery *bat = platform_get_drvdata(pdev);
for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++) {
irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]);
free_irq(bat->da9052->irq_base + irq, bat);
}
for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++)
da9052_free_irq(bat->da9052, da9052_bat_irq_bits[i], bat);
power_supply_unregister(&bat->psy);
kfree(bat);

32
drivers/rtc/rtc-twl.c
View File

@ -233,7 +233,7 @@ static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
*/
static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
unsigned char rtc_data[ALL_TIME_REGS + 1];
unsigned char rtc_data[ALL_TIME_REGS];
int ret;
u8 save_control;
u8 rtc_control;
@ -300,15 +300,15 @@ static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
unsigned char save_control;
unsigned char rtc_data[ALL_TIME_REGS + 1];
unsigned char rtc_data[ALL_TIME_REGS];
int ret;
rtc_data[1] = bin2bcd(tm->tm_sec);
rtc_data[2] = bin2bcd(tm->tm_min);
rtc_data[3] = bin2bcd(tm->tm_hour);
rtc_data[4] = bin2bcd(tm->tm_mday);
rtc_data[5] = bin2bcd(tm->tm_mon + 1);
rtc_data[6] = bin2bcd(tm->tm_year - 100);
rtc_data[0] = bin2bcd(tm->tm_sec);
rtc_data[1] = bin2bcd(tm->tm_min);
rtc_data[2] = bin2bcd(tm->tm_hour);
rtc_data[3] = bin2bcd(tm->tm_mday);
rtc_data[4] = bin2bcd(tm->tm_mon + 1);
rtc_data[5] = bin2bcd(tm->tm_year - 100);
/* Stop RTC while updating the TC registers */
ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
@ -341,7 +341,7 @@ out:
*/
static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
unsigned char rtc_data[ALL_TIME_REGS + 1];
unsigned char rtc_data[ALL_TIME_REGS];
int ret;
ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
@ -368,19 +368,19 @@ static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
unsigned char alarm_data[ALL_TIME_REGS + 1];
unsigned char alarm_data[ALL_TIME_REGS];
int ret;
ret = twl_rtc_alarm_irq_enable(dev, 0);
if (ret)
goto out;
alarm_data[1] = bin2bcd(alm->time.tm_sec);
alarm_data[2] = bin2bcd(alm->time.tm_min);
alarm_data[3] = bin2bcd(alm->time.tm_hour);
alarm_data[4] = bin2bcd(alm->time.tm_mday);
alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
alarm_data[0] = bin2bcd(alm->time.tm_sec);
alarm_data[1] = bin2bcd(alm->time.tm_min);
alarm_data[2] = bin2bcd(alm->time.tm_hour);
alarm_data[3] = bin2bcd(alm->time.tm_mday);
alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
/* update all the alarm registers in one shot */
ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,

65
include/linux/i2c/twl.h
View File

@ -39,52 +39,51 @@
* address each module uses within a given i2c slave.
*/
/* Slave 0 (i2c address 0x48) */
#define TWL4030_MODULE_USB 0x00
enum twl4030_module_ids {
TWL4030_MODULE_USB = 0, /* Slave 0 (i2c address 0x48) */
TWL4030_MODULE_AUDIO_VOICE, /* Slave 1 (i2c address 0x49) */
TWL4030_MODULE_GPIO,
TWL4030_MODULE_INTBR,
TWL4030_MODULE_PIH,
/* Slave 1 (i2c address 0x49) */
#define TWL4030_MODULE_AUDIO_VOICE 0x01
#define TWL4030_MODULE_GPIO 0x02
#define TWL4030_MODULE_INTBR 0x03
#define TWL4030_MODULE_PIH 0x04
#define TWL4030_MODULE_TEST 0x05
TWL4030_MODULE_TEST,
TWL4030_MODULE_KEYPAD, /* Slave 2 (i2c address 0x4a) */
TWL4030_MODULE_MADC,
TWL4030_MODULE_INTERRUPTS,
TWL4030_MODULE_LED,
/* Slave 2 (i2c address 0x4a) */
#define TWL4030_MODULE_KEYPAD 0x06
#define TWL4030_MODULE_MADC 0x07
#define TWL4030_MODULE_INTERRUPTS 0x08
#define TWL4030_MODULE_LED 0x09
#define TWL4030_MODULE_MAIN_CHARGE 0x0A
#define TWL4030_MODULE_PRECHARGE 0x0B
#define TWL4030_MODULE_PWM0 0x0C
#define TWL4030_MODULE_PWM1 0x0D
#define TWL4030_MODULE_PWMA 0x0E
#define TWL4030_MODULE_PWMB 0x0F
TWL4030_MODULE_MAIN_CHARGE,
TWL4030_MODULE_PRECHARGE,
TWL4030_MODULE_PWM0,
TWL4030_MODULE_PWM1,
TWL4030_MODULE_PWMA,
#define TWL5031_MODULE_ACCESSORY 0x10
#define TWL5031_MODULE_INTERRUPTS 0x11
TWL4030_MODULE_PWMB,
TWL5031_MODULE_ACCESSORY,
TWL5031_MODULE_INTERRUPTS,
TWL4030_MODULE_BACKUP, /* Slave 3 (i2c address 0x4b) */
TWL4030_MODULE_INT,
/* Slave 3 (i2c address 0x4b) */
#define TWL4030_MODULE_BACKUP 0x12
#define TWL4030_MODULE_INT 0x13
#define TWL4030_MODULE_PM_MASTER 0x14
#define TWL4030_MODULE_PM_RECEIVER 0x15
#define TWL4030_MODULE_RTC 0x16
#define TWL4030_MODULE_SECURED_REG 0x17
TWL4030_MODULE_PM_MASTER,
TWL4030_MODULE_PM_RECEIVER,
TWL4030_MODULE_RTC,
TWL4030_MODULE_SECURED_REG,
TWL4030_MODULE_LAST,
};
/* Similar functionalities implemented in TWL4030/6030 */
#define TWL_MODULE_USB TWL4030_MODULE_USB
#define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE
#define TWL_MODULE_PIH TWL4030_MODULE_PIH
#define TWL_MODULE_MADC TWL4030_MODULE_MADC
#define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE
#define TWL_MODULE_PM_MASTER TWL4030_MODULE_PM_MASTER
#define TWL_MODULE_PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
#define TWL_MODULE_RTC TWL4030_MODULE_RTC
#define TWL_MODULE_PWM TWL4030_MODULE_PWM0
#define TWL_MODULE_LED TWL4030_MODULE_LED
#define TWL6030_MODULE_ID0 0x0D
#define TWL6030_MODULE_ID1 0x0E
#define TWL6030_MODULE_ID2 0x0F
#define TWL6030_MODULE_ID0 13
#define TWL6030_MODULE_ID1 14
#define TWL6030_MODULE_ID2 15
#define GPIO_INTR_OFFSET 0
#define KEYPAD_INTR_OFFSET 1

23
include/linux/input/ti_am335x_tsc.h Normal file
View File

@ -0,0 +1,23 @@
#ifndef __LINUX_TI_AM335X_TSC_H
#define __LINUX_TI_AM335X_TSC_H
/**
* struct tsc_data Touchscreen wire configuration
* @wires: Wires refer to application modes
* i.e. 4/5/8 wire touchscreen support
* on the platform.
* @x_plate_resistance: X plate resistance.
* @steps_to_configure: The sequencer supports a total of
* 16 programmable steps.
* A step configured to read a single
* co-ordinate value, can be applied
* more number of times for better results.
*/
struct tsc_data {
int wires;
int x_plate_resistance;
int steps_to_configure;
};
#endif

17
include/linux/input/ti_tscadc.h
View File

@ -1,17 +0,0 @@
#ifndef __LINUX_TI_TSCADC_H
#define __LINUX_TI_TSCADC_H
/**
* struct tsc_data Touchscreen wire configuration
* @wires: Wires refer to application modes
* i.e. 4/5/8 wire touchscreen support
* on the platform.
* @x_plate_resistance: X plate resistance.
*/
struct tsc_data {
int wires;
int x_plate_resistance;
};
#endif

1
include/linux/mfd/arizona/registers.h
View File

@ -981,6 +981,7 @@
#define ARIZONA_DSP1_CLOCKING_1 0x1101
#define ARIZONA_DSP1_STATUS_1 0x1104
#define ARIZONA_DSP1_STATUS_2 0x1105
#define ARIZONA_DSP1_STATUS_3 0x1106
#define ARIZONA_DSP2_CONTROL_1 0x1200
#define ARIZONA_DSP2_CLOCKING_1 0x1201
#define ARIZONA_DSP2_STATUS_1 0x1204

126
include/linux/mfd/as3711.h Normal file
View File

@ -0,0 +1,126 @@
/*
* AS3711 PMIC MFC driver header
*
* Copyright (C) 2012 Renesas Electronics Corporation
* Author: Guennadi Liakhovetski, <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License as
* published by the Free Software Foundation
*/
#ifndef MFD_AS3711_H
#define MFD_AS3711_H
/*
* Client data
*/
/* Register addresses */
#define AS3711_SD_1_VOLTAGE 0 /* Digital Step-Down */
#define AS3711_SD_2_VOLTAGE 1
#define AS3711_SD_3_VOLTAGE 2
#define AS3711_SD_4_VOLTAGE 3
#define AS3711_LDO_1_VOLTAGE 4 /* Analog LDO */
#define AS3711_LDO_2_VOLTAGE 5
#define AS3711_LDO_3_VOLTAGE 6 /* Digital LDO */
#define AS3711_LDO_4_VOLTAGE 7
#define AS3711_LDO_5_VOLTAGE 8
#define AS3711_LDO_6_VOLTAGE 9
#define AS3711_LDO_7_VOLTAGE 0xa
#define AS3711_LDO_8_VOLTAGE 0xb
#define AS3711_SD_CONTROL 0x10
#define AS3711_GPIO_SIGNAL_OUT 0x20
#define AS3711_GPIO_SIGNAL_IN 0x21
#define AS3711_SD_CONTROL_1 0x30
#define AS3711_SD_CONTROL_2 0x31
#define AS3711_CURR_CONTROL 0x40
#define AS3711_CURR1_VALUE 0x43
#define AS3711_CURR2_VALUE 0x44
#define AS3711_CURR3_VALUE 0x45
#define AS3711_STEPUP_CONTROL_1 0x50
#define AS3711_STEPUP_CONTROL_2 0x51
#define AS3711_STEPUP_CONTROL_4 0x53
#define AS3711_STEPUP_CONTROL_5 0x54
#define AS3711_REG_STATUS 0x73
#define AS3711_INTERRUPT_STATUS_1 0x77
#define AS3711_INTERRUPT_STATUS_2 0x78
#define AS3711_INTERRUPT_STATUS_3 0x79
#define AS3711_CHARGER_STATUS_1 0x86
#define AS3711_CHARGER_STATUS_2 0x87
#define AS3711_ASIC_ID_1 0x90
#define AS3711_ASIC_ID_2 0x91
#define AS3711_MAX_REGS 0x92
/* Regulators */
enum {
AS3711_REGULATOR_SD_1,
AS3711_REGULATOR_SD_2,
AS3711_REGULATOR_SD_3,
AS3711_REGULATOR_SD_4,
AS3711_REGULATOR_LDO_1,
AS3711_REGULATOR_LDO_2,
AS3711_REGULATOR_LDO_3,
AS3711_REGULATOR_LDO_4,
AS3711_REGULATOR_LDO_5,
AS3711_REGULATOR_LDO_6,
AS3711_REGULATOR_LDO_7,
AS3711_REGULATOR_LDO_8,
AS3711_REGULATOR_MAX,
};
struct device;
struct regmap;
struct as3711 {
struct device *dev;
struct regmap *regmap;
};
#define AS3711_MAX_STEPDOWN 4
#define AS3711_MAX_STEPUP 2
#define AS3711_MAX_LDO 8
enum as3711_su2_feedback {
AS3711_SU2_VOLTAGE,
AS3711_SU2_CURR1,
AS3711_SU2_CURR2,
AS3711_SU2_CURR3,
AS3711_SU2_CURR_AUTO,
};
enum as3711_su2_fbprot {
AS3711_SU2_LX_SD4,
AS3711_SU2_GPIO2,
AS3711_SU2_GPIO3,
AS3711_SU2_GPIO4,
};
/*
* Platform data
*/
struct as3711_regulator_pdata {
struct regulator_init_data *init_data[AS3711_REGULATOR_MAX];
};
struct as3711_bl_pdata {
const char *su1_fb;
int su1_max_uA;
const char *su2_fb;
int su2_max_uA;
enum as3711_su2_feedback su2_feedback;
enum as3711_su2_fbprot su2_fbprot;
bool su2_auto_curr1;
bool su2_auto_curr2;
bool su2_auto_curr3;
};
struct as3711_platform_data {
struct as3711_regulator_pdata regulator;
struct as3711_bl_pdata backlight;
};
#endif

10
include/linux/mfd/da9052/da9052.h
View File

@ -146,4 +146,14 @@ void da9052_device_exit(struct da9052 *da9052);
extern struct regmap_config da9052_regmap_config;
int da9052_irq_init(struct da9052 *da9052);
int da9052_irq_exit(struct da9052 *da9052);
int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
irq_handler_t handler, void *data);
void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
int da9052_enable_irq(struct da9052 *da9052, int irq);
int da9052_disable_irq(struct da9052 *da9052, int irq);
int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
#endif /* __MFD_DA9052_DA9052_H */

2
include/linux/mfd/da9055/core.h
View File

@ -1,4 +1,4 @@
/*
/*
* da9055 declarations for DA9055 PMICs.
*
* Copyright(c) 2012 Dialog Semiconductor Ltd.

2
include/linux/mfd/da9055/pdata.h
View File

@ -1,4 +1,4 @@
/* Copyright (C) 2012 Dialog Semiconductor Ltd.
/* Copyright (C) 2012 Dialog Semiconductor Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

2
include/linux/mfd/da9055/reg.h
View File

@ -1,4 +1,4 @@
/*
/*
* DA9055 declarations for DA9055 PMICs.
*
* Copyright(c) 2012 Dialog Semiconductor Ltd.

3
include/linux/mfd/rc5t583.h
View File

@ -33,6 +33,7 @@
/* Maximum number of main interrupts */
#define MAX_MAIN_INTERRUPT 5
#define RC5T583_MAX_GPEDGE_REG 2
#define RC5T583_MAX_INTERRUPT_EN_REGS 8
#define RC5T583_MAX_INTERRUPT_MASK_REGS 9
/* Interrupt enable register */
@ -304,7 +305,7 @@ struct rc5t583 {
uint8_t intc_inten_reg;
/* For group interrupt bits and address */
uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_MASK_REGS];
uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_EN_REGS];
/* For gpio edge */
uint8_t gpedge_reg[RC5T583_MAX_GPEDGE_REG];

22
include/linux/mfd/retu.h Normal file
View File

@ -0,0 +1,22 @@
/*
* Retu MFD driver interface
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of this
* archive for more details.
*/
#ifndef __LINUX_MFD_RETU_H
#define __LINUX_MFD_RETU_H
struct retu_dev;
int retu_read(struct retu_dev *, u8);
int retu_write(struct retu_dev *, u8, u16);
/* Registers */
#define RETU_REG_WATCHDOG 0x17 /* Watchdog */
#define RETU_REG_CC1 0x0d /* Common control register 1 */
#define RETU_REG_STATUS 0x16 /* Status register */
#endif /* __LINUX_MFD_RETU_H */

198
include/linux/mfd/sta2x11-mfd.h
View File

@ -26,6 +26,28 @@
#include <linux/types.h>
#include <linux/pci.h>
enum sta2x11_mfd_plat_dev {
sta2x11_sctl = 0,
sta2x11_gpio,
sta2x11_scr,
sta2x11_time,
sta2x11_apbreg,
sta2x11_apb_soc_regs,
sta2x11_vic,
sta2x11_n_mfd_plat_devs,
};
#define STA2X11_MFD_SCTL_NAME "sta2x11-sctl"
#define STA2X11_MFD_GPIO_NAME "sta2x11-gpio"
#define STA2X11_MFD_SCR_NAME "sta2x11-scr"
#define STA2X11_MFD_TIME_NAME "sta2x11-time"
#define STA2X11_MFD_APBREG_NAME "sta2x11-apbreg"
#define STA2X11_MFD_APB_SOC_REGS_NAME "sta2x11-apb-soc-regs"
#define STA2X11_MFD_VIC_NAME "sta2x11-vic"
extern u32
__sta2x11_mfd_mask(struct pci_dev *, u32, u32, u32, enum sta2x11_mfd_plat_dev);
/*
* The MFD PCI block includes the GPIO peripherals and other register blocks.
* For GPIO, we have 32*4 bits (I use "gsta" for "gpio sta2x11".)
@ -182,7 +204,11 @@ struct sta2x11_gpio_pdata {
* The APB bridge has its own registers, needed by our users as well.
* They are accessed with the following read/mask/write function.
*/
u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val);
static inline u32
sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
{
return __sta2x11_mfd_mask(pdev, reg, mask, val, sta2x11_apbreg);
}
/* CAN and MLB */
#define APBREG_BSR 0x00 /* Bridge Status Reg */
@ -211,19 +237,45 @@ u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val);
* The system controller has its own registers. Some of these are accessed
* by out users as well, using the following read/mask/write/function
*/
u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val);
static inline
u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
{
return __sta2x11_mfd_mask(pdev, reg, mask, val, sta2x11_sctl);
}
#define SCTL_SCCTL 0x00 /* System controller control register */
#define SCTL_ARMCFG 0x04 /* ARM configuration register */
#define SCTL_SCPLLCTL 0x08 /* PLL control status register */
#define SCTL_SCPLLCTL_AUDIO_PLL_PD BIT(1)
#define SCTL_SCPLLCTL_FRAC_CONTROL BIT(3)
#define SCTL_SCPLLCTL_STRB_BYPASS BIT(6)
#define SCTL_SCPLLCTL_STRB_INPUT BIT(8)
#define SCTL_SCPLLFCTRL 0x0c /* PLL frequency control register */
#define SCTL_SCPLLFCTRL_AUDIO_PLL_NDIV_MASK 0xff
#define SCTL_SCPLLFCTRL_AUDIO_PLL_NDIV_SHIFT 10
#define SCTL_SCPLLFCTRL_AUDIO_PLL_IDF_MASK 7
#define SCTL_SCPLLFCTRL_AUDIO_PLL_IDF_SHIFT 21
#define SCTL_SCPLLFCTRL_AUDIO_PLL_ODF_MASK 7
#define SCTL_SCPLLFCTRL_AUDIO_PLL_ODF_SHIFT 18
#define SCTL_SCPLLFCTRL_DITHER_DISABLE_MASK 0x03
#define SCTL_SCPLLFCTRL_DITHER_DISABLE_SHIFT 4
#define SCTL_SCRESFRACT 0x10 /* PLL fractional input register */
#define SCTL_SCRESFRACT_MASK 0x0000ffff
#define SCTL_SCRESCTRL1 0x14 /* Peripheral reset control 1 */
#define SCTL_SCRESXTRL2 0x18 /* Peripheral reset control 2 */
#define SCTL_SCPEREN0 0x1c /* Peripheral clock enable register 0 */
#define SCTL_SCPEREN1 0x20 /* Peripheral clock enable register 1 */
#define SCTL_SCPEREN2 0x24 /* Peripheral clock enable register 2 */
#define SCTL_SCGRST 0x28 /* Peripheral global reset */
#define SCTL_SCPCIECSBRST 0x2c /* PCIe PAB CSB reset status register */
#define SCTL_SCPCIPMCR1 0x30 /* PCI power management control 1 */
#define SCTL_SCPCIPMCR2 0x34 /* PCI power management control 2 */
#define SCTL_SCPCIPMSR1 0x38 /* PCI power management status 1 */
@ -321,4 +373,146 @@ u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val);
#define SCTL_SCPEREN1_I2C3 (1 << 16)
#define SCTL_SCPEREN1_USB_PHY (1 << 17)
/*
* APB-SOC registers
*/
static inline
u32 sta2x11_apb_soc_regs_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
{
return __sta2x11_mfd_mask(pdev, reg, mask, val, sta2x11_apb_soc_regs);
}
#define PCIE_EP1_FUNC3_0_INTR_REG 0x000
#define PCIE_EP1_FUNC7_4_INTR_REG 0x004
#define PCIE_EP2_FUNC3_0_INTR_REG 0x008
#define PCIE_EP2_FUNC7_4_INTR_REG 0x00c
#define PCIE_EP3_FUNC3_0_INTR_REG 0x010
#define PCIE_EP3_FUNC7_4_INTR_REG 0x014
#define PCIE_EP4_FUNC3_0_INTR_REG 0x018
#define PCIE_EP4_FUNC7_4_INTR_REG 0x01c
#define PCIE_INTR_ENABLE0_REG 0x020
#define PCIE_INTR_ENABLE1_REG 0x024
#define PCIE_EP1_FUNC_TC_REG 0x028
#define PCIE_EP2_FUNC_TC_REG 0x02c
#define PCIE_EP3_FUNC_TC_REG 0x030
#define PCIE_EP4_FUNC_TC_REG 0x034
#define PCIE_EP1_FUNC_F_REG 0x038
#define PCIE_EP2_FUNC_F_REG 0x03c
#define PCIE_EP3_FUNC_F_REG 0x040
#define PCIE_EP4_FUNC_F_REG 0x044
#define PCIE_PAB_AMBA_SW_RST_REG 0x048
#define PCIE_PM_STATUS_0_PORT_0_4 0x04c
#define PCIE_PM_STATUS_7_0_EP1 0x050
#define PCIE_PM_STATUS_7_0_EP2 0x054
#define PCIE_PM_STATUS_7_0_EP3 0x058
#define PCIE_PM_STATUS_7_0_EP4 0x05c
#define PCIE_DEV_ID_0_EP1_REG 0x060
#define PCIE_CC_REV_ID_0_EP1_REG 0x064
#define PCIE_DEV_ID_1_EP1_REG 0x068
#define PCIE_CC_REV_ID_1_EP1_REG 0x06c
#define PCIE_DEV_ID_2_EP1_REG 0x070
#define PCIE_CC_REV_ID_2_EP1_REG 0x074
#define PCIE_DEV_ID_3_EP1_REG 0x078
#define PCIE_CC_REV_ID_3_EP1_REG 0x07c
#define PCIE_DEV_ID_4_EP1_REG 0x080
#define PCIE_CC_REV_ID_4_EP1_REG 0x084
#define PCIE_DEV_ID_5_EP1_REG 0x088
#define PCIE_CC_REV_ID_5_EP1_REG 0x08c
#define PCIE_DEV_ID_6_EP1_REG 0x090
#define PCIE_CC_REV_ID_6_EP1_REG 0x094
#define PCIE_DEV_ID_7_EP1_REG 0x098
#define PCIE_CC_REV_ID_7_EP1_REG 0x09c
#define PCIE_DEV_ID_0_EP2_REG 0x0a0
#define PCIE_CC_REV_ID_0_EP2_REG 0x0a4
#define PCIE_DEV_ID_1_EP2_REG 0x0a8
#define PCIE_CC_REV_ID_1_EP2_REG 0x0ac
#define PCIE_DEV_ID_2_EP2_REG 0x0b0
#define PCIE_CC_REV_ID_2_EP2_REG 0x0b4
#define PCIE_DEV_ID_3_EP2_REG 0x0b8
#define PCIE_CC_REV_ID_3_EP2_REG 0x0bc
#define PCIE_DEV_ID_4_EP2_REG 0x0c0
#define PCIE_CC_REV_ID_4_EP2_REG 0x0c4
#define PCIE_DEV_ID_5_EP2_REG 0x0c8
#define PCIE_CC_REV_ID_5_EP2_REG 0x0cc
#define PCIE_DEV_ID_6_EP2_REG 0x0d0
#define PCIE_CC_REV_ID_6_EP2_REG 0x0d4
#define PCIE_DEV_ID_7_EP2_REG 0x0d8
#define PCIE_CC_REV_ID_7_EP2_REG 0x0dC
#define PCIE_DEV_ID_0_EP3_REG 0x0e0
#define PCIE_CC_REV_ID_0_EP3_REG 0x0e4
#define PCIE_DEV_ID_1_EP3_REG 0x0e8
#define PCIE_CC_REV_ID_1_EP3_REG 0x0ec
#define PCIE_DEV_ID_2_EP3_REG 0x0f0
#define PCIE_CC_REV_ID_2_EP3_REG 0x0f4
#define PCIE_DEV_ID_3_EP3_REG 0x0f8
#define PCIE_CC_REV_ID_3_EP3_REG 0x0fc
#define PCIE_DEV_ID_4_EP3_REG 0x100
#define PCIE_CC_REV_ID_4_EP3_REG 0x104
#define PCIE_DEV_ID_5_EP3_REG 0x108
#define PCIE_CC_REV_ID_5_EP3_REG 0x10c
#define PCIE_DEV_ID_6_EP3_REG 0x110
#define PCIE_CC_REV_ID_6_EP3_REG 0x114
#define PCIE_DEV_ID_7_EP3_REG 0x118
#define PCIE_CC_REV_ID_7_EP3_REG 0x11c
#define PCIE_DEV_ID_0_EP4_REG 0x120
#define PCIE_CC_REV_ID_0_EP4_REG 0x124
#define PCIE_DEV_ID_1_EP4_REG 0x128
#define PCIE_CC_REV_ID_1_EP4_REG 0x12c
#define PCIE_DEV_ID_2_EP4_REG 0x130
#define PCIE_CC_REV_ID_2_EP4_REG 0x134
#define PCIE_DEV_ID_3_EP4_REG 0x138
#define PCIE_CC_REV_ID_3_EP4_REG 0x13c
#define PCIE_DEV_ID_4_EP4_REG 0x140
#define PCIE_CC_REV_ID_4_EP4_REG 0x144
#define PCIE_DEV_ID_5_EP4_REG 0x148
#define PCIE_CC_REV_ID_5_EP4_REG 0x14c
#define PCIE_DEV_ID_6_EP4_REG 0x150
#define PCIE_CC_REV_ID_6_EP4_REG 0x154
#define PCIE_DEV_ID_7_EP4_REG 0x158
#define PCIE_CC_REV_ID_7_EP4_REG 0x15c
#define PCIE_SUBSYS_VEN_ID_REG 0x160
#define PCIE_COMMON_CLOCK_CONFIG_0_4_0 0x164
#define PCIE_MIPHYP_SSC_EN_REG 0x168
#define PCIE_MIPHYP_ADDR_REG 0x16c
#define PCIE_L1_ASPM_READY_REG 0x170
#define PCIE_EXT_CFG_RDY_REG 0x174
#define PCIE_SoC_INT_ROUTER_STATUS0_REG 0x178
#define PCIE_SoC_INT_ROUTER_STATUS1_REG 0x17c
#define PCIE_SoC_INT_ROUTER_STATUS2_REG 0x180
#define PCIE_SoC_INT_ROUTER_STATUS3_REG 0x184
#define DMA_IP_CTRL_REG 0x324
#define DISP_BRIDGE_PU_PD_CTRL_REG 0x328
#define VIP_PU_PD_CTRL_REG 0x32c
#define USB_MLB_PU_PD_CTRL_REG 0x330
#define SDIO_PU_PD_MISCFUNC_CTRL_REG1 0x334
#define SDIO_PU_PD_MISCFUNC_CTRL_REG2 0x338
#define UART_PU_PD_CTRL_REG 0x33c
#define ARM_Lock 0x340
#define SYS_IO_CHAR_REG1 0x344
#define SYS_IO_CHAR_REG2 0x348
#define SATA_CORE_ID_REG 0x34c
#define SATA_CTRL_REG 0x350
#define I2C_HSFIX_MISC_REG 0x354
#define SPARE2_RESERVED 0x358
#define SPARE3_RESERVED 0x35c
#define MASTER_LOCK_REG 0x368
#define SYSTEM_CONFIG_STATUS_REG 0x36c
#define MSP_CLK_CTRL_REG 0x39c
#define COMPENSATION_REG1 0x3c4
#define COMPENSATION_REG2 0x3c8
#define COMPENSATION_REG3 0x3cc
#define TEST_CTL_REG 0x3d0
/*
* SECR (OTP) registers
*/
#define STA2X11_SECR_CR 0x00
#define STA2X11_SECR_FVR0 0x10
#define STA2X11_SECR_FVR1 0x14
extern int sta2x11_mfd_get_regs_data(struct platform_device *pdev,
enum sta2x11_mfd_plat_dev index,
void __iomem **regs,
spinlock_t **lock);
#endif /* __STA2X11_MFD_H */

4
include/linux/mfd/stmpe.h
View File

@ -62,6 +62,7 @@ struct stmpe_client_info;
* @lock: lock protecting I/O operations
* @irq_lock: IRQ bus lock
* @dev: device, mostly for dev_dbg()
* @irq_domain: IRQ domain
* @client: client - i2c or spi
* @ci: client specific information
* @partnum: part number
@ -79,6 +80,7 @@ struct stmpe {
struct mutex lock;
struct mutex irq_lock;
struct device *dev;
struct irq_domain *domain;
void *client;
struct stmpe_client_info *ci;
enum stmpe_partnum partnum;
@ -188,7 +190,6 @@ struct stmpe_ts_platform_data {
* @id: device id to distinguish between multiple STMPEs on the same board
* @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
* @irq_trigger: IRQ trigger to use for the interrupt to the host
* @irq_invert_polarity: IRQ line is connected with reversed polarity
* @autosleep: bool to enable/disable stmpe autosleep
* @autosleep_timeout: inactivity timeout in milliseconds for autosleep
* @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
@ -205,7 +206,6 @@ struct stmpe_platform_data {
unsigned int blocks;
int irq_base;
unsigned int irq_trigger;
bool irq_invert_polarity;
bool autosleep;
bool irq_over_gpio;
int irq_gpio;

152
include/linux/mfd/ti_am335x_tscadc.h Normal file
View File

@ -0,0 +1,152 @@
#ifndef __LINUX_TI_AM335X_TSCADC_MFD_H
#define __LINUX_TI_AM335X_TSCADC_MFD_H
/*
* TI Touch Screen / ADC MFD driver
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/mfd/core.h>
#define REG_RAWIRQSTATUS 0x024
#define REG_IRQSTATUS 0x028
#define REG_IRQENABLE 0x02C
#define REG_IRQCLR 0x030
#define REG_IRQWAKEUP 0x034
#define REG_CTRL 0x040
#define REG_ADCFSM 0x044
#define REG_CLKDIV 0x04C
#define REG_SE 0x054
#define REG_IDLECONFIG 0x058
#define REG_CHARGECONFIG 0x05C
#define REG_CHARGEDELAY 0x060
#define REG_STEPCONFIG(n) (0x64 + ((n - 1) * 8))
#define REG_STEPDELAY(n) (0x68 + ((n - 1) * 8))
#define REG_FIFO0CNT 0xE4
#define REG_FIFO0THR 0xE8
#define REG_FIFO1CNT 0xF0
#define REG_FIFO1THR 0xF4
#define REG_FIFO0 0x100
#define REG_FIFO1 0x200
/* Register Bitfields */
/* IRQ wakeup enable */
#define IRQWKUP_ENB BIT(0)
/* Step Enable */
#define STEPENB_MASK (0x1FFFF << 0)
#define STEPENB(val) ((val) << 0)
#define STPENB_STEPENB STEPENB(0x1FFFF)
#define STPENB_STEPENB_TC STEPENB(0x1FFF)
/* IRQ enable */
#define IRQENB_HW_PEN BIT(0)
#define IRQENB_FIFO0THRES BIT(2)
#define IRQENB_FIFO1THRES BIT(5)
#define IRQENB_PENUP BIT(9)
/* Step Configuration */
#define STEPCONFIG_MODE_MASK (3 << 0)
#define STEPCONFIG_MODE(val) ((val) << 0)
#define STEPCONFIG_MODE_HWSYNC STEPCONFIG_MODE(2)
#define STEPCONFIG_AVG_MASK (7 << 2)
#define STEPCONFIG_AVG(val) ((val) << 2)
#define STEPCONFIG_AVG_16 STEPCONFIG_AVG(4)
#define STEPCONFIG_XPP BIT(5)
#define STEPCONFIG_XNN BIT(6)
#define STEPCONFIG_YPP BIT(7)
#define STEPCONFIG_YNN BIT(8)
#define STEPCONFIG_XNP BIT(9)
#define STEPCONFIG_YPN BIT(10)
#define STEPCONFIG_INM_MASK (0xF << 15)
#define STEPCONFIG_INM(val) ((val) << 15)
#define STEPCONFIG_INM_ADCREFM STEPCONFIG_INM(8)
#define STEPCONFIG_INP_MASK (0xF << 19)
#define STEPCONFIG_INP(val) ((val) << 19)
#define STEPCONFIG_INP_AN2 STEPCONFIG_INP(2)
#define STEPCONFIG_INP_AN3 STEPCONFIG_INP(3)
#define STEPCONFIG_INP_AN4 STEPCONFIG_INP(4)
#define STEPCONFIG_INP_ADCREFM STEPCONFIG_INP(8)
#define STEPCONFIG_FIFO1 BIT(26)
/* Delay register */
#define STEPDELAY_OPEN_MASK (0x3FFFF << 0)
#define STEPDELAY_OPEN(val) ((val) << 0)
#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098)
#define STEPDELAY_SAMPLE_MASK (0xFF << 24)
#define STEPDELAY_SAMPLE(val) ((val) << 24)
#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0)
/* Charge Config */
#define STEPCHARGE_RFP_MASK (7 << 12)
#define STEPCHARGE_RFP(val) ((val) << 12)
#define STEPCHARGE_RFP_XPUL STEPCHARGE_RFP(1)
#define STEPCHARGE_INM_MASK (0xF << 15)
#define STEPCHARGE_INM(val) ((val) << 15)
#define STEPCHARGE_INM_AN1 STEPCHARGE_INM(1)
#define STEPCHARGE_INP_MASK (0xF << 19)
#define STEPCHARGE_INP(val) ((val) << 19)
#define STEPCHARGE_INP_AN1 STEPCHARGE_INP(1)
#define STEPCHARGE_RFM_MASK (3 << 23)
#define STEPCHARGE_RFM(val) ((val) << 23)
#define STEPCHARGE_RFM_XNUR STEPCHARGE_RFM(1)
/* Charge delay */
#define CHARGEDLY_OPEN_MASK (0x3FFFF << 0)
#define CHARGEDLY_OPEN(val) ((val) << 0)
#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(1)
/* Control register */
#define CNTRLREG_TSCSSENB BIT(0)
#define CNTRLREG_STEPID BIT(1)
#define CNTRLREG_STEPCONFIGWRT BIT(2)
#define CNTRLREG_POWERDOWN BIT(4)
#define CNTRLREG_AFE_CTRL_MASK (3 << 5)
#define CNTRLREG_AFE_CTRL(val) ((val) << 5)
#define CNTRLREG_4WIRE CNTRLREG_AFE_CTRL(1)
#define CNTRLREG_5WIRE CNTRLREG_AFE_CTRL(2)
#define CNTRLREG_8WIRE CNTRLREG_AFE_CTRL(3)
#define CNTRLREG_TSCENB BIT(7)
#define ADC_CLK 3000000
#define MAX_CLK_DIV 7
#define TOTAL_STEPS 16
#define TOTAL_CHANNELS 8
#define TSCADC_CELLS 2
enum tscadc_cells {
TSC_CELL,
ADC_CELL,
};
struct mfd_tscadc_board {
struct tsc_data *tsc_init;
struct adc_data *adc_init;
};
struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap_tscadc;
void __iomem *tscadc_base;
int irq;
struct mfd_cell cells[TSCADC_CELLS];
/* tsc device */
struct titsc *tsc;
/* adc device */
struct adc_device *adc;
};
#endif

73
include/linux/mfd/tps65090.h
View File

@ -23,6 +23,26 @@
#define __LINUX_MFD_TPS65090_H
#include <linux/irq.h>
#include <linux/regmap.h>
/* TPS65090 IRQs */
enum {
TPS65090_IRQ_VAC_STATUS_CHANGE,
TPS65090_IRQ_VSYS_STATUS_CHANGE,
TPS65090_IRQ_BAT_STATUS_CHANGE,
TPS65090_IRQ_CHARGING_STATUS_CHANGE,
TPS65090_IRQ_CHARGING_COMPLETE,
TPS65090_IRQ_OVERLOAD_DCDC1,
TPS65090_IRQ_OVERLOAD_DCDC2,
TPS65090_IRQ_OVERLOAD_DCDC3,
TPS65090_IRQ_OVERLOAD_FET1,
TPS65090_IRQ_OVERLOAD_FET2,
TPS65090_IRQ_OVERLOAD_FET3,
TPS65090_IRQ_OVERLOAD_FET4,
TPS65090_IRQ_OVERLOAD_FET5,
TPS65090_IRQ_OVERLOAD_FET6,
TPS65090_IRQ_OVERLOAD_FET7,
};
/* TPS65090 Regulator ID */
enum {
@ -44,20 +64,9 @@ enum {
};
struct tps65090 {
struct mutex lock;
struct device *dev;
struct i2c_client *client;
struct regmap *rmap;
struct irq_chip irq_chip;
struct mutex irq_lock;
int irq_base;
unsigned int id;
};
struct tps65090_subdev_info {
int id;
const char *name;
void *platform_data;
struct regmap_irq_chip_data *irq_data;
};
/*
@ -77,8 +86,6 @@ struct tps65090_regulator_plat_data {
struct tps65090_platform_data {
int irq_base;
int num_subdevs;
struct tps65090_subdev_info *subdevs;
struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
};
@ -86,9 +93,39 @@ struct tps65090_platform_data {
* NOTE: the functions below are not intended for use outside
* of the TPS65090 sub-device drivers
*/
extern int tps65090_write(struct device *dev, int reg, uint8_t val);
extern int tps65090_read(struct device *dev, int reg, uint8_t *val);
extern int tps65090_set_bits(struct device *dev, int reg, uint8_t bit_num);
extern int tps65090_clr_bits(struct device *dev, int reg, uint8_t bit_num);
static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_write(tps->rmap, reg, val);
}
static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
{
struct tps65090 *tps = dev_get_drvdata(dev);
unsigned int temp_val;
int ret;
ret = regmap_read(tps->rmap, reg, &temp_val);
if (!ret)
*val = temp_val;
return ret;
}
static inline int tps65090_set_bits(struct device *dev, int reg,
uint8_t bit_num)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
}
static inline int tps65090_clr_bits(struct device *dev, int reg,
uint8_t bit_num)
{
struct tps65090 *tps = dev_get_drvdata(dev);
return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
}
#endif /*__LINUX_MFD_TPS65090_H */

1
include/linux/mfd/tps6586x.h
View File

@ -96,5 +96,6 @@ extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
uint8_t mask);
extern int tps6586x_irq_get_virq(struct device *dev, int irq);
#endif /*__LINUX_MFD_TPS6586X_H */

143
include/linux/mfd/tps65910.h
View File

@ -572,6 +572,49 @@
#define SPARE_SPARE_MASK 0xFF
#define SPARE_SPARE_SHIFT 0
#define TPS65910_INT_STS_RTC_PERIOD_IT_MASK 0x80
#define TPS65910_INT_STS_RTC_PERIOD_IT_SHIFT 7
#define TPS65910_INT_STS_RTC_ALARM_IT_MASK 0x40
#define TPS65910_INT_STS_RTC_ALARM_IT_SHIFT 6
#define TPS65910_INT_STS_HOTDIE_IT_MASK 0x20
#define TPS65910_INT_STS_HOTDIE_IT_SHIFT 5
#define TPS65910_INT_STS_PWRHOLD_F_IT_MASK 0x10
#define TPS65910_INT_STS_PWRHOLD_F_IT_SHIFT 4
#define TPS65910_INT_STS_PWRON_LP_IT_MASK 0x08
#define TPS65910_INT_STS_PWRON_LP_IT_SHIFT 3
#define TPS65910_INT_STS_PWRON_IT_MASK 0x04
#define TPS65910_INT_STS_PWRON_IT_SHIFT 2
#define TPS65910_INT_STS_VMBHI_IT_MASK 0x02
#define TPS65910_INT_STS_VMBHI_IT_SHIFT 1
#define TPS65910_INT_STS_VMBDCH_IT_MASK 0x01
#define TPS65910_INT_STS_VMBDCH_IT_SHIFT 0
#define TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK 0x80
#define TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_SHIFT 7
#define TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK 0x40
#define TPS65910_INT_MSK_RTC_ALARM_IT_MSK_SHIFT 6
#define TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK 0x20
#define TPS65910_INT_MSK_HOTDIE_IT_MSK_SHIFT 5
#define TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK 0x10
#define TPS65910_INT_MSK_PWRHOLD_IT_MSK_SHIFT 4
#define TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK 0x08
#define TPS65910_INT_MSK_PWRON_LP_IT_MSK_SHIFT 3
#define TPS65910_INT_MSK_PWRON_IT_MSK_MASK 0x04
#define TPS65910_INT_MSK_PWRON_IT_MSK_SHIFT 2
#define TPS65910_INT_MSK_VMBHI_IT_MSK_MASK 0x02
#define TPS65910_INT_MSK_VMBHI_IT_MSK_SHIFT 1
#define TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK 0x01
#define TPS65910_INT_MSK_VMBDCH_IT_MSK_SHIFT 0
#define TPS65910_INT_STS2_GPIO0_F_IT_SHIFT 2
#define TPS65910_INT_STS2_GPIO0_F_IT_MASK 0x02
#define TPS65910_INT_STS2_GPIO0_R_IT_SHIFT 1
#define TPS65910_INT_STS2_GPIO0_R_IT_MASK 0x01
#define TPS65910_INT_MSK2_GPIO0_F_IT_MSK_SHIFT 2
#define TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK 0x02
#define TPS65910_INT_MSK2_GPIO0_R_IT_MSK_SHIFT 1
#define TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK 0x01
/*Register INT_STS (0x80) register.RegisterDescription */
#define INT_STS_RTC_PERIOD_IT_MASK 0x80
@ -580,16 +623,16 @@
#define INT_STS_RTC_ALARM_IT_SHIFT 6
#define INT_STS_HOTDIE_IT_MASK 0x20
#define INT_STS_HOTDIE_IT_SHIFT 5
#define INT_STS_PWRHOLD_IT_MASK 0x10
#define INT_STS_PWRHOLD_IT_SHIFT 4
#define INT_STS_PWRHOLD_R_IT_MASK 0x10
#define INT_STS_PWRHOLD_R_IT_SHIFT 4
#define INT_STS_PWRON_LP_IT_MASK 0x08
#define INT_STS_PWRON_LP_IT_SHIFT 3
#define INT_STS_PWRON_IT_MASK 0x04
#define INT_STS_PWRON_IT_SHIFT 2
#define INT_STS_VMBHI_IT_MASK 0x02
#define INT_STS_VMBHI_IT_SHIFT 1
#define INT_STS_VMBDCH_IT_MASK 0x01
#define INT_STS_VMBDCH_IT_SHIFT 0
#define INT_STS_PWRHOLD_F_IT_MASK 0x01
#define INT_STS_PWRHOLD_F_IT_SHIFT 0
/*Register INT_MSK (0x80) register.RegisterDescription */
@ -599,16 +642,16 @@
#define INT_MSK_RTC_ALARM_IT_MSK_SHIFT 6
#define INT_MSK_HOTDIE_IT_MSK_MASK 0x20
#define INT_MSK_HOTDIE_IT_MSK_SHIFT 5
#define INT_MSK_PWRHOLD_IT_MSK_MASK 0x10
#define INT_MSK_PWRHOLD_IT_MSK_SHIFT 4
#define INT_MSK_PWRHOLD_R_IT_MSK_MASK 0x10
#define INT_MSK_PWRHOLD_R_IT_MSK_SHIFT 4
#define INT_MSK_PWRON_LP_IT_MSK_MASK 0x08
#define INT_MSK_PWRON_LP_IT_MSK_SHIFT 3
#define INT_MSK_PWRON_IT_MSK_MASK 0x04
#define INT_MSK_PWRON_IT_MSK_SHIFT 2
#define INT_MSK_VMBHI_IT_MSK_MASK 0x02
#define INT_MSK_VMBHI_IT_MSK_SHIFT 1
#define INT_MSK_VMBDCH_IT_MSK_MASK 0x01
#define INT_MSK_VMBDCH_IT_MSK_SHIFT 0
#define INT_MSK_PWRHOLD_F_IT_MSK_MASK 0x01
#define INT_MSK_PWRHOLD_F_IT_MSK_SHIFT 0
/*Register INT_STS2 (0x80) register.RegisterDescription */
@ -650,6 +693,14 @@
/*Register INT_STS3 (0x80) register.RegisterDescription */
#define INT_STS3_PWRDN_IT_MASK 0x80
#define INT_STS3_PWRDN_IT_SHIFT 7
#define INT_STS3_VMBCH2_L_IT_MASK 0x40
#define INT_STS3_VMBCH2_L_IT_SHIFT 6
#define INT_STS3_VMBCH2_H_IT_MASK 0x20
#define INT_STS3_VMBCH2_H_IT_SHIFT 5
#define INT_STS3_WTCHDG_IT_MASK 0x10
#define INT_STS3_WTCHDG_IT_SHIFT 4
#define INT_STS3_GPIO5_F_IT_MASK 0x08
#define INT_STS3_GPIO5_F_IT_SHIFT 3
#define INT_STS3_GPIO5_R_IT_MASK 0x04
@ -661,6 +712,14 @@
/*Register INT_MSK3 (0x80) register.RegisterDescription */
#define INT_MSK3_PWRDN_IT_MSK_MASK 0x80
#define INT_MSK3_PWRDN_IT_MSK_SHIFT 7
#define INT_MSK3_VMBCH2_L_IT_MSK_MASK 0x40
#define INT_MSK3_VMBCH2_L_IT_MSK_SHIFT 6
#define INT_MSK3_VMBCH2_H_IT_MSK_MASK 0x20
#define INT_MSK3_VMBCH2_H_IT_MSK_SHIFT 5
#define INT_MSK3_WTCHDG_IT_MSK_MASK 0x10
#define INT_MSK3_WTCHDG_IT_MSK_SHIFT 4
#define INT_MSK3_GPIO5_F_IT_MSK_MASK 0x08
#define INT_MSK3_GPIO5_F_IT_MSK_SHIFT 3
#define INT_MSK3_GPIO5_R_IT_MSK_MASK 0x04
@ -721,34 +780,32 @@
#define TPS65910_IRQ_GPIO_F 9
#define TPS65910_NUM_IRQ 10
#define TPS65911_IRQ_VBAT_VMBDCH 0
#define TPS65911_IRQ_VBAT_VMBDCH2L 1
#define TPS65911_IRQ_VBAT_VMBDCH2H 2
#define TPS65911_IRQ_VBAT_VMHI 3
#define TPS65911_IRQ_PWRON 4
#define TPS65911_IRQ_PWRON_LP 5
#define TPS65911_IRQ_PWRHOLD_F 6
#define TPS65911_IRQ_PWRHOLD_R 7
#define TPS65911_IRQ_HOTDIE 8
#define TPS65911_IRQ_RTC_ALARM 9
#define TPS65911_IRQ_RTC_PERIOD 10
#define TPS65911_IRQ_GPIO0_R 11
#define TPS65911_IRQ_GPIO0_F 12
#define TPS65911_IRQ_GPIO1_R 13
#define TPS65911_IRQ_GPIO1_F 14
#define TPS65911_IRQ_GPIO2_R 15
#define TPS65911_IRQ_GPIO2_F 16
#define TPS65911_IRQ_GPIO3_R 17
#define TPS65911_IRQ_GPIO3_F 18
#define TPS65911_IRQ_GPIO4_R 19
#define TPS65911_IRQ_GPIO4_F 20
#define TPS65911_IRQ_GPIO5_R 21
#define TPS65911_IRQ_GPIO5_F 22
#define TPS65911_IRQ_WTCHDG 23
#define TPS65911_IRQ_PWRDN 24
#define TPS65911_NUM_IRQ 25
#define TPS65911_IRQ_PWRHOLD_F 0
#define TPS65911_IRQ_VBAT_VMHI 1
#define TPS65911_IRQ_PWRON 2
#define TPS65911_IRQ_PWRON_LP 3
#define TPS65911_IRQ_PWRHOLD_R 4
#define TPS65911_IRQ_HOTDIE 5
#define TPS65911_IRQ_RTC_ALARM 6
#define TPS65911_IRQ_RTC_PERIOD 7
#define TPS65911_IRQ_GPIO0_R 8
#define TPS65911_IRQ_GPIO0_F 9
#define TPS65911_IRQ_GPIO1_R 10
#define TPS65911_IRQ_GPIO1_F 11
#define TPS65911_IRQ_GPIO2_R 12
#define TPS65911_IRQ_GPIO2_F 13
#define TPS65911_IRQ_GPIO3_R 14
#define TPS65911_IRQ_GPIO3_F 15
#define TPS65911_IRQ_GPIO4_R 16
#define TPS65911_IRQ_GPIO4_F 17
#define TPS65911_IRQ_GPIO5_R 18
#define TPS65911_IRQ_GPIO5_F 19
#define TPS65911_IRQ_WTCHDG 20
#define TPS65911_IRQ_VMBCH2_H 21
#define TPS65911_IRQ_VMBCH2_L 22
#define TPS65911_IRQ_PWRDN 23
#define TPS65911_NUM_IRQ 24
/* GPIO Register Definitions */
#define TPS65910_GPIO_DEB BIT(2)
@ -836,7 +893,6 @@ struct tps65910 {
struct device *dev;
struct i2c_client *i2c_client;
struct regmap *regmap;
struct mutex io_mutex;
unsigned int id;
/* Client devices */
@ -848,12 +904,8 @@ struct tps65910 {
struct tps65910_board *of_plat_data;
/* IRQ Handling */
struct mutex irq_lock;
int chip_irq;
int irq_base;
int irq_num;
u32 irq_mask;
struct irq_domain *domain;
struct regmap_irq_chip_data *irq_data;
};
struct tps65910_platform_data {
@ -861,10 +913,6 @@ struct tps65910_platform_data {
int irq_base;
};
int tps65910_irq_init(struct tps65910 *tps65910, int irq,
struct tps65910_platform_data *pdata);
int tps65910_irq_exit(struct tps65910 *tps65910);
static inline int tps65910_chip_id(struct tps65910 *tps65910)
{
return tps65910->id;
@ -900,4 +948,9 @@ static inline int tps65910_reg_update_bits(struct tps65910 *tps65910, u8 reg,
return regmap_update_bits(tps65910->regmap, reg, mask, val);
}
static inline int tps65910_irq_get_virq(struct tps65910 *tps65910, int irq)
{
return regmap_irq_get_virq(tps65910->irq_data, irq);
}
#endif /* __LINUX_MFD_TPS65910_H */

637
include/linux/mfd/tps80031.h Normal file
View File

@ -0,0 +1,637 @@
/*
* tps80031.h -- TI TPS80031 and TI TPS80032 PMIC driver.
*
* Copyright (c) 2012, NVIDIA Corporation.
*
* Author: Laxman Dewangan <ldewangan@nvidia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
* whether express or implied; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307, USA
*/
#ifndef __LINUX_MFD_TPS80031_H
#define __LINUX_MFD_TPS80031_H
#include <linux/device.h>
#include <linux/regmap.h>
/* Pull-ups/Pull-downs */
#define TPS80031_CFG_INPUT_PUPD1 0xF0
#define TPS80031_CFG_INPUT_PUPD2 0xF1
#define TPS80031_CFG_INPUT_PUPD3 0xF2
#define TPS80031_CFG_INPUT_PUPD4 0xF3
#define TPS80031_CFG_LDO_PD1 0xF4
#define TPS80031_CFG_LDO_PD2 0xF5
#define TPS80031_CFG_SMPS_PD 0xF6
/* Real Time Clock */
#define TPS80031_SECONDS_REG 0x00
#define TPS80031_MINUTES_REG 0x01
#define TPS80031_HOURS_REG 0x02
#define TPS80031_DAYS_REG 0x03
#define TPS80031_MONTHS_REG 0x04
#define TPS80031_YEARS_REG 0x05
#define TPS80031_WEEKS_REG 0x06
#define TPS80031_ALARM_SECONDS_REG 0x08
#define TPS80031_ALARM_MINUTES_REG 0x09
#define TPS80031_ALARM_HOURS_REG 0x0A
#define TPS80031_ALARM_DAYS_REG 0x0B
#define TPS80031_ALARM_MONTHS_REG 0x0C
#define TPS80031_ALARM_YEARS_REG 0x0D
#define TPS80031_RTC_CTRL_REG 0x10
#define TPS80031_RTC_STATUS_REG 0x11
#define TPS80031_RTC_INTERRUPTS_REG 0x12
#define TPS80031_RTC_COMP_LSB_REG 0x13
#define TPS80031_RTC_COMP_MSB_REG 0x14
#define TPS80031_RTC_RESET_STATUS_REG 0x16
/*PMC Master Module */
#define TPS80031_PHOENIX_START_CONDITION 0x1F
#define TPS80031_PHOENIX_MSK_TRANSITION 0x20
#define TPS80031_STS_HW_CONDITIONS 0x21
#define TPS80031_PHOENIX_LAST_TURNOFF_STS 0x22
#define TPS80031_VSYSMIN_LO_THRESHOLD 0x23
#define TPS80031_VSYSMIN_HI_THRESHOLD 0x24
#define TPS80031_PHOENIX_DEV_ON 0x25
#define TPS80031_STS_PWR_GRP_STATE 0x27
#define TPS80031_PH_CFG_VSYSLOW 0x28
#define TPS80031_PH_STS_BOOT 0x29
#define TPS80031_PHOENIX_SENS_TRANSITION 0x2A
#define TPS80031_PHOENIX_SEQ_CFG 0x2B
#define TPS80031_PRIMARY_WATCHDOG_CFG 0X2C
#define TPS80031_KEY_PRESS_DUR_CFG 0X2D
#define TPS80031_SMPS_LDO_SHORT_STS 0x2E
/* PMC Slave Module - Broadcast */
#define TPS80031_BROADCAST_ADDR_ALL 0x31
#define TPS80031_BROADCAST_ADDR_REF 0x32
#define TPS80031_BROADCAST_ADDR_PROV 0x33
#define TPS80031_BROADCAST_ADDR_CLK_RST 0x34
/* PMC Slave Module SMPS Regulators */
#define TPS80031_SMPS4_CFG_TRANS 0x41
#define TPS80031_SMPS4_CFG_STATE 0x42
#define TPS80031_SMPS4_CFG_VOLTAGE 0x44
#define TPS80031_VIO_CFG_TRANS 0x47
#define TPS80031_VIO_CFG_STATE 0x48
#define TPS80031_VIO_CFG_FORCE 0x49
#define TPS80031_VIO_CFG_VOLTAGE 0x4A
#define TPS80031_VIO_CFG_STEP 0x48
#define TPS80031_SMPS1_CFG_TRANS 0x53
#define TPS80031_SMPS1_CFG_STATE 0x54
#define TPS80031_SMPS1_CFG_FORCE 0x55
#define TPS80031_SMPS1_CFG_VOLTAGE 0x56
#define TPS80031_SMPS1_CFG_STEP 0x57
#define TPS80031_SMPS2_CFG_TRANS 0x59
#define TPS80031_SMPS2_CFG_STATE 0x5A
#define TPS80031_SMPS2_CFG_FORCE 0x5B
#define TPS80031_SMPS2_CFG_VOLTAGE 0x5C
#define TPS80031_SMPS2_CFG_STEP 0x5D
#define TPS80031_SMPS3_CFG_TRANS 0x65
#define TPS80031_SMPS3_CFG_STATE 0x66
#define TPS80031_SMPS3_CFG_VOLTAGE 0x68
/* PMC Slave Module LDO Regulators */
#define TPS80031_VANA_CFG_TRANS 0x81
#define TPS80031_VANA_CFG_STATE 0x82
#define TPS80031_VANA_CFG_VOLTAGE 0x83
#define TPS80031_LDO2_CFG_TRANS 0x85
#define TPS80031_LDO2_CFG_STATE 0x86
#define TPS80031_LDO2_CFG_VOLTAGE 0x87
#define TPS80031_LDO4_CFG_TRANS 0x89
#define TPS80031_LDO4_CFG_STATE 0x8A
#define TPS80031_LDO4_CFG_VOLTAGE 0x8B
#define TPS80031_LDO3_CFG_TRANS 0x8D
#define TPS80031_LDO3_CFG_STATE 0x8E
#define TPS80031_LDO3_CFG_VOLTAGE 0x8F
#define TPS80031_LDO6_CFG_TRANS 0x91
#define TPS80031_LDO6_CFG_STATE 0x92
#define TPS80031_LDO6_CFG_VOLTAGE 0x93
#define TPS80031_LDOLN_CFG_TRANS 0x95
#define TPS80031_LDOLN_CFG_STATE 0x96
#define TPS80031_LDOLN_CFG_VOLTAGE 0x97
#define TPS80031_LDO5_CFG_TRANS 0x99
#define TPS80031_LDO5_CFG_STATE 0x9A
#define TPS80031_LDO5_CFG_VOLTAGE 0x9B
#define TPS80031_LDO1_CFG_TRANS 0x9D
#define TPS80031_LDO1_CFG_STATE 0x9E
#define TPS80031_LDO1_CFG_VOLTAGE 0x9F
#define TPS80031_LDOUSB_CFG_TRANS 0xA1
#define TPS80031_LDOUSB_CFG_STATE 0xA2
#define TPS80031_LDOUSB_CFG_VOLTAGE 0xA3
#define TPS80031_LDO7_CFG_TRANS 0xA5
#define TPS80031_LDO7_CFG_STATE 0xA6
#define TPS80031_LDO7_CFG_VOLTAGE 0xA7
/* PMC Slave Module External Control */
#define TPS80031_REGEN1_CFG_TRANS 0xAE
#define TPS80031_REGEN1_CFG_STATE 0xAF
#define TPS80031_REGEN2_CFG_TRANS 0xB1
#define TPS80031_REGEN2_CFG_STATE 0xB2
#define TPS80031_SYSEN_CFG_TRANS 0xB4
#define TPS80031_SYSEN_CFG_STATE 0xB5
/* PMC Slave Module Internal Control */
#define TPS80031_NRESPWRON_CFG_TRANS 0xB7
#define TPS80031_NRESPWRON_CFG_STATE 0xB8
#define TPS80031_CLK32KAO_CFG_TRANS 0xBA
#define TPS80031_CLK32KAO_CFG_STATE 0xBB
#define TPS80031_CLK32KG_CFG_TRANS 0xBD
#define TPS80031_CLK32KG_CFG_STATE 0xBE
#define TPS80031_CLK32KAUDIO_CFG_TRANS 0xC0
#define TPS80031_CLK32KAUDIO_CFG_STATE 0xC1
#define TPS80031_VRTC_CFG_TRANS 0xC3
#define TPS80031_VRTC_CFG_STATE 0xC4
#define TPS80031_BIAS_CFG_TRANS 0xC6
#define TPS80031_BIAS_CFG_STATE 0xC7
#define TPS80031_VSYSMIN_HI_CFG_TRANS 0xC9
#define TPS80031_VSYSMIN_HI_CFG_STATE 0xCA
#define TPS80031_RC6MHZ_CFG_TRANS 0xCC
#define TPS80031_RC6MHZ_CFG_STATE 0xCD
#define TPS80031_TMP_CFG_TRANS 0xCF
#define TPS80031_TMP_CFG_STATE 0xD0
/* PMC Slave Module resources assignment */
#define TPS80031_PREQ1_RES_ASS_A 0xD7
#define TPS80031_PREQ1_RES_ASS_B 0xD8
#define TPS80031_PREQ1_RES_ASS_C 0xD9
#define TPS80031_PREQ2_RES_ASS_A 0xDA
#define TPS80031_PREQ2_RES_ASS_B 0xDB
#define TPS80031_PREQ2_RES_ASS_C 0xDC
#define TPS80031_PREQ3_RES_ASS_A 0xDD
#define TPS80031_PREQ3_RES_ASS_B 0xDE
#define TPS80031_PREQ3_RES_ASS_C 0xDF
/* PMC Slave Module Miscellaneous */
#define TPS80031_SMPS_OFFSET 0xE0
#define TPS80031_SMPS_MULT 0xE3
#define TPS80031_MISC1 0xE4
#define TPS80031_MISC2 0xE5
#define TPS80031_BBSPOR_CFG 0xE6
#define TPS80031_TMP_CFG 0xE7
/* Battery Charging Controller and Indicator LED */
#define TPS80031_CONTROLLER_CTRL2 0xDA
#define TPS80031_CONTROLLER_VSEL_COMP 0xDB
#define TPS80031_CHARGERUSB_VSYSREG 0xDC
#define TPS80031_CHARGERUSB_VICHRG_PC 0xDD
#define TPS80031_LINEAR_CHRG_STS 0xDE
#define TPS80031_CONTROLLER_INT_MASK 0xE0
#define TPS80031_CONTROLLER_CTRL1 0xE1
#define TPS80031_CONTROLLER_WDG 0xE2
#define TPS80031_CONTROLLER_STAT1 0xE3
#define TPS80031_CHARGERUSB_INT_STATUS 0xE4
#define TPS80031_CHARGERUSB_INT_MASK 0xE5
#define TPS80031_CHARGERUSB_STATUS_INT1 0xE6
#define TPS80031_CHARGERUSB_STATUS_INT2 0xE7
#define TPS80031_CHARGERUSB_CTRL1 0xE8
#define TPS80031_CHARGERUSB_CTRL2 0xE9
#define TPS80031_CHARGERUSB_CTRL3 0xEA
#define TPS80031_CHARGERUSB_STAT1 0xEB
#define TPS80031_CHARGERUSB_VOREG 0xEC
#define TPS80031_CHARGERUSB_VICHRG 0xED
#define TPS80031_CHARGERUSB_CINLIMIT 0xEE
#define TPS80031_CHARGERUSB_CTRLLIMIT1 0xEF
#define TPS80031_CHARGERUSB_CTRLLIMIT2 0xF0
#define TPS80031_LED_PWM_CTRL1 0xF4
#define TPS80031_LED_PWM_CTRL2 0xF5
/* USB On-The-Go */
#define TPS80031_BACKUP_REG 0xFA
#define TPS80031_USB_VENDOR_ID_LSB 0x00
#define TPS80031_USB_VENDOR_ID_MSB 0x01
#define TPS80031_USB_PRODUCT_ID_LSB 0x02
#define TPS80031_USB_PRODUCT_ID_MSB 0x03
#define TPS80031_USB_VBUS_CTRL_SET 0x04
#define TPS80031_USB_VBUS_CTRL_CLR 0x05
#define TPS80031_USB_ID_CTRL_SET 0x06
#define TPS80031_USB_ID_CTRL_CLR 0x07
#define TPS80031_USB_VBUS_INT_SRC 0x08
#define TPS80031_USB_VBUS_INT_LATCH_SET 0x09
#define TPS80031_USB_VBUS_INT_LATCH_CLR 0x0A
#define TPS80031_USB_VBUS_INT_EN_LO_SET 0x0B
#define TPS80031_USB_VBUS_INT_EN_LO_CLR 0x0C
#define TPS80031_USB_VBUS_INT_EN_HI_SET 0x0D
#define TPS80031_USB_VBUS_INT_EN_HI_CLR 0x0E
#define TPS80031_USB_ID_INT_SRC 0x0F
#define TPS80031_USB_ID_INT_LATCH_SET 0x10
#define TPS80031_USB_ID_INT_LATCH_CLR 0x11
#define TPS80031_USB_ID_INT_EN_LO_SET 0x12
#define TPS80031_USB_ID_INT_EN_LO_CLR 0x13
#define TPS80031_USB_ID_INT_EN_HI_SET 0x14
#define TPS80031_USB_ID_INT_EN_HI_CLR 0x15
#define TPS80031_USB_OTG_ADP_CTRL 0x16
#define TPS80031_USB_OTG_ADP_HIGH 0x17
#define TPS80031_USB_OTG_ADP_LOW 0x18
#define TPS80031_USB_OTG_ADP_RISE 0x19
#define TPS80031_USB_OTG_REVISION 0x1A
/* Gas Gauge */
#define TPS80031_FG_REG_00 0xC0
#define TPS80031_FG_REG_01 0xC1
#define TPS80031_FG_REG_02 0xC2
#define TPS80031_FG_REG_03 0xC3
#define TPS80031_FG_REG_04 0xC4
#define TPS80031_FG_REG_05 0xC5
#define TPS80031_FG_REG_06 0xC6
#define TPS80031_FG_REG_07 0xC7
#define TPS80031_FG_REG_08 0xC8
#define TPS80031_FG_REG_09 0xC9
#define TPS80031_FG_REG_10 0xCA
#define TPS80031_FG_REG_11 0xCB
/* General Purpose ADC */
#define TPS80031_GPADC_CTRL 0x2E
#define TPS80031_GPADC_CTRL2 0x2F
#define TPS80031_RTSELECT_LSB 0x32
#define TPS80031_RTSELECT_ISB 0x33
#define TPS80031_RTSELECT_MSB 0x34
#define TPS80031_GPSELECT_ISB 0x35
#define TPS80031_CTRL_P1 0x36
#define TPS80031_RTCH0_LSB 0x37
#define TPS80031_RTCH0_MSB 0x38
#define TPS80031_RTCH1_LSB 0x39
#define TPS80031_RTCH1_MSB 0x3A
#define TPS80031_GPCH0_LSB 0x3B
#define TPS80031_GPCH0_MSB 0x3C
/* SIM, MMC and Battery Detection */
#define TPS80031_SIMDEBOUNCING 0xEB
#define TPS80031_SIMCTRL 0xEC
#define TPS80031_MMCDEBOUNCING 0xED
#define TPS80031_MMCCTRL 0xEE
#define TPS80031_BATDEBOUNCING 0xEF
/* Vibrator Driver and PWMs */
#define TPS80031_VIBCTRL 0x9B
#define TPS80031_VIBMODE 0x9C
#define TPS80031_PWM1ON 0xBA
#define TPS80031_PWM1OFF 0xBB
#define TPS80031_PWM2ON 0xBD
#define TPS80031_PWM2OFF 0xBE
/* Control Interface */
#define TPS80031_INT_STS_A 0xD0
#define TPS80031_INT_STS_B 0xD1
#define TPS80031_INT_STS_C 0xD2
#define TPS80031_INT_MSK_LINE_A 0xD3
#define TPS80031_INT_MSK_LINE_B 0xD4
#define TPS80031_INT_MSK_LINE_C 0xD5
#define TPS80031_INT_MSK_STS_A 0xD6
#define TPS80031_INT_MSK_STS_B 0xD7
#define TPS80031_INT_MSK_STS_C 0xD8
#define TPS80031_TOGGLE1 0x90
#define TPS80031_TOGGLE2 0x91
#define TPS80031_TOGGLE3 0x92
#define TPS80031_PWDNSTATUS1 0x93
#define TPS80031_PWDNSTATUS2 0x94
#define TPS80031_VALIDITY0 0x17
#define TPS80031_VALIDITY1 0x18
#define TPS80031_VALIDITY2 0x19
#define TPS80031_VALIDITY3 0x1A
#define TPS80031_VALIDITY4 0x1B
#define TPS80031_VALIDITY5 0x1C
#define TPS80031_VALIDITY6 0x1D
#define TPS80031_VALIDITY7 0x1E
/* Version number related register */
#define TPS80031_JTAGVERNUM 0x87
#define TPS80031_EPROM_REV 0xDF
/* GPADC Trimming Bits. */
#define TPS80031_GPADC_TRIM0 0xCC
#define TPS80031_GPADC_TRIM1 0xCD
#define TPS80031_GPADC_TRIM2 0xCE
#define TPS80031_GPADC_TRIM3 0xCF
#define TPS80031_GPADC_TRIM4 0xD0
#define TPS80031_GPADC_TRIM5 0xD1
#define TPS80031_GPADC_TRIM6 0xD2
#define TPS80031_GPADC_TRIM7 0xD3
#define TPS80031_GPADC_TRIM8 0xD4
#define TPS80031_GPADC_TRIM9 0xD5
#define TPS80031_GPADC_TRIM10 0xD6
#define TPS80031_GPADC_TRIM11 0xD7
#define TPS80031_GPADC_TRIM12 0xD8
#define TPS80031_GPADC_TRIM13 0xD9
#define TPS80031_GPADC_TRIM14 0xDA
#define TPS80031_GPADC_TRIM15 0xDB
#define TPS80031_GPADC_TRIM16 0xDC
#define TPS80031_GPADC_TRIM17 0xDD
#define TPS80031_GPADC_TRIM18 0xDE
/* TPS80031_CONTROLLER_STAT1 bit fields */
#define TPS80031_CONTROLLER_STAT1_BAT_TEMP 0
#define TPS80031_CONTROLLER_STAT1_BAT_REMOVED 1
#define TPS80031_CONTROLLER_STAT1_VBUS_DET 2
#define TPS80031_CONTROLLER_STAT1_VAC_DET 3
#define TPS80031_CONTROLLER_STAT1_FAULT_WDG 4
#define TPS80031_CONTROLLER_STAT1_LINCH_GATED 6
/* TPS80031_CONTROLLER_INT_MASK bit filed */
#define TPS80031_CONTROLLER_INT_MASK_MVAC_DET 0
#define TPS80031_CONTROLLER_INT_MASK_MVBUS_DET 1
#define TPS80031_CONTROLLER_INT_MASK_MBAT_TEMP 2
#define TPS80031_CONTROLLER_INT_MASK_MFAULT_WDG 3
#define TPS80031_CONTROLLER_INT_MASK_MBAT_REMOVED 4
#define TPS80031_CONTROLLER_INT_MASK_MLINCH_GATED 5
#define TPS80031_CHARGE_CONTROL_SUB_INT_MASK 0x3F
/* TPS80031_PHOENIX_DEV_ON bit field */
#define TPS80031_DEVOFF 0x1
#define TPS80031_EXT_CONTROL_CFG_TRANS 0
#define TPS80031_EXT_CONTROL_CFG_STATE 1
/* State register field */
#define TPS80031_STATE_OFF 0x00
#define TPS80031_STATE_ON 0x01
#define TPS80031_STATE_MASK 0x03
/* Trans register field */
#define TPS80031_TRANS_ACTIVE_OFF 0x00
#define TPS80031_TRANS_ACTIVE_ON 0x01
#define TPS80031_TRANS_ACTIVE_MASK 0x03
#define TPS80031_TRANS_SLEEP_OFF 0x00
#define TPS80031_TRANS_SLEEP_ON 0x04
#define TPS80031_TRANS_SLEEP_MASK 0x0C
#define TPS80031_TRANS_OFF_OFF 0x00
#define TPS80031_TRANS_OFF_ACTIVE 0x10
#define TPS80031_TRANS_OFF_MASK 0x30
#define TPS80031_EXT_PWR_REQ (TPS80031_PWR_REQ_INPUT_PREQ1 | \
TPS80031_PWR_REQ_INPUT_PREQ2 | \
TPS80031_PWR_REQ_INPUT_PREQ3)
/* TPS80031_BBSPOR_CFG bit field */
#define TPS80031_BBSPOR_CHG_EN 0x8
#define TPS80031_MAX_REGISTER 0xFF
struct i2c_client;
/* Supported chips */
enum chips {
TPS80031 = 0x00000001,
TPS80032 = 0x00000002,
};
enum {
TPS80031_INT_PWRON,
TPS80031_INT_RPWRON,
TPS80031_INT_SYS_VLOW,
TPS80031_INT_RTC_ALARM,
TPS80031_INT_RTC_PERIOD,
TPS80031_INT_HOT_DIE,
TPS80031_INT_VXX_SHORT,
TPS80031_INT_SPDURATION,
TPS80031_INT_WATCHDOG,
TPS80031_INT_BAT,
TPS80031_INT_SIM,
TPS80031_INT_MMC,
TPS80031_INT_RES,
TPS80031_INT_GPADC_RT,
TPS80031_INT_GPADC_SW2_EOC,
TPS80031_INT_CC_AUTOCAL,
TPS80031_INT_ID_WKUP,
TPS80031_INT_VBUSS_WKUP,
TPS80031_INT_ID,
TPS80031_INT_VBUS,
TPS80031_INT_CHRG_CTRL,
TPS80031_INT_EXT_CHRG,
TPS80031_INT_INT_CHRG,
TPS80031_INT_RES2,
TPS80031_INT_BAT_TEMP_OVRANGE,
TPS80031_INT_BAT_REMOVED,
TPS80031_INT_VBUS_DET,
TPS80031_INT_VAC_DET,
TPS80031_INT_FAULT_WDG,
TPS80031_INT_LINCH_GATED,
/* Last interrupt id to get the end number */
TPS80031_INT_NR,
};
/* TPS80031 Slave IDs */
#define TPS80031_NUM_SLAVES 4
#define TPS80031_SLAVE_ID0 0
#define TPS80031_SLAVE_ID1 1
#define TPS80031_SLAVE_ID2 2
#define TPS80031_SLAVE_ID3 3
/* TPS80031 I2C addresses */
#define TPS80031_I2C_ID0_ADDR 0x12
#define TPS80031_I2C_ID1_ADDR 0x48
#define TPS80031_I2C_ID2_ADDR 0x49
#define TPS80031_I2C_ID3_ADDR 0x4A
enum {
TPS80031_REGULATOR_VIO,
TPS80031_REGULATOR_SMPS1,
TPS80031_REGULATOR_SMPS2,
TPS80031_REGULATOR_SMPS3,
TPS80031_REGULATOR_SMPS4,
TPS80031_REGULATOR_VANA,
TPS80031_REGULATOR_LDO1,
TPS80031_REGULATOR_LDO2,
TPS80031_REGULATOR_LDO3,
TPS80031_REGULATOR_LDO4,
TPS80031_REGULATOR_LDO5,
TPS80031_REGULATOR_LDO6,
TPS80031_REGULATOR_LDO7,
TPS80031_REGULATOR_LDOLN,
TPS80031_REGULATOR_LDOUSB,
TPS80031_REGULATOR_VBUS,
TPS80031_REGULATOR_REGEN1,
TPS80031_REGULATOR_REGEN2,
TPS80031_REGULATOR_SYSEN,
TPS80031_REGULATOR_MAX,
};
/* Different configurations for the rails */
enum {
/* USBLDO input selection */
TPS80031_USBLDO_INPUT_VSYS = 0x00000001,
TPS80031_USBLDO_INPUT_PMID = 0x00000002,
/* LDO3 output mode */
TPS80031_LDO3_OUTPUT_VIB = 0x00000004,
/* VBUS configuration */
TPS80031_VBUS_DISCHRG_EN_PDN = 0x00000004,
TPS80031_VBUS_SW_ONLY = 0x00000008,
TPS80031_VBUS_SW_N_ID = 0x00000010,
};
/* External controls requests */
enum tps80031_ext_control {
TPS80031_PWR_REQ_INPUT_NONE = 0x00000000,
TPS80031_PWR_REQ_INPUT_PREQ1 = 0x00000001,
TPS80031_PWR_REQ_INPUT_PREQ2 = 0x00000002,
TPS80031_PWR_REQ_INPUT_PREQ3 = 0x00000004,
TPS80031_PWR_OFF_ON_SLEEP = 0x00000008,
TPS80031_PWR_ON_ON_SLEEP = 0x00000010,
};
enum tps80031_pupd_pins {
TPS80031_PREQ1 = 0,
TPS80031_PREQ2A,
TPS80031_PREQ2B,
TPS80031_PREQ2C,
TPS80031_PREQ3,
TPS80031_NRES_WARM,
TPS80031_PWM_FORCE,
TPS80031_CHRG_EXT_CHRG_STATZ,
TPS80031_SIM,
TPS80031_MMC,
TPS80031_GPADC_START,
TPS80031_DVSI2C_SCL,
TPS80031_DVSI2C_SDA,
TPS80031_CTLI2C_SCL,
TPS80031_CTLI2C_SDA,
};
enum tps80031_pupd_settings {
TPS80031_PUPD_NORMAL,
TPS80031_PUPD_PULLDOWN,
TPS80031_PUPD_PULLUP,
};
struct tps80031 {
struct device *dev;
unsigned long chip_info;
int es_version;
struct i2c_client *clients[TPS80031_NUM_SLAVES];
struct regmap *regmap[TPS80031_NUM_SLAVES];
struct regmap_irq_chip_data *irq_data;
};
struct tps80031_pupd_init_data {
int input_pin;
int setting;
};
/*
* struct tps80031_regulator_platform_data - tps80031 regulator platform data.
*
* @reg_init_data: The regulator init data.
* @ext_ctrl_flag: External control flag for sleep/power request control.
* @config_flags: Configuration flag to configure the rails.
* It should be ORed of config enums.
*/
struct tps80031_regulator_platform_data {
struct regulator_init_data *reg_init_data;
unsigned int ext_ctrl_flag;
unsigned int config_flags;
};
struct tps80031_platform_data {
int irq_base;
bool use_power_off;
struct tps80031_pupd_init_data *pupd_init_data;
int pupd_init_data_size;
struct tps80031_regulator_platform_data
*regulator_pdata[TPS80031_REGULATOR_MAX];
};
static inline int tps80031_write(struct device *dev, int sid,
int reg, uint8_t val)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_write(tps80031->regmap[sid], reg, val);
}
static inline int tps80031_writes(struct device *dev, int sid, int reg,
int len, uint8_t *val)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_bulk_write(tps80031->regmap[sid], reg, val, len);
}
static inline int tps80031_read(struct device *dev, int sid,
int reg, uint8_t *val)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
unsigned int ival;
int ret;
ret = regmap_read(tps80031->regmap[sid], reg, &ival);
if (ret < 0) {
dev_err(dev, "failed reading from reg 0x%02x\n", reg);
return ret;
}
*val = ival;
return ret;
}
static inline int tps80031_reads(struct device *dev, int sid,
int reg, int len, uint8_t *val)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_bulk_read(tps80031->regmap[sid], reg, val, len);
}
static inline int tps80031_set_bits(struct device *dev, int sid,
int reg, uint8_t bit_mask)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_update_bits(tps80031->regmap[sid], reg,
bit_mask, bit_mask);
}
static inline int tps80031_clr_bits(struct device *dev, int sid,
int reg, uint8_t bit_mask)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_update_bits(tps80031->regmap[sid], reg, bit_mask, 0);
}
static inline int tps80031_update(struct device *dev, int sid,
int reg, uint8_t val, uint8_t mask)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_update_bits(tps80031->regmap[sid], reg, mask, val);
}
static inline unsigned long tps80031_get_chip_info(struct device *dev)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return tps80031->chip_info;
}
static inline int tps80031_get_pmu_version(struct device *dev)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return tps80031->es_version;
}
static inline int tps80031_irq_get_virq(struct device *dev, int irq)
{
struct tps80031 *tps80031 = dev_get_drvdata(dev);
return regmap_irq_get_virq(tps80031->irq_data, irq);
}
extern int tps80031_ext_power_req_config(struct device *dev,
unsigned long ext_ctrl_flag, int preq_bit,
int state_reg_add, int trans_reg_add);
#endif /*__LINUX_MFD_TPS80031_H */

10
include/linux/mfd/twl6040.h
View File

@ -207,10 +207,12 @@ struct twl6040_platform_data {
};
struct regmap;
struct regmap_irq_chips_data;
struct twl6040 {
struct device *dev;
struct regmap *regmap;
struct regmap_irq_chip_data *irq_data;
struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
struct mutex mutex;
struct mutex irq_mutex;
@ -228,9 +230,8 @@ struct twl6040 {
unsigned int mclk;
unsigned int irq;
unsigned int irq_base;
u8 irq_masks_cur;
u8 irq_masks_cache;
unsigned int irq_ready;
unsigned int irq_th;
};
int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
@ -245,8 +246,7 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
unsigned int freq_in, unsigned int freq_out);
int twl6040_get_pll(struct twl6040 *twl6040);
unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
int twl6040_irq_init(struct twl6040 *twl6040);
void twl6040_irq_exit(struct twl6040 *twl6040);
/* Get the combined status of the vibra control register */
int twl6040_get_vibralr_status(struct twl6040 *twl6040);

110
include/linux/mfd/viperboard.h Normal file
View File

@ -0,0 +1,110 @@
/*
* include/linux/mfd/viperboard.h
*
* Nano River Technologies viperboard definitions
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_VIPERBOARD_H__
#define __MFD_VIPERBOARD_H__
#include <linux/types.h>
#include <linux/usb.h>
#define VPRBRD_EP_OUT 0x02
#define VPRBRD_EP_IN 0x86
#define VPRBRD_I2C_MSG_LEN 512 /* max length of a msg on USB level */
#define VPRBRD_I2C_FREQ_6MHZ 1 /* 6 MBit/s */
#define VPRBRD_I2C_FREQ_3MHZ 2 /* 3 MBit/s */
#define VPRBRD_I2C_FREQ_1MHZ 3 /* 1 MBit/s */
#define VPRBRD_I2C_FREQ_FAST 4 /* 400 kbit/s */
#define VPRBRD_I2C_FREQ_400KHZ VPRBRD_I2C_FREQ_FAST
#define VPRBRD_I2C_FREQ_200KHZ 5 /* 200 kbit/s */
#define VPRBRD_I2C_FREQ_STD 6 /* 100 kbit/s */
#define VPRBRD_I2C_FREQ_100KHZ VPRBRD_I2C_FREQ_STD
#define VPRBRD_I2C_FREQ_10KHZ 7 /* 10 kbit/s */
#define VPRBRD_I2C_CMD_WRITE 0x00
#define VPRBRD_I2C_CMD_READ 0x01
#define VPRBRD_I2C_CMD_ADDR 0x02
#define VPRBRD_USB_TYPE_OUT 0x40
#define VPRBRD_USB_TYPE_IN 0xc0
#define VPRBRD_USB_TIMEOUT_MS 100
#define VPRBRD_USB_REQUEST_I2C_FREQ 0xe6
#define VPRBRD_USB_REQUEST_I2C 0xe9
#define VPRBRD_USB_REQUEST_MAJOR 0xea
#define VPRBRD_USB_REQUEST_MINOR 0xeb
#define VPRBRD_USB_REQUEST_ADC 0xec
#define VPRBRD_USB_REQUEST_GPIOA 0xed
#define VPRBRD_USB_REQUEST_GPIOB 0xdd
struct vprbrd_i2c_write_hdr {
u8 cmd;
u16 addr;
u8 len1;
u8 len2;
u8 last;
u8 chan;
u16 spi;
} __packed;
struct vprbrd_i2c_read_hdr {
u8 cmd;
u16 addr;
u8 len0;
u8 len1;
u8 len2;
u8 len3;
u8 len4;
u8 len5;
u16 tf1; /* transfer 1 length */
u16 tf2; /* transfer 2 length */
} __packed;
struct vprbrd_i2c_status {
u8 unknown[11];
u8 status;
} __packed;
struct vprbrd_i2c_write_msg {
struct vprbrd_i2c_write_hdr header;
u8 data[VPRBRD_I2C_MSG_LEN
- sizeof(struct vprbrd_i2c_write_hdr)];
} __packed;
struct vprbrd_i2c_read_msg {
struct vprbrd_i2c_read_hdr header;
u8 data[VPRBRD_I2C_MSG_LEN
- sizeof(struct vprbrd_i2c_read_hdr)];
} __packed;
struct vprbrd_i2c_addr_msg {
u8 cmd;
u8 addr;
u8 unknown1;
u16 len;
u8 unknown2;
u8 unknown3;
} __packed;
/* Structure to hold all device specific stuff */
struct vprbrd {
struct usb_device *usb_dev; /* the usb device for this device */
struct mutex lock;
u8 buf[sizeof(struct vprbrd_i2c_write_msg)];
struct platform_device pdev;
};
#endif /* __MFD_VIPERBOARD_H__ */

14
include/linux/platform_data/ti_am335x_adc.h Normal file
View File

@ -0,0 +1,14 @@
#ifndef __LINUX_TI_AM335X_ADC_H
#define __LINUX_TI_AM335X_ADC_H
/**
* struct adc_data ADC Input information
* @adc_channels: Number of analog inputs
* available for ADC.
*/
struct adc_data {
unsigned int adc_channels;
};
#endif