leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150

Browse Source 
Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302203045.184500-4-bhupesh.sharma@linaro.org
This commit is contained in:
Bhupesh Sharma
2022-03-03 02:00:41 +05:30
committed by Bjorn Andersson
parent b527358cb4
commit 2dc63e768c
2 changed files with 22 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/dt-bindings/clock/qcom,gcc-sm8150.h
View File

@@ -241,6 +241,8 @@
#define GCC_USB_PHY_CFG_AHB2PHY_BCR 28
/* GCC GDSCRs */
#define PCIE_0_GDSC 0
#define PCIE_1_GDSC 1
#define USB30_PRIM_GDSC 4
#define USB30_SEC_GDSC 5