Merge tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A respun version of the merges for the pull request previously sent
with a few additional fixes. The last two merges were fixed up by
hand since the branches have moved on and currently have the prior
merge in them.
Quite a busy release for the SPI subsystem, mostly in cleanups big and
small scattered through the stack rather than anything else:
- New driver for the Broadcom BC63xx HSSPI controller
- Fix duplicate device registration for ACPI
- Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA
changes upon which the transiton depends)
- Some small optimisations to reduce the amount of time we hold locks
in the datapath, eliminate some redundant checks and the size of a
spi_transfer
- Lots of fixes, cleanups and general enhancements to drivers,
especially the rspi and Atmel drivers"
* tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (112 commits)
spi: core: Fix transfer failure when master->transfer_one returns positive value
spi: Correct set_cs() documentation
spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer()
spi: Spelling s/finised/finished/
spi: sc18is602: Convert to use bits_per_word_mask
spi: Remove duplicate code to set default bits_per_word setting
spi/pxa2xx: fix compilation warning when !CONFIG_PM_SLEEP
spi: clps711x: Add MODULE_ALIAS to support module auto-loading
spi: rspi: Add missing clk_disable() calls in error and cleanup paths
spi: rspi: Spelling s/transmition/transmission/
spi: rspi: Add support for specifying CPHA/CPOL
spi/pxa2xx: initialize DMA channels to -1 to prevent inadvertent match
spi: rspi: Add more QSPI register documentation
spi: rspi: Add more RSPI register documentation
spi: rspi: Remove dependency on DMAE for SHMOBILE
spi/s3c64xx: Correct indentation
spi: sh: Use spi_sh_clear_bit() instead of open-coded
spi: bitbang: Grammar s/make to make/to make/
spi: sh-hspi: Spelling s/recive/receive/
spi: core: Improve tx/rx_nbits check comments
...
This commit is contained in:
@@ -196,7 +196,7 @@ struct tegra_slink_data {
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u32 rx_status;
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u32 status_reg;
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bool is_packed;
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unsigned long packed_size;
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u32 packed_size;
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u32 command_reg;
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u32 command2_reg;
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@@ -220,14 +220,14 @@ struct tegra_slink_data {
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static int tegra_slink_runtime_suspend(struct device *dev);
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static int tegra_slink_runtime_resume(struct device *dev);
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static inline unsigned long tegra_slink_readl(struct tegra_slink_data *tspi,
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static inline u32 tegra_slink_readl(struct tegra_slink_data *tspi,
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unsigned long reg)
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{
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return readl(tspi->base + reg);
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}
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static inline void tegra_slink_writel(struct tegra_slink_data *tspi,
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unsigned long val, unsigned long reg)
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u32 val, unsigned long reg)
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{
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writel(val, tspi->base + reg);
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@@ -238,38 +238,30 @@ static inline void tegra_slink_writel(struct tegra_slink_data *tspi,
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static void tegra_slink_clear_status(struct tegra_slink_data *tspi)
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{
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unsigned long val;
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unsigned long val_write = 0;
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u32 val_write;
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val = tegra_slink_readl(tspi, SLINK_STATUS);
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tegra_slink_readl(tspi, SLINK_STATUS);
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/* Write 1 to clear status register */
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val_write = SLINK_RDY | SLINK_FIFO_ERROR;
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tegra_slink_writel(tspi, val_write, SLINK_STATUS);
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}
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static unsigned long tegra_slink_get_packed_size(struct tegra_slink_data *tspi,
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static u32 tegra_slink_get_packed_size(struct tegra_slink_data *tspi,
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struct spi_transfer *t)
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{
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unsigned long val;
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switch (tspi->bytes_per_word) {
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case 0:
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val = SLINK_PACK_SIZE_4;
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break;
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return SLINK_PACK_SIZE_4;
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case 1:
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val = SLINK_PACK_SIZE_8;
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break;
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return SLINK_PACK_SIZE_8;
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case 2:
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val = SLINK_PACK_SIZE_16;
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break;
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return SLINK_PACK_SIZE_16;
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case 4:
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val = SLINK_PACK_SIZE_32;
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break;
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return SLINK_PACK_SIZE_32;
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default:
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val = 0;
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return 0;
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}
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return val;
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}
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static unsigned tegra_slink_calculate_curr_xfer_param(
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@@ -312,10 +304,9 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf(
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{
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unsigned nbytes;
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unsigned tx_empty_count;
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unsigned long fifo_status;
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u32 fifo_status;
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unsigned max_n_32bit;
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unsigned i, count;
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unsigned long x;
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unsigned int written_words;
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unsigned fifo_words_left;
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u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos;
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@@ -329,9 +320,9 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf(
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nbytes = written_words * tspi->bytes_per_word;
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max_n_32bit = DIV_ROUND_UP(nbytes, 4);
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for (count = 0; count < max_n_32bit; count++) {
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x = 0;
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u32 x = 0;
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for (i = 0; (i < 4) && nbytes; i++, nbytes--)
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x |= (*tx_buf++) << (i*8);
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x |= (u32)(*tx_buf++) << (i * 8);
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tegra_slink_writel(tspi, x, SLINK_TX_FIFO);
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}
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} else {
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@@ -339,10 +330,10 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf(
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written_words = max_n_32bit;
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nbytes = written_words * tspi->bytes_per_word;
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for (count = 0; count < max_n_32bit; count++) {
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x = 0;
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u32 x = 0;
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for (i = 0; nbytes && (i < tspi->bytes_per_word);
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i++, nbytes--)
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x |= ((*tx_buf++) << i*8);
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x |= (u32)(*tx_buf++) << (i * 8);
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tegra_slink_writel(tspi, x, SLINK_TX_FIFO);
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}
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}
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@@ -354,9 +345,8 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf(
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struct tegra_slink_data *tspi, struct spi_transfer *t)
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{
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unsigned rx_full_count;
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unsigned long fifo_status;
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u32 fifo_status;
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unsigned i, count;
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unsigned long x;
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unsigned int read_words = 0;
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unsigned len;
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u8 *rx_buf = (u8 *)t->rx_buf + tspi->cur_rx_pos;
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@@ -366,7 +356,7 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf(
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if (tspi->is_packed) {
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len = tspi->curr_dma_words * tspi->bytes_per_word;
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for (count = 0; count < rx_full_count; count++) {
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x = tegra_slink_readl(tspi, SLINK_RX_FIFO);
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u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO);
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for (i = 0; len && (i < 4); i++, len--)
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*rx_buf++ = (x >> i*8) & 0xFF;
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}
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@@ -374,7 +364,7 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf(
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read_words += tspi->curr_dma_words;
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} else {
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for (count = 0; count < rx_full_count; count++) {
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x = tegra_slink_readl(tspi, SLINK_RX_FIFO);
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u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO);
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for (i = 0; (i < tspi->bytes_per_word); i++)
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*rx_buf++ = (x >> (i*8)) & 0xFF;
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}
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@@ -387,27 +377,24 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf(
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static void tegra_slink_copy_client_txbuf_to_spi_txbuf(
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struct tegra_slink_data *tspi, struct spi_transfer *t)
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{
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unsigned len;
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/* Make the dma buffer to read by cpu */
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dma_sync_single_for_cpu(tspi->dev, tspi->tx_dma_phys,
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tspi->dma_buf_size, DMA_TO_DEVICE);
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if (tspi->is_packed) {
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len = tspi->curr_dma_words * tspi->bytes_per_word;
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unsigned len = tspi->curr_dma_words * tspi->bytes_per_word;
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memcpy(tspi->tx_dma_buf, t->tx_buf + tspi->cur_pos, len);
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} else {
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unsigned int i;
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unsigned int count;
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u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos;
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unsigned consume = tspi->curr_dma_words * tspi->bytes_per_word;
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unsigned int x;
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for (count = 0; count < tspi->curr_dma_words; count++) {
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x = 0;
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u32 x = 0;
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for (i = 0; consume && (i < tspi->bytes_per_word);
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i++, consume--)
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x |= ((*tx_buf++) << i * 8);
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x |= (u32)(*tx_buf++) << (i * 8);
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tspi->tx_dma_buf[count] = x;
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}
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}
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@@ -434,14 +421,10 @@ static void tegra_slink_copy_spi_rxbuf_to_client_rxbuf(
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unsigned int i;
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unsigned int count;
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unsigned char *rx_buf = t->rx_buf + tspi->cur_rx_pos;
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unsigned int x;
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unsigned int rx_mask, bits_per_word;
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u32 rx_mask = ((u32)1 << t->bits_per_word) - 1;
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bits_per_word = t->bits_per_word;
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rx_mask = (1 << bits_per_word) - 1;
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for (count = 0; count < tspi->curr_dma_words; count++) {
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x = tspi->rx_dma_buf[count];
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x &= rx_mask;
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u32 x = tspi->rx_dma_buf[count] & rx_mask;
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for (i = 0; (i < tspi->bytes_per_word); i++)
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*rx_buf++ = (x >> (i*8)) & 0xFF;
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}
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@@ -501,17 +484,16 @@ static int tegra_slink_start_rx_dma(struct tegra_slink_data *tspi, int len)
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static int tegra_slink_start_dma_based_transfer(
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struct tegra_slink_data *tspi, struct spi_transfer *t)
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{
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unsigned long val;
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unsigned long test_val;
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u32 val;
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unsigned int len;
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int ret = 0;
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unsigned long status;
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u32 status;
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/* Make sure that Rx and Tx fifo are empty */
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status = tegra_slink_readl(tspi, SLINK_STATUS);
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if ((status & SLINK_FIFO_EMPTY) != SLINK_FIFO_EMPTY) {
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dev_err(tspi->dev,
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"Rx/Tx fifo are not empty status 0x%08lx\n", status);
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dev_err(tspi->dev, "Rx/Tx fifo are not empty status 0x%08x\n",
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(unsigned)status);
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return -EIO;
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}
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@@ -551,9 +533,9 @@ static int tegra_slink_start_dma_based_transfer(
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}
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/* Wait for tx fifo to be fill before starting slink */
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test_val = tegra_slink_readl(tspi, SLINK_STATUS);
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while (!(test_val & SLINK_TX_FULL))
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test_val = tegra_slink_readl(tspi, SLINK_STATUS);
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status = tegra_slink_readl(tspi, SLINK_STATUS);
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while (!(status & SLINK_TX_FULL))
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status = tegra_slink_readl(tspi, SLINK_STATUS);
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}
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if (tspi->cur_direction & DATA_DIR_RX) {
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@@ -587,7 +569,7 @@ static int tegra_slink_start_dma_based_transfer(
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static int tegra_slink_start_cpu_based_transfer(
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struct tegra_slink_data *tspi, struct spi_transfer *t)
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{
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unsigned long val;
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u32 val;
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unsigned cur_words;
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val = tspi->packed_size;
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@@ -713,8 +695,8 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
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u8 bits_per_word;
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unsigned total_fifo_words;
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int ret;
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unsigned long command;
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unsigned long command2;
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u32 command;
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u32 command2;
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bits_per_word = t->bits_per_word;
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speed = t->speed_hz;
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@@ -761,17 +743,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
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static int tegra_slink_setup(struct spi_device *spi)
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{
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struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master);
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unsigned long val;
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unsigned long flags;
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int ret;
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unsigned int cs_pol_bit[MAX_CHIP_SELECT] = {
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static const u32 cs_pol_bit[MAX_CHIP_SELECT] = {
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SLINK_CS_POLARITY,
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SLINK_CS_POLARITY1,
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SLINK_CS_POLARITY2,
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SLINK_CS_POLARITY3,
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};
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struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master);
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u32 val;
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unsigned long flags;
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int ret;
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dev_dbg(&spi->dev, "setup %d bpw, %scpol, %scpha, %dHz\n",
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spi->bits_per_word,
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spi->mode & SPI_CPOL ? "" : "~",
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