drm/amdgpu: initialize PSP before IH under SR-IOV
In order to support new PSP feature that PSP may provide interface to program IH CNTL register, initialize PSP before IH under Vega10 SR-IOV VF Signed-off-by: Trigger Huang <Trigger.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1580,6 +1580,7 @@ static int amdgpu_device_ip_hw_init_phase1(struct amdgpu_device *adev)
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if (adev->ip_blocks[i].status.hw)
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continue;
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if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||
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(amdgpu_sriov_vf(adev) && (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP)) ||
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adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH) {
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r = adev->ip_blocks[i].version->funcs->hw_init(adev);
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if (r) {
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@ -608,12 +608,24 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
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case CHIP_VEGA20:
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amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
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amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
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amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) {
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if (adev->asic_type == CHIP_VEGA20)
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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else
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amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
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/* For Vega10 SR-IOV, PSP need to be initialized before IH */
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if (amdgpu_sriov_vf(adev)) {
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) {
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if (adev->asic_type == CHIP_VEGA20)
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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else
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amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
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}
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amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
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} else {
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amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) {
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if (adev->asic_type == CHIP_VEGA20)
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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else
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amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
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}
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}
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amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
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