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drm/amdgpu: limit GDS clearing workaround in cold boot sequence

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GDS clear workaround will cause gfx failure in suspend/resume case.

[   98.679559] [drm:amdgpu_device_ip_late_init [amdgpu]] *ERROR* late_init of IP block <gfx_v9_0> failed -110
[   98.679561] PM: dpm_run_callback(): pci_pm_resume+0x0/0xa0 returns -110
[   98.679562] PM: Device 0000:03:00.0 failed to resume async: error -110

As this workaround is specific to the HW bug of GDS's ECC error
existing in cold boot up, so bypass this workaround in suspend/
resume case after booting up.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Guchun Chen 2020-02-09 16:21:09 +08:00 committed by Alex Deucher
parent 46d1da733f
commit 2cabe0d4cd
1 changed files with 6 additions and 3 deletions
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9
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -4374,9 +4374,12 @@ static int gfx_v9_0_ecc_late_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
r = gfx_v9_0_do_edc_gds_workarounds(adev);
if (r)
return r;
/* limit gds clearing operation in cold boot sequence */
if (!adev->in_suspend) {
r = gfx_v9_0_do_edc_gds_workarounds(adev);
if (r)
return r;
}
/* requires IBs so do in late init after IB pool is initialized */
r = gfx_v9_0_do_edc_gpr_workarounds(adev);