drm/amdgpu: use HMM callback to replace mmu notifier
Replace our MMU notifier with hmm_mirror_ops.sync_cpu_device_pagetables callback. Enable CONFIG_HMM and CONFIG_HMM_MIRROR as a dependency in DRM_AMDGPU_USERPTR Kconfig. It supports both KFD userptr and gfx userptr paths. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
e14ba95b90
commit
2c5a51f570
@ -26,10 +26,10 @@ config DRM_AMDGPU_CIK
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config DRM_AMDGPU_USERPTR
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bool "Always enable userptr write support"
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depends on DRM_AMDGPU
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select MMU_NOTIFIER
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select HMM_MIRROR
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help
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This option selects CONFIG_MMU_NOTIFIER if it isn't already
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selected to enabled full userptr support.
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This option selects CONFIG_HMM and CONFIG_HMM_MIRROR if it
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isn't already selected to enabled full userptr support.
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config DRM_AMDGPU_GART_DEBUGFS
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bool "Allow GART access through debugfs"
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@ -173,7 +173,7 @@ endif
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amdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
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amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o
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amdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o
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amdgpu-$(CONFIG_MMU_NOTIFIER) += amdgpu_mn.o
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amdgpu-$(CONFIG_HMM_MIRROR) += amdgpu_mn.o
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include $(FULL_AMD_PATH)/powerplay/Makefile
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@ -45,7 +45,7 @@
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/mmu_notifier.h>
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#include <linux/hmm.h>
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#include <linux/interval_tree.h>
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#include <drm/drmP.h>
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#include <drm/drm.h>
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@ -58,14 +58,12 @@
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*
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* @adev: amdgpu device pointer
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* @mm: process address space
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* @mn: MMU notifier structure
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* @type: type of MMU notifier
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* @work: destruction work item
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* @node: hash table node to find structure by adev and mn
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* @lock: rw semaphore protecting the notifier nodes
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* @objects: interval tree containing amdgpu_mn_nodes
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* @read_lock: mutex for recursive locking of @lock
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* @recursion: depth of recursion
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* @mirror: HMM mirror function support
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*
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* Data for each amdgpu device and process address space.
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*/
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@ -73,7 +71,6 @@ struct amdgpu_mn {
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/* constant after initialisation */
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struct amdgpu_device *adev;
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struct mm_struct *mm;
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struct mmu_notifier mn;
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enum amdgpu_mn_type type;
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/* only used on destruction */
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@ -85,8 +82,9 @@ struct amdgpu_mn {
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/* objects protected by lock */
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struct rw_semaphore lock;
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struct rb_root_cached objects;
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struct mutex read_lock;
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atomic_t recursion;
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/* HMM mirror */
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struct hmm_mirror mirror;
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};
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/**
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@ -103,7 +101,7 @@ struct amdgpu_mn_node {
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};
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/**
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* amdgpu_mn_destroy - destroy the MMU notifier
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* amdgpu_mn_destroy - destroy the HMM mirror
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*
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* @work: previously sheduled work item
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*
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@ -129,28 +127,26 @@ static void amdgpu_mn_destroy(struct work_struct *work)
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}
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up_write(&amn->lock);
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mutex_unlock(&adev->mn_lock);
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mmu_notifier_unregister_no_release(&amn->mn, amn->mm);
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hmm_mirror_unregister(&amn->mirror);
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kfree(amn);
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}
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/**
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* amdgpu_mn_release - callback to notify about mm destruction
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* amdgpu_hmm_mirror_release - callback to notify about mm destruction
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @mirror: the HMM mirror (mm) this callback is about
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*
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* Shedule a work item to lazy destroy our notifier.
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* Shedule a work item to lazy destroy HMM mirror.
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*/
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static void amdgpu_mn_release(struct mmu_notifier *mn,
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struct mm_struct *mm)
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static void amdgpu_hmm_mirror_release(struct hmm_mirror *mirror)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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struct amdgpu_mn *amn = container_of(mirror, struct amdgpu_mn, mirror);
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INIT_WORK(&amn->work, amdgpu_mn_destroy);
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schedule_work(&amn->work);
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}
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/**
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* amdgpu_mn_lock - take the write side lock for this notifier
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*
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@ -181,14 +177,10 @@ void amdgpu_mn_unlock(struct amdgpu_mn *mn)
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static int amdgpu_mn_read_lock(struct amdgpu_mn *amn, bool blockable)
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{
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if (blockable)
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mutex_lock(&amn->read_lock);
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else if (!mutex_trylock(&amn->read_lock))
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down_read(&amn->lock);
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else if (!down_read_trylock(&amn->lock))
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return -EAGAIN;
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if (atomic_inc_return(&amn->recursion) == 1)
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down_read_non_owner(&amn->lock);
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mutex_unlock(&amn->read_lock);
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return 0;
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}
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@ -199,8 +191,7 @@ static int amdgpu_mn_read_lock(struct amdgpu_mn *amn, bool blockable)
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*/
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static void amdgpu_mn_read_unlock(struct amdgpu_mn *amn)
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{
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if (atomic_dec_return(&amn->recursion) == 0)
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up_read_non_owner(&amn->lock);
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up_read(&amn->lock);
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}
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/**
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@ -235,143 +226,128 @@ static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
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}
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/**
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* amdgpu_mn_invalidate_range_start_gfx - callback to notify about mm change
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* amdgpu_mn_sync_pagetables_gfx - callback to notify about mm change
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*
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* @mn: our notifier
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* @range: mmu notifier context
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* @mirror: the hmm_mirror (mm) is about to update
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* @update: the update start, end address
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*
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* Block for operations on BOs to finish and mark pages as accessed and
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* potentially dirty.
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*/
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static int amdgpu_mn_invalidate_range_start_gfx(struct mmu_notifier *mn,
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const struct mmu_notifier_range *range)
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static int amdgpu_mn_sync_pagetables_gfx(struct hmm_mirror *mirror,
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const struct hmm_update *update)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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struct amdgpu_mn *amn = container_of(mirror, struct amdgpu_mn, mirror);
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unsigned long start = update->start;
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unsigned long end = update->end;
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bool blockable = update->blockable;
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struct interval_tree_node *it;
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unsigned long end;
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/* notification is exclusive, but interval is inclusive */
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end = range->end - 1;
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end -= 1;
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/* TODO we should be able to split locking for interval tree and
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* amdgpu_mn_invalidate_node
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*/
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if (amdgpu_mn_read_lock(amn, mmu_notifier_range_blockable(range)))
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if (amdgpu_mn_read_lock(amn, blockable))
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return -EAGAIN;
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it = interval_tree_iter_first(&amn->objects, range->start, end);
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it = interval_tree_iter_first(&amn->objects, start, end);
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while (it) {
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struct amdgpu_mn_node *node;
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if (!mmu_notifier_range_blockable(range)) {
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if (!blockable) {
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amdgpu_mn_read_unlock(amn);
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return -EAGAIN;
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}
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node = container_of(it, struct amdgpu_mn_node, it);
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it = interval_tree_iter_next(it, range->start, end);
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it = interval_tree_iter_next(it, start, end);
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amdgpu_mn_invalidate_node(node, range->start, end);
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amdgpu_mn_invalidate_node(node, start, end);
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}
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amdgpu_mn_read_unlock(amn);
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return 0;
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}
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/**
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* amdgpu_mn_invalidate_range_start_hsa - callback to notify about mm change
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* amdgpu_mn_sync_pagetables_hsa - callback to notify about mm change
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @start: start of updated range
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* @end: end of updated range
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* @mirror: the hmm_mirror (mm) is about to update
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* @update: the update start, end address
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*
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* We temporarily evict all BOs between start and end. This
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* necessitates evicting all user-mode queues of the process. The BOs
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* are restorted in amdgpu_mn_invalidate_range_end_hsa.
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*/
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static int amdgpu_mn_invalidate_range_start_hsa(struct mmu_notifier *mn,
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const struct mmu_notifier_range *range)
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static int amdgpu_mn_sync_pagetables_hsa(struct hmm_mirror *mirror,
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const struct hmm_update *update)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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struct amdgpu_mn *amn = container_of(mirror, struct amdgpu_mn, mirror);
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unsigned long start = update->start;
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unsigned long end = update->end;
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bool blockable = update->blockable;
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struct interval_tree_node *it;
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unsigned long end;
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/* notification is exclusive, but interval is inclusive */
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end = range->end - 1;
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end -= 1;
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if (amdgpu_mn_read_lock(amn, mmu_notifier_range_blockable(range)))
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if (amdgpu_mn_read_lock(amn, blockable))
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return -EAGAIN;
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it = interval_tree_iter_first(&amn->objects, range->start, end);
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it = interval_tree_iter_first(&amn->objects, start, end);
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while (it) {
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struct amdgpu_mn_node *node;
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struct amdgpu_bo *bo;
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if (!mmu_notifier_range_blockable(range)) {
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if (!blockable) {
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amdgpu_mn_read_unlock(amn);
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return -EAGAIN;
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}
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node = container_of(it, struct amdgpu_mn_node, it);
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it = interval_tree_iter_next(it, range->start, end);
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it = interval_tree_iter_next(it, start, end);
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list_for_each_entry(bo, &node->bos, mn_list) {
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struct kgd_mem *mem = bo->kfd_bo;
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if (amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
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range->start,
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end))
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amdgpu_amdkfd_evict_userptr(mem, range->mm);
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start, end))
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amdgpu_amdkfd_evict_userptr(mem, amn->mm);
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}
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}
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amdgpu_mn_read_unlock(amn);
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return 0;
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}
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/**
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* amdgpu_mn_invalidate_range_end - callback to notify about mm change
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @start: start of updated range
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* @end: end of updated range
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*
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* Release the lock again to allow new command submissions.
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*/
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static void amdgpu_mn_invalidate_range_end(struct mmu_notifier *mn,
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const struct mmu_notifier_range *range)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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amdgpu_mn_read_unlock(amn);
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}
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static const struct mmu_notifier_ops amdgpu_mn_ops[] = {
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[AMDGPU_MN_TYPE_GFX] = {
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.release = amdgpu_mn_release,
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.invalidate_range_start = amdgpu_mn_invalidate_range_start_gfx,
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.invalidate_range_end = amdgpu_mn_invalidate_range_end,
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},
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[AMDGPU_MN_TYPE_HSA] = {
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.release = amdgpu_mn_release,
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.invalidate_range_start = amdgpu_mn_invalidate_range_start_hsa,
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.invalidate_range_end = amdgpu_mn_invalidate_range_end,
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},
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};
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/* Low bits of any reasonable mm pointer will be unused due to struct
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* alignment. Use these bits to make a unique key from the mm pointer
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* and notifier type.
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*/
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#define AMDGPU_MN_KEY(mm, type) ((unsigned long)(mm) + (type))
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static struct hmm_mirror_ops amdgpu_hmm_mirror_ops[] = {
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[AMDGPU_MN_TYPE_GFX] = {
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.sync_cpu_device_pagetables = amdgpu_mn_sync_pagetables_gfx,
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.release = amdgpu_hmm_mirror_release
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},
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[AMDGPU_MN_TYPE_HSA] = {
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.sync_cpu_device_pagetables = amdgpu_mn_sync_pagetables_hsa,
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.release = amdgpu_hmm_mirror_release
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},
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};
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/**
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* amdgpu_mn_get - create notifier context
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* amdgpu_mn_get - create HMM mirror context
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*
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* @adev: amdgpu device pointer
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* @type: type of MMU notifier context
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*
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* Creates a notifier context for current->mm.
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* Creates a HMM mirror context for current->mm.
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*/
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struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
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enum amdgpu_mn_type type)
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@ -401,12 +377,10 @@ struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
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amn->mm = mm;
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init_rwsem(&amn->lock);
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amn->type = type;
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amn->mn.ops = &amdgpu_mn_ops[type];
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amn->objects = RB_ROOT_CACHED;
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mutex_init(&amn->read_lock);
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atomic_set(&amn->recursion, 0);
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r = __mmu_notifier_register(&amn->mn, mm);
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amn->mirror.ops = &amdgpu_hmm_mirror_ops[type];
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r = hmm_mirror_register(&amn->mirror, mm);
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if (r)
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goto free_amn;
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@ -432,7 +406,7 @@ free_amn:
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* @bo: amdgpu buffer object
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* @addr: userptr addr we should monitor
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*
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* Registers an MMU notifier for the given BO at the specified address.
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* Registers an HMM mirror for the given BO at the specified address.
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* Returns 0 on success, -ERRNO if anything goes wrong.
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*/
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int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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@ -488,11 +462,11 @@ int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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}
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/**
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* amdgpu_mn_unregister - unregister a BO for notifier updates
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* amdgpu_mn_unregister - unregister a BO for HMM mirror updates
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*
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* @bo: amdgpu buffer object
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*
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* Remove any registration of MMU notifier updates from the buffer object.
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* Remove any registration of HMM mirror updates from the buffer object.
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*/
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void amdgpu_mn_unregister(struct amdgpu_bo *bo)
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{
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@ -34,7 +34,7 @@ enum amdgpu_mn_type {
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AMDGPU_MN_TYPE_HSA,
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};
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#if defined(CONFIG_MMU_NOTIFIER)
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#if defined(CONFIG_HMM_MIRROR)
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void amdgpu_mn_lock(struct amdgpu_mn *mn);
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void amdgpu_mn_unlock(struct amdgpu_mn *mn);
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struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
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Block a user