drm/amdgpu/pm: smu_v13_0_4: delete duplicate condition
There is no need to check if "clock_ranges' is non-NULL. It is checked already on the line before. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3670c46f07
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@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu,
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if (!table || !clock_ranges)
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return -EINVAL;
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if (clock_ranges) {
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if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
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clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
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return -EINVAL;
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if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES ||
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clock_ranges->num_writer_wm_sets > NUM_WM_RANGES)
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return -EINVAL;
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for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
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table->WatermarkRow[WM_DCFCLK][i].MinClock =
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clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MaxClock =
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clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MinMclk =
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clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
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clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
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for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) {
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table->WatermarkRow[WM_DCFCLK][i].MinClock =
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clock_ranges->reader_wm_sets[i].min_drain_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MaxClock =
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clock_ranges->reader_wm_sets[i].max_drain_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MinMclk =
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clock_ranges->reader_wm_sets[i].min_fill_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].MaxMclk =
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clock_ranges->reader_wm_sets[i].max_fill_clk_mhz;
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table->WatermarkRow[WM_DCFCLK][i].WmSetting =
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clock_ranges->reader_wm_sets[i].wm_inst;
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}
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for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
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table->WatermarkRow[WM_SOCCLK][i].MinClock =
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clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MaxClock =
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clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MinMclk =
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clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
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clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].WmSetting =
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clock_ranges->writer_wm_sets[i].wm_inst;
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}
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smu->watermarks_bitmap |= WATERMARKS_EXIST;
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table->WatermarkRow[WM_DCFCLK][i].WmSetting =
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clock_ranges->reader_wm_sets[i].wm_inst;
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}
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for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) {
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table->WatermarkRow[WM_SOCCLK][i].MinClock =
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clock_ranges->writer_wm_sets[i].min_fill_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MaxClock =
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clock_ranges->writer_wm_sets[i].max_fill_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MinMclk =
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clock_ranges->writer_wm_sets[i].min_drain_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
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clock_ranges->writer_wm_sets[i].max_drain_clk_mhz;
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table->WatermarkRow[WM_SOCCLK][i].WmSetting =
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clock_ranges->writer_wm_sets[i].wm_inst;
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}
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smu->watermarks_bitmap |= WATERMARKS_EXIST;
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/* pass data to smu controller */
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if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
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!(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
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