forked from Minki/linux
media: ov5640: Consolidate JPEG compression mode setting
The register value lists for all the supported resolution settings all include a register address/value pair for setting the JPEG compression mode. With the exception of 1080p (which sets mode 2), all resolutions use mode 3. The only difference between mode 2 and mode 3 is that mode 2 may have padding data on the last line, while mode 3 does not add padding data. As these register values were from dumps of running systems, and the difference between the modes is quite small, using mode 3 for all configurations should be OK. [Sakari Ailus: Align OV5640_REG_JPG_MODE_SELECT register naming.] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Chen-Yu Tsai
Mauro Carvalho Chehab
parent
7cb013b104
commit
2b5c18f964
@ -85,6 +85,7 @@
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#define OV5640_REG_FORMAT_CONTROL00 0x4300
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#define OV5640_REG_VFIFO_HSIZE 0x4602
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#define OV5640_REG_VFIFO_VSIZE 0x4604
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#define OV5640_REG_JPG_MODE_SELECT 0x4713
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#define OV5640_REG_POLARITY_CTRL00 0x4740
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#define OV5640_REG_MIPI_CTRL00 0x4800
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#define OV5640_REG_DEBUG_MODE 0x4814
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@ -303,7 +304,7 @@ static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
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{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
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{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
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{0x501f, 0x00, 0, 0}, {0x4713, 0x03, 0, 0}, {0x4407, 0x04, 0, 0},
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{0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
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{0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
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{0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
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@ -372,7 +373,7 @@ static const struct reg_value ov5640_setting_VGA_640_480[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -391,7 +392,7 @@ static const struct reg_value ov5640_setting_XGA_1024_768[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -410,7 +411,7 @@ static const struct reg_value ov5640_setting_QVGA_320_240[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -429,7 +430,7 @@ static const struct reg_value ov5640_setting_QCIF_176_144[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -448,7 +449,7 @@ static const struct reg_value ov5640_setting_NTSC_720_480[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -467,7 +468,7 @@ static const struct reg_value ov5640_setting_PAL_720_576[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
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};
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@ -486,7 +487,7 @@ static const struct reg_value ov5640_setting_720P_1280_720[] = {
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{0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
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{0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
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{0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
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{0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
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};
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@ -506,7 +507,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
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{0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
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@ -518,7 +519,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
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{0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
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{0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
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{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
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{0x3a15, 0x60, 0, 0}, {0x4713, 0x02, 0, 0}, {0x4407, 0x04, 0, 0},
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{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
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{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
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{0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
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};
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@ -537,7 +538,7 @@ static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
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{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
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{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
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{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
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{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
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{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
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{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
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};
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@ -1051,6 +1052,17 @@ static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
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{
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int ret;
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/*
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* compression mode 3 timing
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*
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* Data is transmitted with programmable width (VFIFO_HSIZE).
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* No padding done. Last line may have less data. Varying
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* number of lines per frame, depending on amount of data.
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*/
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ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
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if (ret < 0)
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return ret;
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ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
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if (ret < 0)
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return ret;
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