forked from Minki/linux
[SCSI] qla2xxx: Increase speed of flash access in ISP82xx adapters to improve firmware load speed.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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aa61556fa3
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2b29d96d71
@ -908,27 +908,37 @@ qla82xx_wait_rom_done(struct qla_hw_data *ha)
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return 0;
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}
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int
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qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag)
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{
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uint32_t off_value, rval = 0;
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WRT_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase),
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(off & 0xFFFF0000));
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/* Read back value to make sure write has gone through */
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RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
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off_value = (off & 0x0000FFFF);
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if (flag)
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WRT_REG_DWORD((void *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase),
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data);
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else
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rval = RD_REG_DWORD((void *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase));
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return rval;
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}
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static int
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qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp)
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{
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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/* Dword reads to flash. */
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qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1);
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*valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE +
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(addr & 0x0000FFFF), 0, 0);
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr);
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3);
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0xb);
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qla82xx_wait_rom_busy(ha);
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if (qla82xx_wait_rom_done(ha)) {
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ql_log(ql_log_fatal, vha, 0x00ba,
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"Error waiting for rom done.\n");
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return -1;
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}
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/* Reset abyte_cnt and dummy_byte_cnt */
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
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udelay(10);
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cond_resched();
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qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0);
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*valp = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA);
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return 0;
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}
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@ -3639,29 +3649,6 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha)
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}
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/* Minidump related functions */
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int
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qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag)
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{
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uint32_t off_value, rval = 0;
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WRT_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase),
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(off & 0xFFFF0000));
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/* Read back value to make sure write has gone through */
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RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
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off_value = (off & 0x0000FFFF);
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if (flag)
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WRT_REG_DWORD((void *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase),
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data);
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else
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rval = RD_REG_DWORD((void *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase));
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return rval;
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}
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static int
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qla82xx_minidump_process_control(scsi_qla_host_t *vha,
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qla82xx_md_entry_hdr_t *entry_hdr, uint32_t **d_ptr)
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