Merge branch 'rk3588-ethernet-support'
Sebastian Reichel says: ==================== RK3588 Ethernet Support This adds ethernet support for the RK3588(s) SoCs. Changes since PATCHv2: * Rebased to v6.0-rc1 * Wrap DT bindings additions at 80 characters * Add Acked-by from Krzysztof Changes since PATCHv1: * Drop first patch (not required) and rebase second patch accordingly * Rename DT property rockchip,php_grf -> rockchip,php-grf ==================== Link: https://lore.kernel.org/r/20220830154559.61506-1-sebastian.reichel@collabora.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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commit
2af39b9964
@ -25,6 +25,7 @@ select:
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- rockchip,rk3368-gmac
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- rockchip,rk3399-gmac
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- rockchip,rk3568-gmac
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- rockchip,rk3588-gmac
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- rockchip,rv1108-gmac
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required:
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- compatible
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@ -50,6 +51,7 @@ properties:
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- items:
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- enum:
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- rockchip,rk3568-gmac
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- rockchip,rk3588-gmac
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- const: snps,dwmac-4.20a
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clocks:
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@ -81,6 +83,11 @@ properties:
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description: The phandle of the syscon node for the general register file.
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$ref: /schemas/types.yaml#/definitions/phandle
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rockchip,php-grf:
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description:
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The phandle of the syscon node for the peripheral general register file.
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$ref: /schemas/types.yaml#/definitions/phandle
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tx_delay:
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description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
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$ref: /schemas/types.yaml#/definitions/uint32
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@ -74,6 +74,7 @@ properties:
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- rockchip,rk3328-gmac
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- rockchip,rk3366-gmac
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- rockchip,rk3368-gmac
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- rockchip,rk3588-gmac
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- rockchip,rk3399-gmac
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- rockchip,rv1108-gmac
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- snps,dwmac
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@ -32,6 +32,8 @@ struct rk_gmac_ops {
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void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
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void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
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void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
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void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,
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bool enable);
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void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);
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bool regs_valid;
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u32 regs[];
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@ -66,6 +68,7 @@ struct rk_priv_data {
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int rx_delay;
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struct regmap *grf;
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struct regmap *php_grf;
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};
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#define HIWORD_UPDATE(val, mask, shift) \
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@ -1101,6 +1104,147 @@ static const struct rk_gmac_ops rk3568_ops = {
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},
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};
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/* sys_grf */
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#define RK3588_GRF_GMAC_CON7 0X031c
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#define RK3588_GRF_GMAC_CON8 0X0320
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#define RK3588_GRF_GMAC_CON9 0X0324
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#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 3)
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#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 3)
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#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 2)
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#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 2)
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#define RK3588_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8)
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#define RK3588_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0)
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/* php_grf */
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#define RK3588_GRF_GMAC_CON0 0X0008
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#define RK3588_GRF_CLK_CON1 0X0070
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#define RK3588_GMAC_PHY_INTF_SEL_RGMII(id) \
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(GRF_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_CLR_BIT(5 + (id) * 6))
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#define RK3588_GMAC_PHY_INTF_SEL_RMII(id) \
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(GRF_CLR_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_BIT(5 + (id) * 6))
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#define RK3588_GMAC_CLK_RMII_MODE(id) GRF_BIT(5 * (id))
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#define RK3588_GMAC_CLK_RGMII_MODE(id) GRF_CLR_BIT(5 * (id))
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#define RK3588_GMAC_CLK_SELET_CRU(id) GRF_BIT(5 * (id) + 4)
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#define RK3588_GMAC_CLK_SELET_IO(id) GRF_CLR_BIT(5 * (id) + 4)
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#define RK3588_GMA_CLK_RMII_DIV2(id) GRF_BIT(5 * (id) + 2)
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#define RK3588_GMA_CLK_RMII_DIV20(id) GRF_CLR_BIT(5 * (id) + 2)
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#define RK3588_GMAC_CLK_RGMII_DIV1(id) \
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(GRF_CLR_BIT(5 * (id) + 2) | GRF_CLR_BIT(5 * (id) + 3))
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#define RK3588_GMAC_CLK_RGMII_DIV5(id) \
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(GRF_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
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#define RK3588_GMAC_CLK_RGMII_DIV50(id) \
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(GRF_CLR_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
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#define RK3588_GMAC_CLK_RMII_GATE(id) GRF_BIT(5 * (id) + 1)
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#define RK3588_GMAC_CLK_RMII_NOGATE(id) GRF_CLR_BIT(5 * (id) + 1)
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static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv,
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int tx_delay, int rx_delay)
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{
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struct device *dev = &bsp_priv->pdev->dev;
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u32 offset_con, id = bsp_priv->id;
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if (IS_ERR(bsp_priv->grf) || IS_ERR(bsp_priv->php_grf)) {
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dev_err(dev, "Missing rockchip,grf or rockchip,php_grf property\n");
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return;
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}
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offset_con = bsp_priv->id == 1 ? RK3588_GRF_GMAC_CON9 :
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RK3588_GRF_GMAC_CON8;
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regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0,
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RK3588_GMAC_PHY_INTF_SEL_RGMII(id));
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regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1,
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RK3588_GMAC_CLK_RGMII_MODE(id));
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regmap_write(bsp_priv->grf, RK3588_GRF_GMAC_CON7,
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RK3588_GMAC_RXCLK_DLY_ENABLE(id) |
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RK3588_GMAC_TXCLK_DLY_ENABLE(id));
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regmap_write(bsp_priv->grf, offset_con,
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RK3588_GMAC_CLK_RX_DL_CFG(rx_delay) |
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RK3588_GMAC_CLK_TX_DL_CFG(tx_delay));
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}
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static void rk3588_set_to_rmii(struct rk_priv_data *bsp_priv)
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{
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struct device *dev = &bsp_priv->pdev->dev;
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if (IS_ERR(bsp_priv->php_grf)) {
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dev_err(dev, "%s: Missing rockchip,php_grf property\n", __func__);
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return;
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}
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regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0,
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RK3588_GMAC_PHY_INTF_SEL_RMII(bsp_priv->id));
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regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1,
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RK3588_GMAC_CLK_RMII_MODE(bsp_priv->id));
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}
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static void rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)
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{
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struct device *dev = &bsp_priv->pdev->dev;
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unsigned int val = 0, id = bsp_priv->id;
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switch (speed) {
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case 10:
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if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
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val = RK3588_GMA_CLK_RMII_DIV20(id);
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else
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val = RK3588_GMAC_CLK_RGMII_DIV50(id);
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break;
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case 100:
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if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
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val = RK3588_GMA_CLK_RMII_DIV2(id);
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else
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val = RK3588_GMAC_CLK_RGMII_DIV5(id);
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break;
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case 1000:
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if (bsp_priv->phy_iface != PHY_INTERFACE_MODE_RMII)
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val = RK3588_GMAC_CLK_RGMII_DIV1(id);
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else
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goto err;
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break;
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default:
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goto err;
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}
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regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, val);
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return;
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err:
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dev_err(dev, "unknown speed value for GMAC speed=%d", speed);
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}
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static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
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bool enable)
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{
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unsigned int val = input ? RK3588_GMAC_CLK_SELET_IO(bsp_priv->id) :
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RK3588_GMAC_CLK_SELET_CRU(bsp_priv->id);
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val |= enable ? RK3588_GMAC_CLK_RMII_NOGATE(bsp_priv->id) :
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RK3588_GMAC_CLK_RMII_GATE(bsp_priv->id);
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regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, val);
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}
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static const struct rk_gmac_ops rk3588_ops = {
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.set_to_rgmii = rk3588_set_to_rgmii,
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.set_to_rmii = rk3588_set_to_rmii,
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.set_rgmii_speed = rk3588_set_gmac_speed,
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.set_rmii_speed = rk3588_set_gmac_speed,
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.set_clock_selection = rk3588_set_clock_selection,
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};
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#define RV1108_GRF_GMAC_CON0 0X0900
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/* RV1108_GRF_GMAC_CON0 */
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@ -1304,6 +1448,10 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
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if (!IS_ERR(bsp_priv->clk_mac_speed))
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clk_prepare_enable(bsp_priv->clk_mac_speed);
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if (bsp_priv->ops && bsp_priv->ops->set_clock_selection)
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bsp_priv->ops->set_clock_selection(bsp_priv,
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bsp_priv->clock_input, true);
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/**
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* if (!IS_ERR(bsp_priv->clk_mac))
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* clk_prepare_enable(bsp_priv->clk_mac);
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@ -1330,6 +1478,10 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
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clk_disable_unprepare(bsp_priv->mac_clk_tx);
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clk_disable_unprepare(bsp_priv->clk_mac_speed);
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if (bsp_priv->ops && bsp_priv->ops->set_clock_selection)
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bsp_priv->ops->set_clock_selection(bsp_priv,
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bsp_priv->clock_input, false);
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/**
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* if (!IS_ERR(bsp_priv->clk_mac))
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* clk_disable_unprepare(bsp_priv->clk_mac);
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@ -1444,6 +1596,8 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
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bsp_priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,grf");
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bsp_priv->php_grf = syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,php-grf");
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if (plat->phy_node) {
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bsp_priv->integrated_phy = of_property_read_bool(plat->phy_node,
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@ -1680,6 +1834,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = {
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{ .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops },
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{ .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
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{ .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops },
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{ .compatible = "rockchip,rk3588-gmac", .data = &rk3588_ops },
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{ .compatible = "rockchip,rv1108-gmac", .data = &rv1108_ops },
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{ }
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};
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