forked from Minki/linux
regmap-mmio: Use native endianness for read/write
The regmap API has an endianness setting for formatting reads and writes. This can be set by the usual DT "little-endian" and "big-endian" properties. To work properly the associated regmap_bus needs to read/write in native endian. The "syscon" DT device binding creates an mmio-based regmap_bus which performs all reads/writes as little-endian. These values are then converted again by regmap, which means that all of the MIPS BCM boards (which are big-endian) have been declared as "little-endian" to get regmap to convert them back to big-endian. Modify regmap-mmio to use the native-endian functions __raw_read*() and __raw_write*() instead of the little-endian functions read*() and write*(). Modify the big-endian MIPS BCM boards to use what will now be the correct endianness instead of pretending that the devices are little-endian. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Mark Brown <broonie@kernel.org>
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8005c49d9a
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@ -73,7 +73,6 @@
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timer: timer@10000040 {
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compatible = "syscon";
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reg = <0x10000040 0x2c>;
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little-endian;
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};
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reboot {
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@ -98,7 +98,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
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reg = <0x404000 0x60c>;
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little-endian;
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};
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reboot {
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@ -118,7 +118,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -112,7 +112,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -112,7 +112,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -118,7 +118,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -99,7 +99,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
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reg = <0x404000 0x60c>;
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little-endian;
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};
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reboot {
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@ -100,7 +100,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -114,7 +114,6 @@
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
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reg = <0x404000 0x51c>;
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little-endian;
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};
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reboot {
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@ -106,17 +106,17 @@ static int regmap_mmio_gather_write(void *context,
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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writeb(*(u8 *)val, ctx->regs + offset);
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__raw_writeb(*(u8 *)val, ctx->regs + offset);
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break;
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case 2:
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writew(*(u16 *)val, ctx->regs + offset);
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__raw_writew(*(u16 *)val, ctx->regs + offset);
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break;
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case 4:
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writel(*(u32 *)val, ctx->regs + offset);
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__raw_writel(*(u32 *)val, ctx->regs + offset);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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writeq(*(u64 *)val, ctx->regs + offset);
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__raw_writeq(*(u64 *)val, ctx->regs + offset);
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break;
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#endif
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default:
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@ -166,17 +166,17 @@ static int regmap_mmio_read(void *context,
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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*(u8 *)val = readb(ctx->regs + offset);
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*(u8 *)val = __raw_readb(ctx->regs + offset);
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break;
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case 2:
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*(u16 *)val = readw(ctx->regs + offset);
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*(u16 *)val = __raw_readw(ctx->regs + offset);
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break;
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case 4:
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*(u32 *)val = readl(ctx->regs + offset);
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*(u32 *)val = __raw_readl(ctx->regs + offset);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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*(u64 *)val = readq(ctx->regs + offset);
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*(u64 *)val = __raw_readq(ctx->regs + offset);
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break;
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#endif
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default:
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