forked from Minki/linux
habanalabs: add support for multiple SOBs per monitor
Support advanced monitor functionality to monitor more than a single SOB. In addition expand all CB generation functions with buffer offset in order to put in them multiple packets that are generated by different functions. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
This commit is contained in:
parent
3cf74b3656
commit
2992c1dcd3
@ -38,6 +38,38 @@ void hl_sob_reset_error(struct kref *ref)
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hw_sob->q_idx, hw_sob->sob_id);
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hw_sob->q_idx, hw_sob->sob_id);
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}
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}
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/**
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* hl_gen_sob_mask() - Generates a sob mask to be used in a monitor arm packet
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* @sob_base: sob base id
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* @sob_mask: sob user mask, each bit represents a sob offset from sob base
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* @mask: generated mask
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*
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* Return: 0 if given parameters are valid
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*/
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int hl_gen_sob_mask(u16 sob_base, u8 sob_mask, u8 *mask)
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{
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int i;
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if (sob_mask == 0)
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return -EINVAL;
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if (sob_mask == 0x1) {
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*mask = ~(1 << (sob_base & 0x7));
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} else {
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/* find msb in order to verify sob range is valid */
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for (i = BITS_PER_BYTE - 1 ; i >= 0 ; i--)
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if (BIT(i) & sob_mask)
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break;
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if (i > (HL_MAX_SOBS_PER_MONITOR - (sob_base & 0x7) - 1))
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return -EINVAL;
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*mask = ~sob_mask;
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}
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return 0;
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}
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static void hl_fence_release(struct kref *kref)
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static void hl_fence_release(struct kref *kref)
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{
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{
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struct hl_fence *fence =
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struct hl_fence *fence =
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@ -77,20 +77,26 @@
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#define HL_MAX_DCORES 4
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#define HL_MAX_DCORES 4
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#define HL_MAX_SOBS_PER_MONITOR 8
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/**
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/**
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* struct hl_gen_wait_properties - properties for generating a wait CB
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* struct hl_gen_wait_properties - properties for generating a wait CB
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* @data: command buffer
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* @data: command buffer
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* @q_idx: queue id is used to extract fence register address
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* @q_idx: queue id is used to extract fence register address
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* @sob_id: SOB id to use in this wait CB
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* @size: offset in command buffer
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* @sob_base: SOB base to use in this wait CB
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* @sob_val: SOB value to wait for
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* @sob_val: SOB value to wait for
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* @mon_id: monitor to use in this wait CB
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* @mon_id: monitor to use in this wait CB
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* @sob_mask: each bit represents a SOB offset from sob_base to be used
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*/
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*/
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struct hl_gen_wait_properties {
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struct hl_gen_wait_properties {
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void *data;
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void *data;
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u32 q_idx;
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u32 q_idx;
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u16 sob_id;
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u32 size;
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u16 sob_base;
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u16 sob_val;
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u16 sob_val;
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u16 mon_id;
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u16 mon_id;
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u8 sob_mask;
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};
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};
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/**
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/**
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@ -844,8 +850,9 @@ struct hl_asic_funcs {
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int (*load_boot_fit_to_device)(struct hl_device *hdev);
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int (*load_boot_fit_to_device)(struct hl_device *hdev);
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u32 (*get_signal_cb_size)(struct hl_device *hdev);
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u32 (*get_signal_cb_size)(struct hl_device *hdev);
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u32 (*get_wait_cb_size)(struct hl_device *hdev);
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u32 (*get_wait_cb_size)(struct hl_device *hdev);
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void (*gen_signal_cb)(struct hl_device *hdev, void *data, u16 sob_id);
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u32 (*gen_signal_cb)(struct hl_device *hdev, void *data, u16 sob_id,
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void (*gen_wait_cb)(struct hl_device *hdev,
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u32 size);
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u32 (*gen_wait_cb)(struct hl_device *hdev,
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struct hl_gen_wait_properties *prop);
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struct hl_gen_wait_properties *prop);
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void (*reset_sob)(struct hl_device *hdev, void *data);
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void (*reset_sob)(struct hl_device *hdev, void *data);
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void (*set_dma_mask_from_fw)(struct hl_device *hdev);
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void (*set_dma_mask_from_fw)(struct hl_device *hdev);
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@ -1927,6 +1934,7 @@ void hl_cs_rollback_all(struct hl_device *hdev);
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struct hl_cs_job *hl_cs_allocate_job(struct hl_device *hdev,
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struct hl_cs_job *hl_cs_allocate_job(struct hl_device *hdev,
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enum hl_queue_type queue_type, bool is_kernel_allocated_cb);
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enum hl_queue_type queue_type, bool is_kernel_allocated_cb);
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void hl_sob_reset_error(struct kref *ref);
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void hl_sob_reset_error(struct kref *ref);
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int hl_gen_sob_mask(u16 sob_base, u8 sob_mask, u8 *mask);
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void hl_fence_put(struct hl_fence *fence);
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void hl_fence_put(struct hl_fence *fence);
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void hl_fence_get(struct hl_fence *fence);
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void hl_fence_get(struct hl_fence *fence);
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@ -407,7 +407,7 @@ static void init_signal_cs(struct hl_device *hdev,
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cs_cmpl->hw_sob->sob_id, cs_cmpl->sob_val, q_idx);
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cs_cmpl->hw_sob->sob_id, cs_cmpl->sob_val, q_idx);
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hdev->asic_funcs->gen_signal_cb(hdev, job->patched_cb,
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hdev->asic_funcs->gen_signal_cb(hdev, job->patched_cb,
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cs_cmpl->hw_sob->sob_id);
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cs_cmpl->hw_sob->sob_id, 0);
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kref_get(&hw_sob->kref);
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kref_get(&hw_sob->kref);
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@ -454,10 +454,12 @@ static void init_wait_cs(struct hl_device *hdev, struct hl_cs *cs,
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prop->base_mon_id, q_idx);
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prop->base_mon_id, q_idx);
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wait_prop.data = (void *) job->patched_cb;
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wait_prop.data = (void *) job->patched_cb;
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wait_prop.sob_id = cs_cmpl->hw_sob->sob_id;
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wait_prop.sob_base = cs_cmpl->hw_sob->sob_id;
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wait_prop.sob_mask = 0x1;
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wait_prop.sob_val = cs_cmpl->sob_val;
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wait_prop.sob_val = cs_cmpl->sob_val;
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wait_prop.mon_id = prop->base_mon_id;
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wait_prop.mon_id = prop->base_mon_id;
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wait_prop.q_idx = q_idx;
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wait_prop.q_idx = q_idx;
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wait_prop.size = 0;
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hdev->asic_funcs->gen_wait_cb(hdev, &wait_prop);
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hdev->asic_funcs->gen_wait_cb(hdev, &wait_prop);
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kref_get(&cs_cmpl->hw_sob->kref);
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kref_get(&cs_cmpl->hw_sob->kref);
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@ -6374,14 +6374,15 @@ static u32 gaudi_get_wait_cb_size(struct hl_device *hdev)
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sizeof(struct packet_msg_prot) * 2;
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sizeof(struct packet_msg_prot) * 2;
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}
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}
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static void gaudi_gen_signal_cb(struct hl_device *hdev, void *data, u16 sob_id)
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static u32 gaudi_gen_signal_cb(struct hl_device *hdev, void *data, u16 sob_id,
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u32 size)
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{
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{
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struct hl_cb *cb = (struct hl_cb *) data;
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struct hl_cb *cb = (struct hl_cb *) data;
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struct packet_msg_short *pkt;
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struct packet_msg_short *pkt;
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u32 value, ctl;
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u32 value, ctl, pkt_size = sizeof(*pkt);
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pkt = cb->kernel_address;
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pkt = cb->kernel_address + size;
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memset(pkt, 0, sizeof(*pkt));
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memset(pkt, 0, pkt_size);
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/* Inc by 1, Mode ADD */
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/* Inc by 1, Mode ADD */
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value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK, 1);
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value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK, 1);
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@ -6397,6 +6398,8 @@ static void gaudi_gen_signal_cb(struct hl_device *hdev, void *data, u16 sob_id)
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pkt->value = cpu_to_le32(value);
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pkt->value = cpu_to_le32(value);
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pkt->ctl = cpu_to_le32(ctl);
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pkt->ctl = cpu_to_le32(ctl);
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return size + pkt_size;
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}
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}
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static u32 gaudi_add_mon_msg_short(struct packet_msg_short *pkt, u32 value,
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static u32 gaudi_add_mon_msg_short(struct packet_msg_short *pkt, u32 value,
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@ -6419,21 +6422,42 @@ static u32 gaudi_add_mon_msg_short(struct packet_msg_short *pkt, u32 value,
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return pkt_size;
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return pkt_size;
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}
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}
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static u32 gaudi_add_arm_monitor_pkt(struct packet_msg_short *pkt, u16 sob_id,
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static u32 gaudi_add_arm_monitor_pkt(struct hl_device *hdev,
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u16 sob_val, u16 addr)
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struct packet_msg_short *pkt, u16 sob_base, u8 sob_mask,
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u16 sob_val, u16 mon_id)
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{
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{
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u64 monitor_base;
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u32 ctl, value, pkt_size = sizeof(*pkt);
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u32 ctl, value, pkt_size = sizeof(*pkt);
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u8 mask = ~(1 << (sob_id & 0x7));
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u16 msg_addr_offset;
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u8 mask;
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if (hl_gen_sob_mask(sob_base, sob_mask, &mask)) {
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dev_err(hdev->dev,
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"sob_base %u (mask %#x) is not valid\n",
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sob_base, sob_mask);
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return 0;
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}
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/*
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* monitor_base should be the content of the base0 address registers,
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* so it will be added to the msg short offsets
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*/
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monitor_base = mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0;
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msg_addr_offset =
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(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_ARM_0 + mon_id * 4) -
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monitor_base;
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memset(pkt, 0, pkt_size);
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memset(pkt, 0, pkt_size);
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value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_GID_MASK, sob_id / 8);
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/* Monitor config packet: bind the monitor to a sync object */
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value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_GID_MASK, sob_base / 8);
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_VAL_MASK, sob_val);
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_VAL_MASK, sob_val);
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MODE_MASK,
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MODE_MASK,
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0); /* GREATER OR EQUAL*/
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0); /* GREATER OR EQUAL*/
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MASK_MASK, mask);
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value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MASK_MASK, mask);
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ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, addr);
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ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, msg_addr_offset);
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OP_MASK, 0); /* write the value */
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OP_MASK, 0); /* write the value */
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_BASE_MASK, 2); /* W_S MON base */
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_BASE_MASK, 2); /* W_S MON base */
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);
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ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);
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@ -6468,60 +6492,61 @@ static u32 gaudi_add_fence_pkt(struct packet_fence *pkt)
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return pkt_size;
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return pkt_size;
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}
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}
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static void gaudi_gen_wait_cb(struct hl_device *hdev,
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static int gaudi_get_fence_addr(struct hl_device *hdev, u32 queue_id, u64 *addr)
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struct hl_gen_wait_properties *prop)
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{
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{
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struct hl_cb *cb = (struct hl_cb *) prop->data;
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u32 offset;
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void *buf = cb->kernel_address;
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u64 monitor_base, fence_addr = 0;
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u32 size = 0;
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u16 msg_addr_offset;
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switch (prop->q_idx) {
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switch (queue_id) {
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case GAUDI_QUEUE_ID_DMA_0_0:
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case GAUDI_QUEUE_ID_DMA_0_0:
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fence_addr = mmDMA0_QM_CP_FENCE2_RDATA_0;
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offset = mmDMA0_QM_CP_FENCE2_RDATA_0;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_0_1:
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case GAUDI_QUEUE_ID_DMA_0_1:
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fence_addr = mmDMA0_QM_CP_FENCE2_RDATA_1;
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offset = mmDMA0_QM_CP_FENCE2_RDATA_1;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_0_2:
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case GAUDI_QUEUE_ID_DMA_0_2:
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fence_addr = mmDMA0_QM_CP_FENCE2_RDATA_2;
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offset = mmDMA0_QM_CP_FENCE2_RDATA_2;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_0_3:
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case GAUDI_QUEUE_ID_DMA_0_3:
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fence_addr = mmDMA0_QM_CP_FENCE2_RDATA_3;
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offset = mmDMA0_QM_CP_FENCE2_RDATA_3;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_1_0:
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case GAUDI_QUEUE_ID_DMA_1_0:
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fence_addr = mmDMA1_QM_CP_FENCE2_RDATA_0;
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offset = mmDMA1_QM_CP_FENCE2_RDATA_0;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_1_1:
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case GAUDI_QUEUE_ID_DMA_1_1:
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fence_addr = mmDMA1_QM_CP_FENCE2_RDATA_1;
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offset = mmDMA1_QM_CP_FENCE2_RDATA_1;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_1_2:
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case GAUDI_QUEUE_ID_DMA_1_2:
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fence_addr = mmDMA1_QM_CP_FENCE2_RDATA_2;
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offset = mmDMA1_QM_CP_FENCE2_RDATA_2;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_1_3:
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case GAUDI_QUEUE_ID_DMA_1_3:
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fence_addr = mmDMA1_QM_CP_FENCE2_RDATA_3;
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offset = mmDMA1_QM_CP_FENCE2_RDATA_3;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_5_0:
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case GAUDI_QUEUE_ID_DMA_5_0:
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fence_addr = mmDMA5_QM_CP_FENCE2_RDATA_0;
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offset = mmDMA5_QM_CP_FENCE2_RDATA_0;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_5_1:
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case GAUDI_QUEUE_ID_DMA_5_1:
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fence_addr = mmDMA5_QM_CP_FENCE2_RDATA_1;
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offset = mmDMA5_QM_CP_FENCE2_RDATA_1;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_5_2:
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case GAUDI_QUEUE_ID_DMA_5_2:
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fence_addr = mmDMA5_QM_CP_FENCE2_RDATA_2;
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offset = mmDMA5_QM_CP_FENCE2_RDATA_2;
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break;
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break;
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case GAUDI_QUEUE_ID_DMA_5_3:
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case GAUDI_QUEUE_ID_DMA_5_3:
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fence_addr = mmDMA5_QM_CP_FENCE2_RDATA_3;
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offset = mmDMA5_QM_CP_FENCE2_RDATA_3;
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break;
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break;
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default:
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default:
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/* queue index should be valid here */
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return -EINVAL;
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dev_crit(hdev->dev, "wrong queue id %d for wait packet\n",
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prop->q_idx);
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return;
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}
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}
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fence_addr += CFG_BASE;
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*addr = CFG_BASE + offset;
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return 0;
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}
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static u32 gaudi_add_mon_pkts(void *buf, u16 mon_id, u64 fence_addr)
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{
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u64 monitor_base;
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u32 size = 0;
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u16 msg_addr_offset;
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/*
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/*
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* monitor_base should be the content of the base0 address registers,
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* monitor_base should be the content of the base0 address registers,
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@ -6530,15 +6555,17 @@ static void gaudi_gen_wait_cb(struct hl_device *hdev,
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monitor_base = mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0;
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monitor_base = mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0;
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/* First monitor config packet: low address of the sync */
|
/* First monitor config packet: low address of the sync */
|
||||||
msg_addr_offset = (mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 +
|
msg_addr_offset =
|
||||||
prop->mon_id * 4) - monitor_base;
|
(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 + mon_id * 4) -
|
||||||
|
monitor_base;
|
||||||
|
|
||||||
size += gaudi_add_mon_msg_short(buf + size, (u32) fence_addr,
|
size += gaudi_add_mon_msg_short(buf + size, (u32) fence_addr,
|
||||||
msg_addr_offset);
|
msg_addr_offset);
|
||||||
|
|
||||||
/* Second monitor config packet: high address of the sync */
|
/* Second monitor config packet: high address of the sync */
|
||||||
msg_addr_offset = (mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRH_0 +
|
msg_addr_offset =
|
||||||
prop->mon_id * 4) - monitor_base;
|
(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRH_0 + mon_id * 4) -
|
||||||
|
monitor_base;
|
||||||
|
|
||||||
size += gaudi_add_mon_msg_short(buf + size, (u32) (fence_addr >> 32),
|
size += gaudi_add_mon_msg_short(buf + size, (u32) (fence_addr >> 32),
|
||||||
msg_addr_offset);
|
msg_addr_offset);
|
||||||
@ -6547,20 +6574,35 @@ static void gaudi_gen_wait_cb(struct hl_device *hdev,
|
|||||||
* Third monitor config packet: the payload, i.e. what to write when the
|
* Third monitor config packet: the payload, i.e. what to write when the
|
||||||
* sync triggers
|
* sync triggers
|
||||||
*/
|
*/
|
||||||
msg_addr_offset = (mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_DATA_0 +
|
msg_addr_offset =
|
||||||
prop->mon_id * 4) - monitor_base;
|
(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_DATA_0 + mon_id * 4) -
|
||||||
|
monitor_base;
|
||||||
|
|
||||||
size += gaudi_add_mon_msg_short(buf + size, 1, msg_addr_offset);
|
size += gaudi_add_mon_msg_short(buf + size, 1, msg_addr_offset);
|
||||||
|
|
||||||
/* Fourth monitor config packet: bind the monitor to a sync object */
|
return size;
|
||||||
msg_addr_offset =
|
}
|
||||||
(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_ARM_0 + prop->mon_id * 4) -
|
|
||||||
monitor_base;
|
|
||||||
size += gaudi_add_arm_monitor_pkt(buf + size, prop->sob_id,
|
|
||||||
prop->sob_val, msg_addr_offset);
|
|
||||||
|
|
||||||
/* Fence packet */
|
u32 gaudi_gen_wait_cb(struct hl_device *hdev,
|
||||||
|
struct hl_gen_wait_properties *prop)
|
||||||
|
{
|
||||||
|
struct hl_cb *cb = (struct hl_cb *) prop->data;
|
||||||
|
void *buf = cb->kernel_address;
|
||||||
|
u64 fence_addr = 0;
|
||||||
|
u32 size = prop->size;
|
||||||
|
|
||||||
|
if (gaudi_get_fence_addr(hdev, prop->q_idx, &fence_addr)) {
|
||||||
|
dev_crit(hdev->dev, "wrong queue id %d for wait packet\n",
|
||||||
|
prop->q_idx);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
size += gaudi_add_mon_pkts(buf + size, prop->mon_id, fence_addr);
|
||||||
|
size += gaudi_add_arm_monitor_pkt(hdev, buf + size, prop->sob_base,
|
||||||
|
prop->sob_mask, prop->sob_val, prop->mon_id);
|
||||||
size += gaudi_add_fence_pkt(buf + size);
|
size += gaudi_add_fence_pkt(buf + size);
|
||||||
|
|
||||||
|
return size;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void gaudi_reset_sob(struct hl_device *hdev, void *data)
|
static void gaudi_reset_sob(struct hl_device *hdev, void *data)
|
||||||
|
@ -5288,15 +5288,16 @@ static u32 goya_get_wait_cb_size(struct hl_device *hdev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void goya_gen_signal_cb(struct hl_device *hdev, void *data, u16 sob_id)
|
static u32 goya_gen_signal_cb(struct hl_device *hdev, void *data, u16 sob_id,
|
||||||
|
u32 size)
|
||||||
{
|
{
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void goya_gen_wait_cb(struct hl_device *hdev,
|
static u32 goya_gen_wait_cb(struct hl_device *hdev,
|
||||||
struct hl_gen_wait_properties *prop)
|
struct hl_gen_wait_properties *prop)
|
||||||
{
|
{
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void goya_reset_sob(struct hl_device *hdev, void *data)
|
static void goya_reset_sob(struct hl_device *hdev, void *data)
|
||||||
|
Loading…
Reference in New Issue
Block a user