forked from Minki/linux
media: adv*/tc358743/ths8200: fill in min width/height/pixelclock
The v4l2_dv_timings_cap struct is used to do sanity checks when setting and enumerating DV timings, ensuring that only valid timings as per the HW capabilities are allowed. However, many drivers just filled in 0 for the minimum width, height or pixelclock frequency. This can cause timings with e.g. 0 as width and height to be accepted, which will in turn lead to a potential division by zero. Fill in proper values are minimum boundaries. 640x350 was chosen since it is the smallest resolution in v4l2-dv-timings.h. Same for 13 MHz as the lowest pixelclock frequency (it's slightly below the minimum of 13.5 MHz in the v4l2-dv-timings.h header). Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -578,7 +578,7 @@ static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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@ -130,7 +130,7 @@ static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT,
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V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
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ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
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ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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@ -771,7 +771,7 @@ static const struct v4l2_dv_timings_cap adv7604_timings_cap_analog = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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@ -782,7 +782,7 @@ static const struct v4l2_dv_timings_cap adv76xx_timings_cap_digital = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 225000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 225000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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@ -663,7 +663,7 @@ static const struct v4l2_dv_timings_cap adv7842_timings_cap_analog = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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@ -674,7 +674,7 @@ static const struct v4l2_dv_timings_cap adv7842_timings_cap_digital = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 225000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 225000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
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@ -59,7 +59,7 @@ static const struct v4l2_dv_timings_cap tc358743_timings_cap = {
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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/* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */
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/* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */
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V4L2_INIT_BT_TIMINGS(1, 10000, 1, 10000, 0, 165000000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 13000000, 165000000,
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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V4L2_DV_BT_CAP_PROGRESSIVE |
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V4L2_DV_BT_CAP_PROGRESSIVE |
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@ -49,7 +49,7 @@ static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
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.type = V4L2_DV_BT_656_1120,
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.type = V4L2_DV_BT_656_1120,
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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/* keep this initialization for compatibility with GCC < 4.4.6 */
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.reserved = { 0 },
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.reserved = { 0 },
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V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1080, 25000000, 148500000,
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V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1080, 25000000, 148500000,
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V4L2_DV_BT_STD_CEA861, V4L2_DV_BT_CAP_PROGRESSIVE)
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V4L2_DV_BT_STD_CEA861, V4L2_DV_BT_CAP_PROGRESSIVE)
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};
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};
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