staging: comedi: cb_pcidas64.c: Fix checkpatch warning
Fix checkpatch.pl warning: Block comments use * on subsequent lines Block comments use a trailing */ on a separate line Signed-off-by: Anson Jacob <ansonjacob.aj@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Anson Jacob
Greg Kroah-Hartman
parent
7bba53e9c2
commit
28fec2e65f
@ -1,34 +1,34 @@
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/*
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comedi/drivers/cb_pcidas64.c
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This is a driver for the ComputerBoards/MeasurementComputing PCI-DAS
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64xx, 60xx, and 4020 cards.
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Author: Frank Mori Hess <fmhess@users.sourceforge.net>
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Copyright (C) 2001, 2002 Frank Mori Hess
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Thanks also go to the following people:
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Steve Rosenbluth, for providing the source code for
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his pci-das6402 driver, and source code for working QNX pci-6402
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drivers by Greg Laird and Mariusz Bogacz. None of the code was
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used directly here, but it was useful as an additional source of
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documentation on how to program the boards.
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John Sims, for much testing and feedback on pcidas-4020 support.
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COMEDI - Linux Control and Measurement Device Interface
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Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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*/
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* comedi/drivers/cb_pcidas64.c
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* This is a driver for the ComputerBoards/MeasurementComputing PCI-DAS
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* 64xx, 60xx, and 4020 cards.
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*
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* Author: Frank Mori Hess <fmhess@users.sourceforge.net>
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* Copyright (C) 2001, 2002 Frank Mori Hess
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*
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* Thanks also go to the following people:
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*
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* Steve Rosenbluth, for providing the source code for
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* his pci-das6402 driver, and source code for working QNX pci-6402
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* drivers by Greg Laird and Mariusz Bogacz. None of the code was
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* used directly here, but it was useful as an additional source of
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* documentation on how to program the boards.
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*
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* John Sims, for much testing and feedback on pcidas-4020 support.
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* Driver: cb_pcidas64
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@ -66,19 +66,18 @@
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*/
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/*
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TODO:
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make it return error if user attempts an ai command that uses the
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external queue, and an ao command simultaneously user counter subdevice
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there are a number of boards this driver will support when they are
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fully released, but does not yet since the pci device id numbers
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are not yet available.
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support prescaled 100khz clock for slow pacing (not available on 6000
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series?)
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make ao fifo size adjustable like ai fifo
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*/
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* TODO:
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* make it return error if user attempts an ai command that uses the
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* external queue, and an ao command simultaneously user counter subdevice
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* there are a number of boards this driver will support when they are
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* fully released, but does not yet since the pci device id numbers
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* are not yet available.
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*
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* support prescaled 100khz clock for slow pacing (not available on 6000
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* series?)
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*
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* make ao fifo size adjustable like ai fifo
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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@ -90,53 +89,55 @@ TODO:
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#include "plx9080.h"
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#define TIMER_BASE 25 /* 40MHz master clock */
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/* 100kHz 'prescaled' clock for slow acquisition,
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* maybe I'll support this someday */
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/*
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* 100kHz 'prescaled' clock for slow acquisition,
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* maybe I'll support this someday
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*/
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#define PRESCALED_TIMER_BASE 10000
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#define DMA_BUFFER_SIZE 0x1000
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/* maximum value that can be loaded into board's 24-bit counters*/
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/* maximum value that can be loaded into board's 24-bit counters */
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static const int max_counter_value = 0xffffff;
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/* PCI-DAS64xxx base addresses */
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/* devpriv->main_iobase registers */
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enum write_only_registers {
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INTR_ENABLE_REG = 0x0, /* interrupt enable register */
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HW_CONFIG_REG = 0x2, /* hardware config register */
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INTR_ENABLE_REG = 0x0, /* interrupt enable register */
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HW_CONFIG_REG = 0x2, /* hardware config register */
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DAQ_SYNC_REG = 0xc,
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DAQ_ATRIG_LOW_4020_REG = 0xc,
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ADC_CONTROL0_REG = 0x10, /* adc control register 0 */
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ADC_CONTROL1_REG = 0x12, /* adc control register 1 */
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ADC_CONTROL0_REG = 0x10, /* adc control register 0 */
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ADC_CONTROL1_REG = 0x12, /* adc control register 1 */
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CALIBRATION_REG = 0x14,
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/* lower 16 bits of adc sample interval counter */
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/* lower 16 bits of adc sample interval counter */
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ADC_SAMPLE_INTERVAL_LOWER_REG = 0x16,
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/* upper 8 bits of adc sample interval counter */
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/* upper 8 bits of adc sample interval counter */
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ADC_SAMPLE_INTERVAL_UPPER_REG = 0x18,
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/* lower 16 bits of delay interval counter */
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/* lower 16 bits of delay interval counter */
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ADC_DELAY_INTERVAL_LOWER_REG = 0x1a,
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/* upper 8 bits of delay interval counter */
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/* upper 8 bits of delay interval counter */
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ADC_DELAY_INTERVAL_UPPER_REG = 0x1c,
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/* lower 16 bits of hardware conversion/scan counter */
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/* lower 16 bits of hardware conversion/scan counter */
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ADC_COUNT_LOWER_REG = 0x1e,
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/* upper 8 bits of hardware conversion/scan counter */
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/* upper 8 bits of hardware conversion/scan counter */
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ADC_COUNT_UPPER_REG = 0x20,
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ADC_START_REG = 0x22, /* software trigger to start acquisition */
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ADC_CONVERT_REG = 0x24, /* initiates single conversion */
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ADC_QUEUE_CLEAR_REG = 0x26, /* clears adc queue */
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ADC_QUEUE_LOAD_REG = 0x28, /* loads adc queue */
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ADC_START_REG = 0x22, /* software trigger to start acquisition */
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ADC_CONVERT_REG = 0x24, /* initiates single conversion */
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ADC_QUEUE_CLEAR_REG = 0x26, /* clears adc queue */
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ADC_QUEUE_LOAD_REG = 0x28, /* loads adc queue */
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ADC_BUFFER_CLEAR_REG = 0x2a,
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/* high channel for internal queue, use adc_chan_bits() inline above */
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/* high channel for internal queue, use adc_chan_bits() inline above */
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ADC_QUEUE_HIGH_REG = 0x2c,
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DAC_CONTROL0_REG = 0x50, /* dac control register 0 */
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DAC_CONTROL1_REG = 0x52, /* dac control register 0 */
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/* lower 16 bits of dac sample interval counter */
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DAC_CONTROL0_REG = 0x50, /* dac control register 0 */
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DAC_CONTROL1_REG = 0x52, /* dac control register 0 */
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/* lower 16 bits of dac sample interval counter */
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DAC_SAMPLE_INTERVAL_LOWER_REG = 0x54,
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/* upper 8 bits of dac sample interval counter */
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/* upper 8 bits of dac sample interval counter */
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DAC_SAMPLE_INTERVAL_UPPER_REG = 0x56,
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DAC_SELECT_REG = 0x60,
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DAC_START_REG = 0x64,
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DAC_BUFFER_CLEAR_REG = 0x66, /* clear dac buffer */
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DAC_BUFFER_CLEAR_REG = 0x66, /* clear dac buffer */
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};
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static inline unsigned int dac_convert_reg(unsigned int channel)
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@ -216,7 +217,8 @@ enum hw_config_contents {
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/* use 225 nanosec strobe when loading dac instead of 50 nanosec */
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SLOW_DAC_BIT = 0x400,
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/* bit with unknown function yet given as default value in pci-das64
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* manual */
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* manual
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*/
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HW_CONFIG_DUMMY_BITS = 0x2000,
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/* bit selects channels 1/0 for analog input/output, otherwise 0/1 */
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DMA_CH_SELECT_BIT = 0x8000,
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@ -1138,12 +1140,14 @@ struct pcidas64_private {
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/* physical addresses of ai dma buffers */
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dma_addr_t ai_buffer_bus_addr[MAX_AI_DMA_RING_COUNT];
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/* array of ai dma descriptors read by plx9080,
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* allocated to get proper alignment */
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* allocated to get proper alignment
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*/
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struct plx_dma_desc *ai_dma_desc;
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/* physical address of ai dma descriptor array */
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dma_addr_t ai_dma_desc_bus_addr;
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/* index of the ai dma descriptor/buffer
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* that is currently being used */
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* that is currently being used
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*/
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unsigned int ai_dma_index;
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/* dma buffers for analog output */
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uint16_t *ao_buffer[AO_DMA_RING_COUNT];
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@ -1314,10 +1318,12 @@ static void init_plx9080(struct comedi_device *dev)
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/* enable dma chaining */
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bits |= PLX_DMAMODE_CHAINEN;
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/* enable interrupt on dma done
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* (probably don't need this, since chain never finishes) */
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* (probably don't need this, since chain never finishes)
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*/
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bits |= PLX_DMAMODE_DONEIEN;
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/* don't increment local address during transfers
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* (we are transferring from a fixed fifo register) */
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* (we are transferring from a fixed fifo register)
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*/
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bits |= PLX_DMAMODE_LACONST;
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/* route dma interrupt to pci bus */
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bits |= PLX_DMAMODE_INTRPCI;
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