From 28f07fab26319dacc5675ae01dfc84d82122c59b Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Fri, 20 May 2022 22:36:49 +1000 Subject: [PATCH] powerpc/vdso: Fix __kernel_sync_dicache sequence with coherent icache Processors with coherent icache require the sequence sync ; icbi ; isync to entire store->execute coherency. icbi (to any address) must be executed to ensure isync flushes the pipeline. See "POWER9 Processor User's Manual, 4.6.2.2 Instruction Cache Block Invalidate (icbi)" for details. __kernel_sync_dicache is missing icbi for the coherent icache path. Add it. Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220520123649.258440-1-npiggin@gmail.com --- arch/powerpc/kernel/vdso/cacheflush.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kernel/vdso/cacheflush.S b/arch/powerpc/kernel/vdso/cacheflush.S index d4e43ab2d5df..0085ae464dac 100644 --- a/arch/powerpc/kernel/vdso/cacheflush.S +++ b/arch/powerpc/kernel/vdso/cacheflush.S @@ -91,6 +91,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) 3: crclr cr0*4+so sync + icbi 0,r1 isync li r3,0 blr