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ARM: consolidate pen_release instead of having per platform definitions

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Almost each SMP platform defines pen_release to manage booting secondary
CPUs. This of course clashes with the single zImage effort.

Add the pen_release definition to the ARM SMP code, and remove all others.
This should only be used by platforms which lack any kind of CPU power
management...

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Marc Zyngier
2012-06-12 11:16:27 +01:00
committed by Arnd Bergmann
parent ac6c799871
commit 28e8e29c61
13 changed files with 7 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/include/asm/smp.h
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@@ -70,6 +70,7 @@ struct secondary_data {
void *stack; void *stack;
}; };
extern struct secondary_data secondary_data; extern struct secondary_data secondary_data;
extern volatile int pen_release;
extern int __cpu_disable(void); extern int __cpu_disable(void);

6
arch/arm/kernel/smp.c
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@@ -51,6 +51,12 @@
*/ */
struct secondary_data secondary_data; struct secondary_data secondary_data;
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __cpuinitdata pen_release = -1;
enum ipi_msg_type { enum ipi_msg_type {
IPI_TIMER = 2, IPI_TIMER = 2,
IPI_RESCHEDULE, IPI_RESCHEDULE,

2
arch/arm/mach-exynos/hotplug.c
View File

@@ -23,8 +23,6 @@
#include "common.h" #include "common.h"
extern volatile int pen_release;
static inline void cpu_enter_lowpower(void) static inline void cpu_enter_lowpower(void)
{ {
unsigned int v; unsigned int v;

7
arch/arm/mach-exynos/platsmp.c
View File

@@ -39,13 +39,6 @@ extern void exynos4_secondary_startup(void);
#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ #define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM5 : S5P_VA_SYSRAM) S5P_INFORM5 : S5P_VA_SYSRAM)
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __cpuinitdata pen_release = -1;
/* /*
* Write pen_release in a way that is guaranteed to be visible to all * Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency * observers, irrespective of whether they're taking part in coherency

2
arch/arm/mach-msm/hotplug.c
View File

@@ -15,8 +15,6 @@
#include "core.h" #include "core.h"
extern volatile int pen_release;
static inline void cpu_enter_lowpower(void) static inline void cpu_enter_lowpower(void)
{ {
/* Just flush the cache. Changing the coherency is not yet /* Just flush the cache. Changing the coherency is not yet

5
arch/arm/mach-msm/platsmp.c
View File

@@ -35,11 +35,6 @@
#define GIC_PPI_EDGE_MASK 0xFFFFD7FF #define GIC_PPI_EDGE_MASK 0xFFFFD7FF
extern void msm_secondary_startup(void); extern void msm_secondary_startup(void);
/*
* control for which core is the next to come out of the secondary
* boot "holding pen".
*/
volatile int pen_release = -1;
static DEFINE_SPINLOCK(boot_lock); static DEFINE_SPINLOCK(boot_lock);

2
arch/arm/mach-realview/hotplug.c
View File

@@ -16,8 +16,6 @@
#include <asm/cp15.h> #include <asm/cp15.h>
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
extern volatile int pen_release;
static inline void cpu_enter_lowpower(void) static inline void cpu_enter_lowpower(void)
{ {
unsigned int v; unsigned int v;

2
arch/arm/mach-spear13xx/hotplug.c
View File

@@ -17,8 +17,6 @@
#include <asm/cp15.h> #include <asm/cp15.h>
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
extern volatile int pen_release;
static inline void cpu_enter_lowpower(void) static inline void cpu_enter_lowpower(void)
{ {
unsigned int v; unsigned int v;

5
arch/arm/mach-spear13xx/platsmp.c
View File

@@ -21,11 +21,6 @@
#include <mach/spear.h> #include <mach/spear.h>
#include <mach/generic.h> #include <mach/generic.h>
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __cpuinitdata pen_release = -1;
static DEFINE_SPINLOCK(boot_lock); static DEFINE_SPINLOCK(boot_lock);
static void __iomem *scu_base = IOMEM(VA_SCU_BASE); static void __iomem *scu_base = IOMEM(VA_SCU_BASE);

2
arch/arm/mach-ux500/hotplug.c
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@@ -17,8 +17,6 @@
#include <mach/setup.h> #include <mach/setup.h>
extern volatile int pen_release;
/* /*
* platform-specific code to shutdown a CPU * platform-specific code to shutdown a CPU
* *

6
arch/arm/mach-ux500/platsmp.c
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@@ -27,12 +27,6 @@
/* This is called from headsmp.S to wakeup the secondary core */ /* This is called from headsmp.S to wakeup the secondary core */
extern void u8500_secondary_startup(void); extern void u8500_secondary_startup(void);
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int pen_release = -1;
/* /*
* Write pen_release in a way that is guaranteed to be visible to all * Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency * observers, irrespective of whether they're taking part in coherency

2
arch/arm/mach-vexpress/hotplug.c
View File

@@ -16,8 +16,6 @@
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
#include <asm/cp15.h> #include <asm/cp15.h>
extern volatile int pen_release;
static inline void cpu_enter_lowpower(void) static inline void cpu_enter_lowpower(void)
{ {
unsigned int v; unsigned int v;

6
arch/arm/plat-versatile/platsmp.c
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@@ -19,12 +19,6 @@
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __cpuinitdata pen_release = -1;
/* /*
* Write pen_release in a way that is guaranteed to be visible to all * Write pen_release in a way that is guaranteed to be visible to all
* observers, irrespective of whether they're taking part in coherency * observers, irrespective of whether they're taking part in coherency