forked from Minki/linux
drm/komeda: Unify mclk/pclk/pipeline->aclk to one MCLK
Current komeda driver uses three dedicated clks for a specific purpose: - mclk: main engine clock - pclk: APB clock - pipeline->aclk: AXI clock. But per spec the komeda HW only has three input clks: - ACLK: used for AXI masters, APB slave and most pipeline processing - PXCLK for pipeline 0: output pixel clock for pipeline 0 - PXCLK for pipeline 1: output pixel clock for pipeline 1 So one ACLK is enough, no need to split it to three mclk/pclk/axiclk. drop pclk/pipeline->axiclk. but only keep one mclk in komeda driver. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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parent
109bd7d5f4
commit
28be315c9c
@ -123,9 +123,6 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
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DRM_ERROR("failed to enable mclk.\n");
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}
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err = clk_prepare_enable(master->aclk);
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if (err)
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DRM_ERROR("failed to enable axi clk for pipe%d.\n", master->id);
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err = clk_set_rate(master->pxlclk, pxlclk_rate);
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if (err)
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DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
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@ -166,7 +163,6 @@ komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
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mdev->dpmode = new_mode;
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clk_disable_unprepare(master->pxlclk);
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clk_disable_unprepare(master->aclk);
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if (new_mode == KOMEDA_MODE_INACTIVE)
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clk_disable_unprepare(mdev->mclk);
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@ -362,13 +358,6 @@ komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
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return MODE_CLOCK_HIGH;
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}
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if (clk_round_rate(master->aclk, mode_clk) < pxlclk) {
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DRM_DEBUG_ATOMIC("aclk can't satisfy the requirement of %s-clk: %ld.\n",
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m->name, pxlclk);
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return MODE_CLOCK_HIGH;
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}
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return MODE_OK;
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}
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@ -116,13 +116,6 @@ static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
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pipe = mdev->pipelines[pipe_id];
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clk = of_clk_get_by_name(np, "aclk");
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if (IS_ERR(clk)) {
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DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
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return PTR_ERR(clk);
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}
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pipe->aclk = clk;
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clk = of_clk_get_by_name(np, "pxclk");
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if (IS_ERR(clk)) {
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DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id);
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@ -145,14 +138,8 @@ static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct device_node *child, *np = dev->of_node;
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struct clk *clk;
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int ret;
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clk = devm_clk_get(dev, "mclk");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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mdev->mclk = clk;
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mdev->irq = platform_get_irq(pdev, 0);
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if (mdev->irq < 0) {
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DRM_ERROR("could not get IRQ number.\n");
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@ -206,16 +193,15 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
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goto err_cleanup;
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}
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mdev->pclk = devm_clk_get(dev, "pclk");
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if (IS_ERR(mdev->pclk)) {
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DRM_ERROR("Get APB clk failed.\n");
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err = PTR_ERR(mdev->pclk);
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mdev->pclk = NULL;
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mdev->mclk = devm_clk_get(dev, "mclk");
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if (IS_ERR(mdev->mclk)) {
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DRM_ERROR("Get engine clk failed.\n");
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err = PTR_ERR(mdev->mclk);
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mdev->mclk = NULL;
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goto err_cleanup;
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}
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/* Enable APB clock to access the registers */
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clk_prepare_enable(mdev->pclk);
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clk_prepare_enable(mdev->mclk);
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mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
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if (!komeda_product_match(mdev, product->product_id)) {
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@ -315,15 +301,10 @@ void komeda_dev_destroy(struct komeda_dev *mdev)
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}
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if (mdev->mclk) {
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clk_disable_unprepare(mdev->mclk);
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devm_clk_put(dev, mdev->mclk);
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mdev->mclk = NULL;
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}
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if (mdev->pclk) {
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clk_disable_unprepare(mdev->pclk);
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devm_clk_put(dev, mdev->pclk);
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mdev->pclk = NULL;
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}
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devm_kfree(dev, mdev);
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}
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@ -160,8 +160,6 @@ struct komeda_dev {
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struct komeda_chip_info chip;
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/** @fmt_tbl: initialized by &komeda_dev_funcs->init_format_table */
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struct komeda_format_caps_table fmt_tbl;
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/** @pclk: APB clock for register access */
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struct clk *pclk;
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/** @mclk: HW main engine clk */
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struct clk *mclk;
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@ -53,7 +53,6 @@ void komeda_pipeline_destroy(struct komeda_dev *mdev,
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}
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clk_put(pipe->pxlclk);
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clk_put(pipe->aclk);
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of_node_put(pipe->of_output_dev);
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of_node_put(pipe->of_output_port);
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@ -343,8 +343,6 @@ struct komeda_pipeline {
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struct komeda_dev *mdev;
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/** @pxlclk: pixel clock */
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struct clk *pxlclk;
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/** @aclk: AXI clock */
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struct clk *aclk;
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/** @id: pipeline id */
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int id;
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/** @avail_comps: available components mask of pipeline */
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