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powerpc/32: Interchange r1 and r11 in SYSCALL_ENTRY on booke

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To better match non booke version of SYSCALL_ENTRY macro,
interchange r1 and r11 in the booke version.

While at it, in both versions use r1 instead of r11 to save
_NIP and _CCR.

All other uses of r11 will go away in next patch, so don't
bother changing them for now.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1684c39724a069b0ce1aa82eaee6ec194e354e4e.1622818435.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy
2021-06-04 14:54:13 +00:00
committed by Michael Ellerman
parent 10e9252f04
commit 275dcf24e2
2 changed files with 11 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/powerpc/kernel/head_32.h
View File

@@ -158,12 +158,12 @@ _ASM_NOKPROBE_SYMBOL(\name\()_virt)
stw r11,GPR1(r1) stw r11,GPR1(r1)
stw r11,0(r1) stw r11,0(r1)
mr r11, r1 mr r11, r1
stw r12,_NIP(r11) stw r12,_NIP(r1)
mflr r12 mflr r12
stw r12, _LINK(r11) stw r12, _LINK(r11)
mfcr r12 mfcr r12
rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */ rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */
stw r12,_CCR(r11) /* save registers */ stw r12,_CCR(r1)
#ifdef CONFIG_40x #ifdef CONFIG_40x
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */ rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
#endif #endif

17
arch/powerpc/kernel/head_booke.h
View File

@@ -135,17 +135,18 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
#endif #endif
mfspr r9, SPRN_SRR1 mfspr r9, SPRN_SRR1
BOOKE_CLEAR_BTB(r11) BOOKE_CLEAR_BTB(r11)
lwz r11, TASK_STACK - THREAD(r10) mr r11, r1
lwz r1, TASK_STACK - THREAD(r10)
rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */ rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */
ALLOC_STACK_FRAME(r11, THREAD_SIZE - INT_FRAME_SIZE) ALLOC_STACK_FRAME(r1, THREAD_SIZE - INT_FRAME_SIZE)
stw r12, _CCR(r11) /* save various registers */ stw r12, _CCR(r1)
mflr r12 mflr r12
stw r12,_LINK(r11) stw r12,_LINK(r1)
mfspr r12,SPRN_SRR0 mfspr r12,SPRN_SRR0
stw r1, GPR1(r11) stw r11, GPR1(r1)
stw r1, 0(r11) stw r11, 0(r1)
mr r1, r11 mr r11, r1
stw r12,_NIP(r11) stw r12,_NIP(r1)
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */ rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
lis r12, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */ lis r12, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
stw r2,GPR2(r11) stw r2,GPR2(r11)