forked from Minki/linux
cxgb4: Don't attempt to upgrade T4 firmware when cxgb4 will end up as a slave
This patch adds a new common code routine to upgrade an adapter's firmware. This routine handles all of the complexities of working with the the existing adapter firmware in order to quiesce the adapter and uP, etc. For an automatic upgrade it will send a HELLO command to check if cxgb4 want/can upgrade firmware, i.e. if cxgb4 is MASTER and has newer firmware that it wants to load and call the new common code routine t4_fw_upgrade. Note that it should not issue a RESET command after a successful firmware upgrade. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vipul Pandya
David S. Miller
parent
1648a22b16
commit
26f7cbc0a5
@ -726,6 +726,10 @@ int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
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int t4_fw_bye(struct adapter *adap, unsigned int mbox);
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int t4_early_init(struct adapter *adap, unsigned int mbox);
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int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
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int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force);
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int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset);
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int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
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const u8 *fw_data, unsigned int size, int force);
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int t4_fw_config_file(struct adapter *adap, unsigned int mbox,
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unsigned int mtype, unsigned int maddr,
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u32 *finiver, u32 *finicsum, u32 *cfcsum);
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@ -929,10 +929,18 @@ static int upgrade_fw(struct adapter *adap)
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*/
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if (FW_HDR_FW_VER_MAJOR_GET(adap->params.fw_vers) != FW_VERSION_MAJOR ||
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vers > adap->params.fw_vers) {
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ret = -t4_load_fw(adap, fw->data, fw->size);
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dev_info(dev, "upgrading firmware ...\n");
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ret = t4_fw_upgrade(adap, adap->mbox, fw->data, fw->size,
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/*force=*/false);
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if (!ret)
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dev_info(dev, "firmware upgraded to version %pI4 from "
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FW_FNAME "\n", &hdr->fw_ver);
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dev_info(dev, "firmware successfully upgraded to "
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FW_FNAME " (%d.%d.%d.%d)\n",
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FW_HDR_FW_VER_MAJOR_GET(vers),
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FW_HDR_FW_VER_MINOR_GET(vers),
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FW_HDR_FW_VER_MICRO_GET(vers),
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FW_HDR_FW_VER_BUILD_GET(vers));
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else
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dev_err(dev, "firmware upgrade failed! err=%d\n", -ret);
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} else {
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/*
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* Tell our caller that we didn't upgrade the firmware.
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@ -2536,6 +2536,177 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset)
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return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
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}
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/**
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* t4_fw_halt - issue a reset/halt to FW and put uP into RESET
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* @adap: the adapter
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* @mbox: mailbox to use for the FW RESET command (if desired)
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* @force: force uP into RESET even if FW RESET command fails
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*
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* Issues a RESET command to firmware (if desired) with a HALT indication
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* and then puts the microprocessor into RESET state. The RESET command
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* will only be issued if a legitimate mailbox is provided (mbox <=
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* FW_PCIE_FW_MASTER_MASK).
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*
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* This is generally used in order for the host to safely manipulate the
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* adapter without fear of conflicting with whatever the firmware might
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* be doing. The only way out of this state is to RESTART the firmware
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* ...
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*/
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int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force)
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{
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int ret = 0;
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/*
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* If a legitimate mailbox is provided, issue a RESET command
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* with a HALT indication.
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*/
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if (mbox <= FW_PCIE_FW_MASTER_MASK) {
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struct fw_reset_cmd c;
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memset(&c, 0, sizeof(c));
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INIT_CMD(c, RESET, WRITE);
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c.val = htonl(PIORST | PIORSTMODE);
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c.halt_pkd = htonl(FW_RESET_CMD_HALT(1U));
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ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
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}
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/*
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* Normally we won't complete the operation if the firmware RESET
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* command fails but if our caller insists we'll go ahead and put the
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* uP into RESET. This can be useful if the firmware is hung or even
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* missing ... We'll have to take the risk of putting the uP into
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* RESET without the cooperation of firmware in that case.
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*
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* We also force the firmware's HALT flag to be on in case we bypassed
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* the firmware RESET command above or we're dealing with old firmware
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* which doesn't have the HALT capability. This will serve as a flag
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* for the incoming firmware to know that it's coming out of a HALT
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* rather than a RESET ... if it's new enough to understand that ...
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*/
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if (ret == 0 || force) {
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t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, UPCRST);
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t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT,
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FW_PCIE_FW_HALT);
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}
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/*
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* And we always return the result of the firmware RESET command
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* even when we force the uP into RESET ...
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*/
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return ret;
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}
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/**
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* t4_fw_restart - restart the firmware by taking the uP out of RESET
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* @adap: the adapter
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* @reset: if we want to do a RESET to restart things
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*
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* Restart firmware previously halted by t4_fw_halt(). On successful
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* return the previous PF Master remains as the new PF Master and there
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* is no need to issue a new HELLO command, etc.
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*
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* We do this in two ways:
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*
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* 1. If we're dealing with newer firmware we'll simply want to take
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* the chip's microprocessor out of RESET. This will cause the
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* firmware to start up from its start vector. And then we'll loop
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* until the firmware indicates it's started again (PCIE_FW.HALT
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* reset to 0) or we timeout.
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*
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* 2. If we're dealing with older firmware then we'll need to RESET
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* the chip since older firmware won't recognize the PCIE_FW.HALT
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* flag and automatically RESET itself on startup.
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*/
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int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset)
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{
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if (reset) {
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/*
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* Since we're directing the RESET instead of the firmware
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* doing it automatically, we need to clear the PCIE_FW.HALT
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* bit.
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*/
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t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT, 0);
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/*
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* If we've been given a valid mailbox, first try to get the
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* firmware to do the RESET. If that works, great and we can
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* return success. Otherwise, if we haven't been given a
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* valid mailbox or the RESET command failed, fall back to
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* hitting the chip with a hammer.
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*/
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if (mbox <= FW_PCIE_FW_MASTER_MASK) {
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t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0);
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msleep(100);
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if (t4_fw_reset(adap, mbox,
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PIORST | PIORSTMODE) == 0)
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return 0;
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}
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t4_write_reg(adap, PL_RST, PIORST | PIORSTMODE);
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msleep(2000);
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} else {
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int ms;
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t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0);
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for (ms = 0; ms < FW_CMD_MAX_TIMEOUT; ) {
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if (!(t4_read_reg(adap, PCIE_FW) & FW_PCIE_FW_HALT))
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return 0;
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msleep(100);
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ms += 100;
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}
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return -ETIMEDOUT;
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}
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return 0;
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}
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/**
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* t4_fw_upgrade - perform all of the steps necessary to upgrade FW
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* @adap: the adapter
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* @mbox: mailbox to use for the FW RESET command (if desired)
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* @fw_data: the firmware image to write
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* @size: image size
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* @force: force upgrade even if firmware doesn't cooperate
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*
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* Perform all of the steps necessary for upgrading an adapter's
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* firmware image. Normally this requires the cooperation of the
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* existing firmware in order to halt all existing activities
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* but if an invalid mailbox token is passed in we skip that step
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* (though we'll still put the adapter microprocessor into RESET in
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* that case).
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*
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* On successful return the new firmware will have been loaded and
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* the adapter will have been fully RESET losing all previous setup
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* state. On unsuccessful return the adapter may be completely hosed ...
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* positive errno indicates that the adapter is ~probably~ intact, a
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* negative errno indicates that things are looking bad ...
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*/
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int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
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const u8 *fw_data, unsigned int size, int force)
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{
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const struct fw_hdr *fw_hdr = (const struct fw_hdr *)fw_data;
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int reset, ret;
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ret = t4_fw_halt(adap, mbox, force);
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if (ret < 0 && !force)
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return ret;
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ret = t4_load_fw(adap, fw_data, size);
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if (ret < 0)
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return ret;
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/*
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* Older versions of the firmware don't understand the new
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* PCIE_FW.HALT flag and so won't know to perform a RESET when they
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* restart. So for newly loaded older firmware we'll have to do the
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* RESET for it so it starts up on a clean slate. We can tell if
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* the newly loaded firmware will handle this right by checking
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* its header flags to see if it advertises the capability.
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*/
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reset = ((ntohl(fw_hdr->flags) & FW_HDR_FLAGS_RESET_HALT) == 0);
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return t4_fw_restart(adap, mbox, reset);
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}
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/**
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* t4_fw_config_file - setup an adapter via a Configuration File
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* @adap: the adapter
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@ -321,6 +321,8 @@
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#define WINDOW(x) ((x) << WINDOW_SHIFT)
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#define PCIE_MEM_ACCESS_OFFSET 0x306c
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#define PCIE_FW 0x30b8
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#define PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS 0x5908
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#define RNPP 0x80000000U
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#define RPCP 0x20000000U
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@ -419,6 +421,7 @@
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#define CIM_BOOT_CFG 0x7b00
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#define BOOTADDR_MASK 0xffffff00U
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#define UPCRST 0x1U
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#define CIM_PF_MAILBOX_DATA 0x240
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#define CIM_PF_MAILBOX_CTRL 0x280
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@ -317,9 +317,15 @@ struct fw_reset_cmd {
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__be32 op_to_write;
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__be32 retval_len16;
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__be32 val;
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__be32 r3;
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__be32 halt_pkd;
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};
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#define FW_RESET_CMD_HALT_SHIFT 31
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#define FW_RESET_CMD_HALT_MASK 0x1
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#define FW_RESET_CMD_HALT(x) ((x) << FW_RESET_CMD_HALT_SHIFT)
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#define FW_RESET_CMD_HALT_GET(x) \
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(((x) >> FW_RESET_CMD_HALT_SHIFT) & FW_RESET_CMD_HALT_MASK)
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enum fw_hellow_cmd {
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fw_hello_cmd_stage_os = 0x0
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};
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@ -1648,6 +1654,7 @@ struct fw_debug_cmd {
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#define FW_PCIE_FW_ERR (1U << 31)
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#define FW_PCIE_FW_INIT (1U << 30)
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#define FW_PCIE_FW_HALT (1U << 29)
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#define FW_PCIE_FW_MASTER_VLD (1U << 15)
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#define FW_PCIE_FW_MASTER_MASK 0x7
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#define FW_PCIE_FW_MASTER_SHIFT 12
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@ -1669,7 +1676,11 @@ struct fw_hdr {
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u8 intfver_iscsi;
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u8 intfver_fcoe;
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u8 reserved2;
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__be32 reserved3[27];
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__u32 reserved3;
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__u32 reserved4;
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__u32 reserved5;
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__be32 flags;
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__be32 reserved6[23];
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};
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#define FW_HDR_FW_VER_MAJOR_GET(x) (((x) >> 24) & 0xff)
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@ -1677,4 +1688,8 @@ struct fw_hdr {
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#define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff)
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#define FW_HDR_FW_VER_BUILD_GET(x) (((x) >> 0) & 0xff)
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enum fw_hdr_flags {
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FW_HDR_FLAGS_RESET_HALT = 0x00000001,
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};
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#endif /* _T4FW_INTERFACE_H_ */
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