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drm/amd/display: Wrap dcn301_calculate_wm_and_dlg for FPU.

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Mirrors the logic for dcn30. Cue lots of WARNs and some
kernel panics without this fix.

Cc: stable@vger.kernel.org
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Bas Nieuwenhuizen 2022-01-24 01:23:36 +01:00 committed by Alex Deucher
parent 72a8d87b87
commit 25f1488bdb
3 changed files with 13 additions and 2 deletions
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11
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
View File

@ -1380,6 +1380,17 @@ static void set_wm_ranges(
pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges);
}
static void dcn301_calculate_wm_and_dlg(
struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,
int vlevel)
{
DC_FP_START();
dcn301_calculate_wm_and_dlg_fp(dc, context, pipes, pipe_cnt, vlevel);
DC_FP_END();
}
static struct resource_funcs dcn301_res_pool_funcs = {
.destroy = dcn301_destroy_resource_pool,
.link_enc_create = dcn301_link_encoder_create,

2
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
View File

@ -327,7 +327,7 @@ void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info)
dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
}
void dcn301_calculate_wm_and_dlg(struct dc *dc,
void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,

2
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h
View File

@ -34,7 +34,7 @@ void dcn301_fpu_set_wm_ranges(int i,
void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);
void dcn301_calculate_wm_and_dlg(struct dc *dc,
void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,