forked from Minki/linux
crypto: chcr - Pass lcb bit setting to firmware
GCM and CBC mode of operation requires Last Cipher Block. This patch set lcb bit in WR header when required. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -518,7 +518,8 @@ static inline void create_wreq(struct chcr_context *ctx,
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void *req, struct sk_buff *skb,
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int kctx_len, int hash_sz,
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int is_iv,
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unsigned int sc_len)
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unsigned int sc_len,
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unsigned int lcb)
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{
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struct uld_ctx *u_ctx = ULD_CTX(ctx);
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int iv_loc = IV_DSGL;
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@ -543,7 +544,8 @@ static inline void create_wreq(struct chcr_context *ctx,
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chcr_req->wreq.cookie = cpu_to_be64((uintptr_t)req);
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chcr_req->wreq.rx_chid_to_rx_q_id =
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FILL_WR_RX_Q_ID(ctx->dev->rx_channel_id, qid,
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is_iv ? iv_loc : IV_NOP, ctx->tx_qidx);
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is_iv ? iv_loc : IV_NOP, !!lcb,
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ctx->tx_qidx);
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chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id,
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qid);
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@ -652,7 +654,8 @@ static struct sk_buff
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write_buffer_to_skb(skb, &frags, reqctx->iv, ivsize);
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write_sg_to_skb(skb, &frags, req->src, req->nbytes);
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create_wreq(ctx, chcr_req, req, skb, kctx_len, 0, 1,
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sizeof(struct cpl_rx_phys_dsgl) + phys_dsgl);
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sizeof(struct cpl_rx_phys_dsgl) + phys_dsgl,
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ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC);
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reqctx->skb = skb;
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skb_get(skb);
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return skb;
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@ -923,7 +926,7 @@ static struct sk_buff *create_hash_wr(struct ahash_request *req,
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write_sg_to_skb(skb, &frags, req->src, param->sg_len);
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create_wreq(ctx, chcr_req, req, skb, kctx_len, hash_size_in_response, 0,
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DUMMY_BYTES);
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DUMMY_BYTES, 0);
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req_ctx->skb = skb;
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skb_get(skb);
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return skb;
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@ -1508,7 +1511,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req,
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write_buffer_to_skb(skb, &frags, req->iv, ivsize);
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write_sg_to_skb(skb, &frags, src, req->cryptlen);
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create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1,
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sizeof(struct cpl_rx_phys_dsgl) + dst_size);
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sizeof(struct cpl_rx_phys_dsgl) + dst_size, 0);
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reqctx->skb = skb;
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skb_get(skb);
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@ -1804,7 +1807,7 @@ static struct sk_buff *create_aead_ccm_wr(struct aead_request *req,
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skb_set_transport_header(skb, transhdr_len);
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frags = fill_aead_req_fields(skb, req, src, ivsize, aeadctx);
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create_wreq(ctx, chcr_req, req, skb, kctx_len, 0, 1,
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sizeof(struct cpl_rx_phys_dsgl) + dst_size);
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sizeof(struct cpl_rx_phys_dsgl) + dst_size, 0);
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reqctx->skb = skb;
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skb_get(skb);
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return skb;
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@ -1950,7 +1953,8 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req,
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write_buffer_to_skb(skb, &frags, reqctx->iv, ivsize);
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write_sg_to_skb(skb, &frags, src, req->cryptlen);
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create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1,
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sizeof(struct cpl_rx_phys_dsgl) + dst_size);
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sizeof(struct cpl_rx_phys_dsgl) + dst_size,
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reqctx->verify);
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reqctx->skb = skb;
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skb_get(skb);
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return skb;
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@ -185,11 +185,11 @@
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FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_V(1) | \
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FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_V((ctx_len)))
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#define FILL_WR_RX_Q_ID(cid, qid, wr_iv, fid) \
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#define FILL_WR_RX_Q_ID(cid, qid, wr_iv, lcb, fid) \
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htonl( \
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FW_CRYPTO_LOOKASIDE_WR_RX_CHID_V((cid)) | \
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FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_V((qid)) | \
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FW_CRYPTO_LOOKASIDE_WR_LCB_V(0) | \
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FW_CRYPTO_LOOKASIDE_WR_LCB_V((lcb)) | \
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FW_CRYPTO_LOOKASIDE_WR_IV_V((wr_iv)) | \
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FW_CRYPTO_LOOKASIDE_WR_FQIDX_V(fid))
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