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RISC-V: Cleanups for 4.16-rc3

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This pull request contains a handful of small cleanups.  The only
 functional change is that IRQs are now enabled during exception
 handling, which was found when some warnings triggered with
 `CONFIG_DEBUG_ATOMIC_SLEEP=y`.  The remaining fixes should have no
 functional change: `sbi_save()` has been renamed to `parse_dtb()`
 reflect what it actually does, and a handful of unused Kconfig entries
 have been removed.
 
 This is based on rc1 as a break to my usual flow, as it appears I missed
 rc2 over the holiday.  I've merged master as of Wednesday morning,
 af3e79d295 ("Merge tag 'leds_for-4.16-rc3' of
 git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds")
 without any conflicts and I've given it a simple build test.  If this
 isn't OK then feel free to drop the patch set and I'll send another
 against rc3 for rc4.
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Merge tag 'riscv-for-linus-4.16-rc3-riscv_cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V cleanups from Palmer Dabbelt:
 "This contains a handful of small cleanups.

  The only functional change is that IRQs are now enabled during
  exception handling, which was found when some warnings triggered with
  `CONFIG_DEBUG_ATOMIC_SLEEP=y`.

  The remaining fixes should have no functional change: `sbi_save()` has
  been renamed to `parse_dtb()` reflect what it actually does, and a
  handful of unused Kconfig entries have been removed"

* tag 'riscv-for-linus-4.16-rc3-riscv_cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
  Rename sbi_save to parse_dtb to improve code readability
  RISC-V: Enable IRQ during exception handling
  riscv: Remove ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select
  riscv: kconfig: Remove RISCV_IRQ_INTC select
  riscv: Remove ARCH_WANT_OPTIONAL_GPIOLIB select
This commit is contained in:
Linus Torvalds 2018-02-22 11:53:17 -08:00
commit 24180a6008
4 changed files with 5 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/riscv/Kconfig
View File

@ -8,7 +8,6 @@ config RISCV
select OF
select OF_EARLY_FLATTREE
select OF_IRQ
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select ARCH_WANT_FRAME_POINTERS
select CLONE_BACKWARDS
select COMMON_CLK
@ -20,7 +19,6 @@ config RISCV
select GENERIC_STRNLEN_USER
select GENERIC_SMP_IDLE_THREAD
select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
select HAVE_DMA_API_DEBUG
@ -34,7 +32,6 @@ config RISCV
select HAVE_ARCH_TRACEHOOK
select MODULES_USE_ELF_RELA if MODULES
select THREAD_INFO_IN_TASK
select RISCV_IRQ_INTC
select RISCV_TIMER
config MMU

5
arch/riscv/kernel/entry.S
View File

@ -172,6 +172,9 @@ ENTRY(handle_exception)
move a1, sp /* pt_regs */
tail do_IRQ
1:
/* Exceptions run with interrupts enabled */
csrs sstatus, SR_SIE
/* Handle syscalls */
li t0, EXC_SYSCALL
beq s4, t0, handle_syscall
@ -198,8 +201,6 @@ handle_syscall:
*/
addi s2, s2, 0x4
REG_S s2, PT_SEPC(sp)
/* System calls run with interrupts enabled */
csrs sstatus, SR_SIE
/* Trace syscalls, but only if requested by the user. */
REG_L t0, TASK_TI_FLAGS(tp)
andi t0, t0, _TIF_SYSCALL_TRACE

2
arch/riscv/kernel/head.S
View File

@ -64,7 +64,7 @@ ENTRY(_start)
/* Start the kernel */
mv a0, s0
mv a1, s1
call sbi_save
call parse_dtb
tail start_kernel
relocate:

2
arch/riscv/kernel/setup.c
View File

@ -144,7 +144,7 @@ asmlinkage void __init setup_vm(void)
#endif
}
void __init sbi_save(unsigned int hartid, void *dtb)
void __init parse_dtb(unsigned int hartid, void *dtb)
{
early_init_dt_scan(__va(dtb));
}