forked from Minki/linux
Merge tag 'drm-intel-fixes-2015-07-31' of git://anongit.freedesktop.org/drm-intel
Pull drm intel fixes from Daniel Vetter: "I delayed my -fixes pull a bit hoping that I could include a fix for the dp mst stuff but looks a bit more nasty than that. So just 3 other regression fixes, one 4.2 other two cc: stable" * tag 'drm-intel-fixes-2015-07-31' of git://anongit.freedesktop.org/drm-intel: drm/i915: Declare the swizzling unknown for L-shaped configurations drm/i915: Mark PIN_USER binding as GLOBAL_BIND without the aliasing ppgtt drm/i915: Replace WARN inside I915_READ64_2x32 with retry loop
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commit
23ff9e19fe
@ -3303,15 +3303,14 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
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#define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
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#define I915_READ64_2x32(lower_reg, upper_reg) ({ \
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u32 upper = I915_READ(upper_reg); \
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u32 lower = I915_READ(lower_reg); \
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u32 tmp = I915_READ(upper_reg); \
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if (upper != tmp) { \
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upper = tmp; \
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lower = I915_READ(lower_reg); \
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WARN_ON(I915_READ(upper_reg) != upper); \
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} \
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(u64)upper << 32 | lower; })
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u32 upper, lower, tmp; \
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tmp = I915_READ(upper_reg); \
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do { \
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upper = tmp; \
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lower = I915_READ(lower_reg); \
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tmp = I915_READ(upper_reg); \
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} while (upper != tmp); \
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(u64)upper << 32 | lower; })
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#define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)
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#define POSTING_READ16(reg) (void)I915_READ16_NOTRACE(reg)
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@ -1923,6 +1923,17 @@ static int ggtt_bind_vma(struct i915_vma *vma,
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vma->vm->insert_entries(vma->vm, pages,
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vma->node.start,
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cache_level, pte_flags);
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/* Note the inconsistency here is due to absence of the
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* aliasing ppgtt on gen4 and earlier. Though we always
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* request PIN_USER for execbuffer (translated to LOCAL_BIND),
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* without the appgtt, we cannot honour that request and so
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* must substitute it with a global binding. Since we do this
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* behind the upper layers back, we need to explicitly set
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* the bound flag ourselves.
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*/
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vma->bound |= GLOBAL_BIND;
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}
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if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) {
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@ -464,7 +464,10 @@ i915_gem_get_tiling(struct drm_device *dev, void *data,
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}
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/* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
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args->phys_swizzle_mode = args->swizzle_mode;
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if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)
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args->phys_swizzle_mode = I915_BIT_6_SWIZZLE_UNKNOWN;
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else
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args->phys_swizzle_mode = args->swizzle_mode;
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if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
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args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
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if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)
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