mwl8k: mwl8k_txq_xmit() rework
Various mwl8k_txq_xmit changes: - Extract the QoS field before adding the DMA header. - Only write to tx->status once, and only after all the other descriptor fields have been set. - Do all tx state manipulation under the tx spinlock. - Remove the priv->inconfig check, as all transmit queues will be frozen during config cycles, so we won't ever be asked to transmit if a config cycle is running. - Remove some more dead code. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Lennert Buytenhek
John W. Linville
parent
7595d67a06
commit
23b339062f
@ -1257,46 +1257,60 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
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{
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struct mwl8k_priv *priv = hw->priv;
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struct ieee80211_tx_info *tx_info;
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struct mwl8k_vif *mwl8k_vif;
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struct ieee80211_hdr *wh;
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struct mwl8k_tx_queue *txq;
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struct mwl8k_tx_desc *tx;
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struct mwl8k_dma_data *tr;
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struct mwl8k_vif *mwl8k_vif;
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dma_addr_t dma;
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u16 qos = 0;
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bool qosframe = false, ampduframe = false;
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bool mcframe = false, eapolframe = false;
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bool amsduframe = false;
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__le16 fc;
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u32 txstatus;
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u8 txdatarate;
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u16 qos;
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txq = priv->txq + index;
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tx = txq->tx_desc_area + txq->tx_tail;
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wh = (struct ieee80211_hdr *)skb->data;
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if (ieee80211_is_data_qos(wh->frame_control))
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qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
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else
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qos = 0;
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BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
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/*
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* Append HW DMA header to start of packet.
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*/
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mwl8k_add_dma_header(skb);
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wh = &((struct mwl8k_dma_data *)skb->data)->wh;
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tx_info = IEEE80211_SKB_CB(skb);
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mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
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tr = (struct mwl8k_dma_data *)skb->data;
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wh = &tr->wh;
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fc = wh->frame_control;
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qosframe = ieee80211_is_data_qos(fc);
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mcframe = is_multicast_ether_addr(wh->addr1);
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ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
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if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
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u16 seqno = mwl8k_vif->seqno;
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wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
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wh->seq_ctrl |= cpu_to_le16(seqno << 4);
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mwl8k_vif->seqno = seqno++ % 4096;
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}
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if (qosframe)
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qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
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/* Setup firmware control bit fields for each frame type. */
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txstatus = 0;
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txdatarate = 0;
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if (ieee80211_is_mgmt(wh->frame_control) ||
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ieee80211_is_ctl(wh->frame_control)) {
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txdatarate = 0;
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qos = mwl8k_qos_setbit_eosp(qos);
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/* Set Queue size to unspecified */
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qos = mwl8k_qos_setbit_qlen(qos, 0xff);
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} else if (ieee80211_is_data(wh->frame_control)) {
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txdatarate = 1;
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if (is_multicast_ether_addr(wh->addr1))
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txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
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/* Send pkt in an aggregate if AMPDU frame. */
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if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
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qos = mwl8k_qos_setbit_ack(qos,
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MWL8K_TXD_ACK_POLICY_BLOCKACK);
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else
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qos = mwl8k_qos_setbit_ack(qos,
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MWL8K_TXD_ACK_POLICY_NORMAL);
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if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
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qos = mwl8k_qos_setbit_amsdu(qos);
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}
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dma = pci_map_single(priv->pdev, skb->data,
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skb->len, PCI_DMA_TODEVICE);
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@ -1304,95 +1318,40 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
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if (pci_dma_mapping_error(priv->pdev, dma)) {
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printk(KERN_DEBUG "%s: failed to dma map skb, "
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"dropping TX frame.\n", priv->name);
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if (skb != NULL)
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dev_kfree_skb(skb);
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dev_kfree_skb(skb);
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return NETDEV_TX_OK;
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}
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/* Set desc header, cpu bit order. */
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tx->status = 0;
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tx->data_rate = 0;
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tx->tx_priority = index;
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tx->qos_control = 0;
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tx->rate_info = 0;
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tx->peer_id = mwl8k_vif->peer_id;
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amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
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/* Setup firmware control bit fields for each frame type. */
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if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
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tx->data_rate = 0;
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qos = mwl8k_qos_setbit_eosp(qos);
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/* Set Queue size to unspecified */
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qos = mwl8k_qos_setbit_qlen(qos, 0xff);
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} else if (ieee80211_is_data(fc)) {
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tx->data_rate = 1;
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if (mcframe)
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tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
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/*
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* Tell firmware to not send EAPOL pkts in an
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* aggregate. Verify against mac80211 tx path. If
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* stack turns off AMPDU for an EAPOL frame this
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* check will be removed.
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*/
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if (eapolframe) {
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qos = mwl8k_qos_setbit_ack(qos,
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MWL8K_TXD_ACK_POLICY_NORMAL);
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} else {
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/* Send pkt in an aggregate if AMPDU frame. */
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if (ampduframe)
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qos = mwl8k_qos_setbit_ack(qos,
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MWL8K_TXD_ACK_POLICY_BLOCKACK);
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else
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qos = mwl8k_qos_setbit_ack(qos,
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MWL8K_TXD_ACK_POLICY_NORMAL);
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if (amsduframe)
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qos = mwl8k_qos_setbit_amsdu(qos);
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}
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}
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/* Convert to little endian */
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tx->qos_control = cpu_to_le16(qos);
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tx->status = cpu_to_le32(tx->status);
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tx->pkt_phys_addr = cpu_to_le32(dma);
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tx->pkt_len = cpu_to_le16(skb->len);
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txq->tx_skb[txq->tx_tail] = skb;
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spin_lock_bh(&priv->tx_lock);
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tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
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MWL8K_TXD_STATUS_FW_OWNED);
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txq = priv->txq + index;
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BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
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txq->tx_skb[txq->tx_tail] = skb;
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tx = txq->tx_desc_area + txq->tx_tail;
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tx->data_rate = txdatarate;
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tx->tx_priority = index;
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tx->qos_control = cpu_to_le16(qos);
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tx->pkt_phys_addr = cpu_to_le32(dma);
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tx->pkt_len = cpu_to_le16(skb->len);
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tx->rate_info = 0;
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tx->peer_id = mwl8k_vif->peer_id;
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wmb();
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tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
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txq->tx_stats.count++;
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txq->tx_stats.len++;
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priv->pending_tx_pkts++;
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txq->tx_stats.count++;
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txq->tx_tail++;
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txq->tx_tail++;
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if (txq->tx_tail == MWL8K_TX_DESCS)
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txq->tx_tail = 0;
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if (txq->tx_head == txq->tx_tail)
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ieee80211_stop_queue(hw, index);
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if (priv->inconfig) {
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/*
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* Silently queue packet when we are in the middle of
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* a config cycle. Notify firmware only if we are
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* waiting for TXQs to empty. If a packet is sent
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* before .config() is complete, perhaps it is better
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* to drop the packet, as the channel is being changed
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* and the packet will end up on the wrong channel.
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*/
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printk(KERN_ERR "%s(): WARNING TX activity while "
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"in config\n", __func__);
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if (priv->tx_wait != NULL)
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mwl8k_tx_start(priv);
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} else
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mwl8k_tx_start(priv);
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mwl8k_tx_start(priv);
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spin_unlock_bh(&priv->tx_lock);
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