forked from Minki/linux
drm/i915/icl: NV12 y-plane ddb is not in same plane
We don't have planar pixel format support implemented for ICL yet. ICL require 2 display planes to be allocated for Planar formats unlike previous GEN. So ICL/GEN11 doesn't require to write Y-plane ddb data in NV12_BUF_CFG register and PLANE_NV12_BUF_CFG register is removed in ICL. This patch removes the PLANE_NV12_BUF_CFG write for ICL. Changes Since V1: - Improve commit message as per Paulo's comment Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: James Ausmus <james.ausmus@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-5-paulo.r.zanoni@intel.com
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@ -4826,7 +4826,9 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc,
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skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
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&ddb->plane[pipe][plane_id]);
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skl_ddb_entry_write(dev_priv, PLANE_NV12_BUF_CFG(pipe, plane_id),
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if (INTEL_GEN(dev_priv) < 11)
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skl_ddb_entry_write(dev_priv,
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PLANE_NV12_BUF_CFG(pipe, plane_id),
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&ddb->y_plane[pipe][plane_id]);
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}
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