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drm/i915/icl: NV12 y-plane ddb is not in same plane

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We don't have planar pixel format support implemented for ICL yet.
ICL require 2 display planes to be allocated for Planar formats unlike
previous GEN. So ICL/GEN11 doesn't require to write Y-plane ddb data in
NV12_BUF_CFG register and PLANE_NV12_BUF_CFG register is removed in ICL.

This patch removes the PLANE_NV12_BUF_CFG write for ICL.

Changes Since V1:
 - Improve commit message as per Paulo's comment

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-5-paulo.r.zanoni@intel.com
This commit is contained in:
Mahesh Kumar 2018-01-30 11:49:13 -02:00 committed by Paulo Zanoni
parent 5b695aff3a
commit 234059da0f
1 changed files with 4 additions and 2 deletions
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6
drivers/gpu/drm/i915/intel_pm.c
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@ -4826,8 +4826,10 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc,
skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id), skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
&ddb->plane[pipe][plane_id]); &ddb->plane[pipe][plane_id]);
skl_ddb_entry_write(dev_priv, PLANE_NV12_BUF_CFG(pipe, plane_id), if (INTEL_GEN(dev_priv) < 11)
&ddb->y_plane[pipe][plane_id]); skl_ddb_entry_write(dev_priv,
PLANE_NV12_BUF_CFG(pipe, plane_id),
&ddb->y_plane[pipe][plane_id]);
} }
static void skl_write_cursor_wm(struct intel_crtc *intel_crtc, static void skl_write_cursor_wm(struct intel_crtc *intel_crtc,