clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_DIV_CLK_SRC

This patch adds the missing video_cc_mvs0_div_clk_src entry to
videocc-sm8250 replicating in upstream the explicit entry for this clock in
downstream.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210204150120.1521959-3-bryan.odonoghue@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Bryan O'Donoghue 2021-02-04 15:01:18 +00:00 committed by Stephen Boyd
parent 9ba80d849c
commit 2334032f00

View File

@ -169,6 +169,21 @@ static struct clk_regmap_div video_cc_mvs0c_div2_div_clk_src = {
},
};
static struct clk_regmap_div video_cc_mvs0_div_clk_src = {
.reg = 0xd54,
.shift = 0,
.width = 2,
.clkr.hw.init = &(struct clk_init_data) {
.name = "video_cc_mvs0_div_clk_src",
.parent_data = &(const struct clk_parent_data){
.hw = &video_cc_mvs0_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_regmap_div_ro_ops,
},
};
static struct clk_regmap_div video_cc_mvs1c_div2_div_clk_src = {
.reg = 0xcf4,
.shift = 0,
@ -276,6 +291,7 @@ static struct gdsc mvs1_gdsc = {
static struct clk_regmap *video_cc_sm8250_clocks[] = {
[VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr,
[VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr,
[VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr,
[VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC] = &video_cc_mvs0c_div2_div_clk_src.clkr,
[VIDEO_CC_MVS1_CLK_SRC] = &video_cc_mvs1_clk_src.clkr,