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ARM: dts: imx: Add support for Advantech/GE Bx50v3

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Advantech has 3 carrier boards (B450v3, B650v3, B850v3) which use
the Advantech BA-16 module (based on iMX6D). This file has the
devicetree entries that are common to all 3 boards.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Justin Waters 2016-02-19 18:35:28 -05:00 committed by Shawn Guo
parent 56c27310c1
commit 226d16c80c
1 changed files with 225 additions and 0 deletions
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225
arch/arm/boot/dts/imx6q-bx50v3.dtsi Normal file
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/*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6q-ba16.dtsi"
/ {
clocks {
mclk: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <22000000>;
};
};
reg_wl18xx_vmmc: regulator-wl18xx {
compatible = "regulator-fixed";
regulator-name = "vwl1807";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <70000>;
enable-active-high;
};
reg_wlan: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "3P3V_wlan";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
};
sound {
compatible = "fsl,imx6q-ba16-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6q-ba16-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&ecspi5 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
compatible = "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;
pagesize = <64>;
reg = <0>;
address-width = <16>;
};
};
&i2c1 {
pca9547: mux@70 {
compatible = "nxp,pca9547";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
mux1_i2c1: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
ads7830: ads7830@48 {
compatible = "ti,ads7830";
reg = <0x48>;
};
mma8453: mma8453@1c {
compatible = "fsl,mma8453";
reg = <0x1c>;
};
};
mux1_i2c2: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
eeprom: eeprom@50 {
compatible = "atmel,24c08";
reg = <0x50>;
};
mpl3115: mpl3115@60 {
compatible = "fsl,mpl3115";
reg = <0x60>;
};
};
mux1_i2c3: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
mux1_i2c4: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&mclk>;
VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>;
};
};
mux1_i2c5: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
pca9539: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gpio2>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
};
};
mux1_i2c6: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
mux1_i2c7: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
mux1_i2c8: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <4>;
vmmc-supply = <&reg_wl18xx_vmmc>;
no-1-8-v;
non-removable;
wakeup-source;
keep-power-in-suspend;
cap-power-off-card;
max-frequency = <25000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio2>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
tcxo-clock-frequency = <26000000>;
};
};