ARM SoC non-cricitical bug fixes

These are various bug fixes that were not considered important enough
 for merging into 3.10. The majority of the ARM fixes are for the OMAP
 and at91 platforms, and there is another set of bug fixes for device
 drivers that resolve 'randconfig' build errors and that the subsystem
 maintainers either did not pick up or preferred to get merged through
 the arm-soc tree.
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Merge tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-cricitical bug fixes from Arnd Bergmann:
 "These are various bug fixes that were not considered important enough
  for merging into 3.10.

  The majority of the ARM fixes are for the OMAP and at91 platforms, and
  there is another set of bug fixes for device drivers that resolve
  'randconfig' build errors and that the subsystem maintainers either
  did not pick up or preferred to get merged through the arm-soc tree."

* tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
  ARM: at91/PMC: use at91_usb_rate() for UTMI PLL
  ARM: at91/PMC: fix at91sam9n12 USB FS init
  ARM: at91/PMC: at91sam9n12 family has a PLLB
  ARM: at91/PMC: sama5d3 family doesn't have a PLLB
  ARM: tegra: fix section mismatch in tegra_pmc_parse_dt
  ARM: mxs: don't select HAVE_PWM
  ARM: mxs: stub out mxs_pm_init for !CONFIG_PM
  cpuidle: calxeda: select ARM_CPU_SUSPEND
  ARM: mvebu: fix length of ethernet registers in mv78260 dtsi
  ARM: at91: cpuidle: Fix target_residency
  ARM: at91: fix at91_extern_irq usage for non-dt boards
  ARM: sirf: use CONFIG_SIRF rather than CONFIG_PRIMA2 where necessary
  clocksource: kona: adapt to CLOCKSOURCE_OF_DECLARE change
  X.509: do not emit any informational output
  mtd: omap2: allow bulding as a module
  [SCSI] nsp32: use mdelay instead of large udelay constants
  hwrng: bcm2835: fix MODULE_LICENSE tag
  ARM: at91: Change the internal SRAM memory type MT_MEMORY_NONCACHED
  ARM: at91: Fix link breakage when !CONFIG_PHYLIB
  MAINTAINERS: Add exynos filename match to ARM/S5P EXYNOS ARM ARCHITECTURES
  ...
This commit is contained in:
Linus Torvalds 2013-07-02 13:24:47 -07:00
commit 22237d5a58
57 changed files with 170 additions and 145 deletions

View File

@ -797,6 +797,7 @@ F: arch/arm/mach-gemini/
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
M: Barry Song <baohua.song@csr.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
S: Maintained
F: arch/arm/mach-prima2/
F: drivers/dma/sirf-dma.c
@ -1135,6 +1136,7 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-s5p*/
F: arch/arm/mach-exynos*/
N: exynos
ARM/SAMSUNG MOBILE MACHINE SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>

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@ -168,7 +168,7 @@ machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PRIMA2) += prima2
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_RPC) += rpc

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@ -80,7 +80,7 @@
sata@a0000 {
compatible = "marvell,orion-sata";
reg = <0xa0000 0x2400>;
reg = <0xa0000 0x5000>;
interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1";
@ -96,7 +96,7 @@
ethernet@70000 {
compatible = "marvell,armada-370-neta";
reg = <0x70000 0x2500>;
reg = <0x70000 0x4000>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
@ -104,7 +104,7 @@
ethernet@74000 {
compatible = "marvell,armada-370-neta";
reg = <0x74000 0x2500>;
reg = <0x74000 0x4000>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";

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@ -92,7 +92,7 @@
ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
reg = <0x34000 0x4000>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";

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@ -107,7 +107,7 @@
ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
reg = <0x34000 0x4000>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";

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@ -88,7 +88,7 @@
ethernet@30000 {
compatible = "marvell,armada-370-neta";
reg = <0x30000 0x2500>;
reg = <0x30000 0x4000>;
interrupts = <12>;
clocks = <&gateclk 2>;
status = "disabled";

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@ -15,7 +15,7 @@
< 0x02081000 0x1000 >;
};
timer@2000004 {
timer@2000000 {
compatible = "qcom,scss-timer", "qcom,msm-timer";
interrupts = <1 0 0x301>,
<1 1 0x301>,
@ -26,7 +26,7 @@
cpu-offset = <0x40000>;
};
serial@19c400000 {
serial@19c40000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,
<0x19c00000 0x1000>;

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@ -26,7 +26,7 @@
cpu-offset = <0x80000>;
};
serial@19c400000 {
serial@16440000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x16440000 0x1000>,
<0x16400000 0x1000>;

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@ -163,6 +163,7 @@ config MACH_SAMA5_DT
bool "Atmel SAMA5 Evaluation Kits with device-tree support"
depends on SOC_SAMA5
select USE_OF
select PHYLIB if NETDEVICES
help
Select this if you want to experiment device-tree with
an Atmel Evaluation Kit.

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@ -332,10 +332,6 @@ static void __init at91rm9200_initialize(void)
{
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6);
/* Initialize GPIO subsystem */
at91_gpio_init(at91rm9200_gpio,
@ -388,6 +384,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91rm9200)
.map_io = at91rm9200_map_io,
.default_irq_priority = at91rm9200_default_irq_priority,
.extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6),
.ioremap_registers = at91rm9200_ioremap_registers,
.register_clocks = at91rm9200_register_clocks,
.init = at91rm9200_initialize,

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@ -348,8 +348,6 @@ static void __init at91sam9260_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9260_gpio, 3);
@ -400,6 +398,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9260)
.map_io = at91sam9260_map_io,
.default_irq_priority = at91sam9260_default_irq_priority,
.extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2),
.ioremap_registers = at91sam9260_ioremap_registers,
.register_clocks = at91sam9260_register_clocks,
.init = at91sam9260_initialize,

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@ -290,8 +290,6 @@ static void __init at91sam9261_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9261_gpio, 3);
@ -342,6 +340,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9261)
.map_io = at91sam9261_map_io,
.default_irq_priority = at91sam9261_default_irq_priority,
.extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2),
.ioremap_registers = at91sam9261_ioremap_registers,
.register_clocks = at91sam9261_register_clocks,
.init = at91sam9261_initialize,

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@ -327,7 +327,6 @@ static void __init at91sam9263_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9263_gpio, 5);
@ -378,6 +377,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9263)
.map_io = at91sam9263_map_io,
.default_irq_priority = at91sam9263_default_irq_priority,
.extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
.ioremap_registers = at91sam9263_ioremap_registers,
.register_clocks = at91sam9263_register_clocks,
.init = at91sam9263_initialize,

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@ -374,7 +374,6 @@ static void __init at91sam9g45_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9g45_gpio, 5);
@ -425,6 +424,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9g45)
.map_io = at91sam9g45_map_io,
.default_irq_priority = at91sam9g45_default_irq_priority,
.extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
.ioremap_registers = at91sam9g45_ioremap_registers,
.register_clocks = at91sam9g45_register_clocks,
.init = at91sam9g45_initialize,

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@ -293,7 +293,6 @@ static void __init at91sam9rl_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9rl_gpio, 4);
@ -344,6 +343,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9rl)
.map_io = at91sam9rl_map_io,
.default_irq_priority = at91sam9rl_default_irq_priority,
.extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
.ioremap_registers = at91sam9rl_ioremap_registers,
.register_clocks = at91sam9rl_register_clocks,
.init = at91sam9rl_initialize,

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@ -55,8 +55,6 @@ static void at91x40_idle(void)
void __init at91x40_initialize(unsigned long main_clock)
{
arm_pm_idle = at91x40_idle;
at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2);
}
/*
@ -86,9 +84,10 @@ static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = {
void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
u32 extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2);
if (!priority)
priority = at91x40_default_irq_priority;
at91_aic_init(priority, at91_extern_irq);
at91_aic_init(priority, extern_irq);
}

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@ -62,7 +62,8 @@ static int ksz9021rn_phy_fixup(struct phy_device *phy)
static void __init sama5_dt_device_init(void)
{
if (of_machine_is_compatible("atmel,sama5d3xcm"))
if (of_machine_is_compatible("atmel,sama5d3xcm") &&
IS_ENABLED(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);

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@ -75,7 +75,7 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|| cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
|| cpu_is_at91sam9n12()))
|| cpu_is_sama5d3()))
#define cpu_has_upll() (cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
@ -489,7 +489,7 @@ static int at91_clk_show(struct seq_file *s, void *unused)
seq_printf(s, "UCKR = %8x\n", uckr);
}
seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
if (cpu_has_upll())
if (cpu_has_upll() || cpu_is_at91sam9n12())
seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB));
seq_printf(s, "SR = %8x\n", sr);
@ -614,6 +614,8 @@ static u32 __init at91_usb_rate(struct clk *pll, u32 freq, u32 reg)
{
if (pll == &pllb && (reg & AT91_PMC_USB96M))
return freq / 2;
else if (pll == &utmi_clk || cpu_is_at91sam9n12())
return freq / (1 + ((reg & AT91_PMC_OHCIUSBDIV) >> 8));
else
return freq;
}
@ -683,6 +685,8 @@ static struct clk *const standard_pmc_clocks[] __initconst = {
/* PLLB generated USB full speed clock init */
static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
{
unsigned int reg;
/*
* USB clock init: choose 48 MHz PLLB value,
* disable 48MHz clock during usb peripheral suspend.
@ -691,22 +695,35 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
*/
uhpck.parent = &pllb;
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
reg = at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2);
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
if (cpu_is_at91rm9200()) {
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
uhpck.pmc_mask = AT91RM9200_PMC_UHP;
udpck.pmc_mask = AT91RM9200_PMC_UDP;
at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
cpu_is_at91sam9g10()) {
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
} else if (cpu_is_at91sam9n12()) {
/* Divider for USB clock is in USB clock register for 9n12 */
reg = AT91_PMC_USBS_PLLB;
/* For PLLB output 96M, set usb divider 2 (USBDIV + 1) */
reg |= AT91_PMC_OHCIUSBDIV_2;
at91_pmc_write(AT91_PMC_USB, reg);
/* Still setup masks */
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
}
at91_pmc_write(AT91_CKGR_PLLBR, 0);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
}
/* UPLL generated USB full speed clock init */
@ -725,8 +742,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
/* Now set uhpck values */
uhpck.parent = &utmi_clk;
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
uhpck.rate_hz = utmi_clk.rate_hz;
uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
uhpck.rate_hz = at91_usb_rate(&utmi_clk, utmi_clk.rate_hz, usbr);
}
static int __init at91_pmc_init(unsigned long main_clock)

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@ -51,7 +51,7 @@ static struct cpuidle_driver at91_idle_driver = {
.states[1] = {
.enter = at91_enter_idle,
.exit_latency = 10,
.target_residency = 100000,
.target_residency = 10000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "RAM_SR",
.desc = "WFI and DDR Self Refresh",

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@ -85,4 +85,4 @@ extern void __init at91_gpio_irq_setup(void);
extern int __init at91_gpio_of_irq_setup(struct device_node *node,
struct device_node *parent);
extern int at91_extern_irq;
extern u32 at91_get_extern_irq(void);

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@ -130,7 +130,10 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
#define AT91_PMC_USBS_PLLA (0 << 0)
#define AT91_PMC_USBS_UPLL (1 << 0)
#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */
#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8)
#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8)
#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */

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@ -232,7 +232,14 @@ static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
at91_aic_write(AT91_AIC5_EOICR, 0);
}
unsigned long *at91_extern_irq;
static unsigned long *at91_extern_irq;
u32 at91_get_extern_irq(void)
{
if (!at91_extern_irq)
return 0;
return *at91_extern_irq;
}
#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq)

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@ -212,7 +212,7 @@ static int at91_pm_enter(suspend_state_t state)
(at91_pmc_read(AT91_PMC_PCSR)
| (1 << AT91_ID_FIQ)
| (1 << AT91_ID_SYS)
| (at91_extern_irq))
| (at91_get_extern_irq()))
& at91_aic_read(AT91_AIC_IMR),
state);

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@ -48,7 +48,7 @@ void __init at91_init_irq_default(void)
void __init at91_init_interrupts(unsigned int *priority)
{
/* Initialize the AIC interrupt controller */
at91_aic_init(priority, at91_extern_irq);
at91_aic_init(priority, at91_boot_soc.extern_irq);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
@ -80,7 +80,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
desc->pfn = __phys_to_pfn(base);
desc->length = length;
desc->type = MT_DEVICE;
desc->type = MT_MEMORY_NONCACHED;
pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n",
base, length, desc->virtual);

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@ -6,6 +6,7 @@
struct at91_init_soc {
int builtin;
u32 extern_irq;
unsigned int *default_irq_priority;
void (*map_io)(void);
void (*ioremap_registers)(void);

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@ -151,7 +151,6 @@ static __init void davinci_sffsdr_init(void)
}
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
.init_irq = davinci_irq_init,

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@ -104,7 +104,7 @@ int __init clock_debug_add(struct clk *clock)
if (!debugfs_base)
return -ENOMEM;
strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
strlcpy(temp, clock->dbg_name, ARRAY_SIZE(temp));
for (ptr = temp; *ptr; ptr++)
*ptr = tolower(*ptr);

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@ -3,7 +3,6 @@ config SOC_IMX23
select ARM_AMBA
select ARM_CPU_SUSPEND if PM
select CPU_ARM926T
select HAVE_PWM
select PINCTRL_IMX23
config SOC_IMX28
@ -12,7 +11,6 @@ config SOC_IMX28
select ARM_CPU_SUSPEND if PM
select CPU_ARM926T
select HAVE_CAN_FLEXCAN if CAN
select HAVE_PWM
select PINCTRL_IMX28
config ARCH_MXS

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@ -9,6 +9,10 @@
#ifndef __ARCH_MXS_PM_H
#define __ARCH_MXS_PM_H
#ifdef CONFIG_PM
void mxs_pm_init(void);
#else
#define mxs_pm_init NULL
#endif
#endif

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@ -293,7 +293,8 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
REGULATOR_SUPPLY("vcc", "spi1.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
};
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */

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@ -222,6 +222,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
};

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@ -272,7 +272,8 @@ static struct regulator_init_data ldp_vaux1 = {
static struct regulator_consumer_supply ldp_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
};
static struct regulator_init_data ldp_vpll2 = {

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@ -343,6 +343,7 @@ static struct regulator_consumer_supply pandora_vmmc3_supply[] = {
static struct regulator_consumer_supply pandora_vdds_supplies[] = {
REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
};

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@ -553,6 +553,7 @@ static struct regulator_consumer_supply rx51_vio_supplies[] = {
static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
/* Si4713 supply */
REGULATOR_SUPPLY("vdd", "2-0063"),
/* lis3lv02d */

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@ -249,6 +249,7 @@ void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
soc_is_omap54xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
0;
if (!offset) {

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@ -374,10 +374,8 @@ static void __init omap_init_mcpdm(void)
struct platform_device *pdev;
oh = omap_hwmod_lookup("mcpdm");
if (!oh) {
printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
if (!oh)
return;
}
pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0);
WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
@ -395,10 +393,8 @@ static void __init omap_init_dmic(void)
struct platform_device *pdev;
oh = omap_hwmod_lookup("dmic");
if (!oh) {
pr_err("Could not look up dmic hw_mod\n");
if (!oh)
return;
}
pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0);
WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
@ -421,10 +417,8 @@ static void __init omap_init_hdmi_audio(void)
struct platform_device *pdev;
oh = omap_hwmod_lookup("dss_hdmi");
if (!oh) {
printk(KERN_ERR "Could not look up dss_hdmi hw_mod\n");
if (!oh)
return;
}
pdev = omap_device_build("omap-hdmi-audio-dai", -1, oh, NULL, 0);
WARN(IS_ERR(pdev),

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@ -601,7 +601,7 @@ void __init omap2_set_globals_tap(u32 class, void __iomem *tap)
#ifdef CONFIG_SOC_BUS
static const char const *omap_types[] = {
static const char * const omap_types[] = {
[OMAP2_DEVICE_TYPE_TEST] = "TST",
[OMAP2_DEVICE_TYPE_EMU] = "EMU",
[OMAP2_DEVICE_TYPE_SEC] = "HS",

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@ -176,6 +176,9 @@ static char *cmdline_find_option(char *str)
static int __init omap_serial_early_init(void)
{
if (of_have_populated_dt())
return -ENODEV;
do {
char oh_name[MAX_UART_HWMOD_NAME_LEN];
struct omap_hwmod *oh;

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@ -140,6 +140,7 @@ static struct regulator_init_data omap3_vdac_idata = {
static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
};

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@ -28,6 +28,7 @@
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/usb/phy.h>
#include <linux/usb/nop-usb-xceiv.h>
#include "soc.h"
#include "omap_device.h"
@ -560,7 +561,8 @@ static int usbhs_add_regulator(char *name, char *dev_id, char *dev_supply,
struct regulator_init_data *reg_data;
struct fixed_voltage_config *config;
struct platform_device *pdev;
int ret;
struct platform_device_info pdevinfo;
int ret = -ENOMEM;
supplies = kzalloc(sizeof(*supplies), GFP_KERNEL);
if (!supplies)
@ -571,7 +573,7 @@ static int usbhs_add_regulator(char *name, char *dev_id, char *dev_supply,
reg_data = kzalloc(sizeof(*reg_data), GFP_KERNEL);
if (!reg_data)
return -ENOMEM;
goto err_data;
reg_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
reg_data->consumer_supplies = supplies;
@ -580,39 +582,53 @@ static int usbhs_add_regulator(char *name, char *dev_id, char *dev_supply,
config = kmemdup(&hsusb_reg_config, sizeof(hsusb_reg_config),
GFP_KERNEL);
if (!config)
return -ENOMEM;
goto err_config;
config->supply_name = kstrdup(name, GFP_KERNEL);
if (!config->supply_name)
goto err_supplyname;
config->supply_name = name;
config->gpio = gpio;
config->enable_high = polarity;
config->init_data = reg_data;
/* create a regulator device */
pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
if (!pdev)
return -ENOMEM;
memset(&pdevinfo, 0, sizeof(pdevinfo));
pdevinfo.name = reg_name;
pdevinfo.id = PLATFORM_DEVID_AUTO;
pdevinfo.data = config;
pdevinfo.size_data = sizeof(*config);
pdev->id = PLATFORM_DEVID_AUTO;
pdev->name = reg_name;
pdev->dev.platform_data = config;
pdev = platform_device_register_full(&pdevinfo);
if (IS_ERR(pdev)) {
ret = PTR_ERR(pdev);
pr_err("%s: Failed registering regulator %s for %s : %d\n",
__func__, name, dev_id, ret);
goto err_register;
}
ret = platform_device_register(pdev);
if (ret)
pr_err("%s: Failed registering regulator %s for %s\n",
__func__, name, dev_id);
return 0;
err_register:
kfree(config->supply_name);
err_supplyname:
kfree(config);
err_config:
kfree(reg_data);
err_data:
kfree(supplies);
return ret;
}
#define MAX_STR 20
int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys)
{
char *rail_name;
int i, len;
char rail_name[MAX_STR];
int i;
struct platform_device *pdev;
char *phy_id;
/* the phy_id will be something like "nop_usb_xceiv.1" */
len = strlen(nop_name) + 3; /* 3 -> ".1" and NULL terminator */
struct platform_device_info pdevinfo;
for (i = 0; i < num_phys; i++) {
@ -627,25 +643,26 @@ int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys)
!gpio_is_valid(phy->vcc_gpio))
continue;
phy_id = kmalloc(MAX_STR, GFP_KERNEL);
if (!phy_id) {
pr_err("%s: kmalloc() failed\n", __func__);
return -ENOMEM;
}
/* create a NOP PHY device */
pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
if (!pdev)
return -ENOMEM;
memset(&pdevinfo, 0, sizeof(pdevinfo));
pdevinfo.name = nop_name;
pdevinfo.id = phy->port;
pdevinfo.data = phy->platform_data;
pdevinfo.size_data = sizeof(struct nop_usb_xceiv_platform_data);
pdev->id = phy->port;
pdev->name = nop_name;
pdev->dev.platform_data = phy->platform_data;
phy_id = kmalloc(len, GFP_KERNEL);
if (!phy_id)
return -ENOMEM;
scnprintf(phy_id, len, "nop_usb_xceiv.%d\n",
pdev->id);
if (platform_device_register(pdev)) {
pr_err("%s: Failed to register device %s\n",
__func__, phy_id);
scnprintf(phy_id, MAX_STR, "nop_usb_xceiv.%d",
phy->port);
pdev = platform_device_register_full(&pdevinfo);
if (IS_ERR(pdev)) {
pr_err("%s: Failed to register device %s : %ld\n",
__func__, phy_id, PTR_ERR(pdev));
kfree(phy_id);
continue;
}
@ -653,26 +670,15 @@ int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys)
/* Do we need RESET regulator ? */
if (gpio_is_valid(phy->reset_gpio)) {
rail_name = kmalloc(13, GFP_KERNEL);
if (!rail_name)
return -ENOMEM;
scnprintf(rail_name, 13, "hsusb%d_reset", phy->port);
scnprintf(rail_name, MAX_STR,
"hsusb%d_reset", phy->port);
usbhs_add_regulator(rail_name, phy_id, "reset",
phy->reset_gpio, 1);
}
/* Do we need VCC regulator ? */
if (gpio_is_valid(phy->vcc_gpio)) {
rail_name = kmalloc(13, GFP_KERNEL);
if (!rail_name)
return -ENOMEM;
scnprintf(rail_name, 13, "hsusb%d_vcc", phy->port);
scnprintf(rail_name, MAX_STR, "hsusb%d_vcc", phy->port);
usbhs_add_regulator(rail_name, phy_id, "vcc",
phy->vcc_gpio, phy->vcc_polarity);
}

View File

@ -17,16 +17,6 @@
#include <linux/of_platform.h>
#include "common.h"
static struct of_device_id sirfsoc_of_bus_ids[] __initdata = {
{ .compatible = "simple-bus", },
{},
};
void __init sirfsoc_mach_init(void)
{
of_platform_bus_probe(NULL, sirfsoc_of_bus_ids, NULL);
}
void __init sirfsoc_init_late(void)
{
sirfsoc_pm_init();
@ -57,7 +47,6 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
.map_io = sirfsoc_map_io,
.init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
.restart = sirfsoc_restart,
@ -66,8 +55,8 @@ MACHINE_END
#ifdef CONFIG_ARCH_PRIMA2
static const char *prima2_dt_match[] __initdata = {
"sirf,prima2",
NULL
"sirf,prima2",
NULL
};
DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
@ -77,7 +66,6 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
.init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.dma_zone_size = SZ_256M,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
.dt_compat = prima2_dt_match,
.restart = sirfsoc_restart,
@ -96,7 +84,6 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
.map_io = sirfsoc_map_io,
.init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
.restart = sirfsoc_restart,

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@ -9,7 +9,7 @@
#include <linux/kernel.h>
#include <linux/suspend.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/export.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>

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@ -234,7 +234,7 @@ static const struct of_device_id matches[] __initconst = {
{ }
};
static void tegra_pmc_parse_dt(void)
static void __init tegra_pmc_parse_dt(void)
{
struct device_node *np;
u32 prop;

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@ -110,4 +110,4 @@ module_platform_driver(bcm2835_rng_driver);
MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver");
MODULE_LICENSE("GPLv2");
MODULE_LICENSE("GPL v2");

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@ -18,7 +18,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-$(CONFIG_ARCH_U300) += clk-u300.o
obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
obj-$(CONFIG_ARCH_SIRF) += clk-prima2.o
obj-$(CONFIG_PLAT_ORION) += mvebu/
ifeq ($(CONFIG_COMMON_CLK), y)
obj-$(CONFIG_ARCH_MMP) += mmp/

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@ -103,16 +103,10 @@ static const struct of_device_id bcm_timer_ids[] __initconst = {
{},
};
static void __init kona_timers_init(void)
static void __init kona_timers_init(struct device_node *node)
{
struct device_node *node;
u32 freq;
node = of_find_matching_node(NULL, bcm_timer_ids);
if (!node)
panic("No timer");
if (!of_property_read_u32(node, "clock-frequency", &freq))
arch_timer_rate = freq;
else
@ -199,13 +193,12 @@ static struct irqaction kona_timer_irq = {
.handler = kona_timer_interrupt,
};
static void __init kona_timer_init(void)
static void __init kona_timer_init(struct device_node *node)
{
kona_timers_init();
kona_timers_init(node);
kona_timer_clockevents_init();
setup_irq(timers.tmr_irq, &kona_timer_irq);
kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
}
CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer",
kona_timer_init);
CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);

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@ -36,6 +36,7 @@ if CPU_IDLE
config CPU_IDLE_CALXEDA
bool "CPU Idle Driver for Calxeda processors"
depends on ARCH_HIGHBANK
select ARM_CPU_SUSPEND
help
Select this to enable cpuidle on Calxeda processors.

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@ -630,7 +630,7 @@ static struct irq_chip msm_gpio_irq_chip = {
.irq_set_type = msm_gpio_irq_set_type,
};
static int __devinit gpio_msm_v1_probe(struct platform_device *pdev)
static int gpio_msm_v1_probe(struct platform_device *pdev)
{
int i, j = 0;
const struct platform_device_id *dev_id = platform_get_device_id(pdev);

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@ -685,7 +685,7 @@ config I2C_SIMTEC
config I2C_SIRF
tristate "CSR SiRFprimaII I2C interface"
depends on ARCH_PRIMA2
depends on ARCH_SIRF
help
If you say yes to this option, support will be included for the
CSR SiRFprimaII I2C interface.

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@ -248,8 +248,8 @@ static int irqc_probe(struct platform_device *pdev)
return 0;
err3:
for (; k >= 0; k--)
free_irq(p->irq[k - 1].requested_irq, &p->irq[k - 1]);
while (--k >= 0)
free_irq(p->irq[k].requested_irq, &p->irq[k]);
irq_domain_remove(p->irq_domain);
err2:

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@ -95,7 +95,7 @@ config MTD_NAND_OMAP2
config MTD_NAND_OMAP_BCH
depends on MTD_NAND && MTD_NAND_OMAP2 && ARCH_OMAP3
bool "Enable support for hardware BCH error correction"
tristate "Enable support for hardware BCH error correction"
default n
select BCH
select BCH_CONST_PARAMS

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@ -2899,7 +2899,7 @@ static void nsp32_do_bus_reset(nsp32_hw_data *data)
* reset SCSI bus
*/
nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
udelay(RESET_HOLD_TIME);
mdelay(RESET_HOLD_TIME / 1000);
nsp32_write1(base, SCSI_BUS_CONTROL, 0);
for(i = 0; i < 5; i++) {
intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */

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@ -404,7 +404,7 @@ config SPI_SH_HSPI
config SPI_SIRF
tristate "CSR SiRFprimaII SPI controller"
depends on ARCH_PRIMA2
depends on ARCH_SIRF
select SPI_BITBANG
help
SPI driver for CSR SiRFprimaII SoCs

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@ -350,6 +350,7 @@ static struct of_device_id ssbi_match_table[] = {
{ .compatible = "qcom,ssbi" },
{}
};
MODULE_DEVICE_TABLE(of, ssbi_match_table);
static struct platform_driver ssbi_driver = {
.probe = ssbi_probe,

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@ -251,7 +251,7 @@ config SERIAL_SAMSUNG_CONSOLE
config SERIAL_SIRFSOC
tristate "SiRF SoC Platform Serial port support"
depends on ARCH_PRIMA2
depends on ARCH_SIRF
select SERIAL_CORE
help
Support for the on-chip UART on the CSR SiRFprimaII series,

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@ -11,6 +11,10 @@
#ifndef _LINUX_IRQCHIP_H
#define _LINUX_IRQCHIP_H
#ifdef CONFIG_IRQCHIP
void irqchip_init(void);
#else
static inline void irqchip_init(void) {}
#endif
#endif

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@ -50,8 +50,6 @@ my @indices = ();
my @lengths = ();
my $total_length = 0;
print "Compiling ", $#names + 1, " OIDs\n";
for (my $i = 0; $i <= $#names; $i++) {
my $name = $names[$i];
my $oid = $oids[$i];