forked from Minki/linux
habanalabs: sync stream generic functionality
Currently sync stream is limited only for external queues. We want to remove this constraint by adding a new queue property dedicated for sync stream. In addition we move the initialization and reset methods to the common code since we can re-use them with slight changes. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
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c16d45f42b
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21e7a34634
@ -740,6 +740,7 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
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struct hl_cs_job *job;
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struct hl_cs *cs;
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struct hl_cb *cb;
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enum hl_queue_type q_type;
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u64 *signal_seq_arr = NULL, signal_seq;
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u32 size_to_copy, q_idx, signal_seq_arr_len, cb_size;
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int rc;
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@ -772,9 +773,10 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
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chunk = &cs_chunk_array[0];
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q_idx = chunk->queue_index;
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hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];
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q_type = hw_queue_prop->type;
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if ((q_idx >= HL_MAX_QUEUES) ||
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(hw_queue_prop->type != QUEUE_TYPE_EXT)) {
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(!hw_queue_prop->supports_sync_stream)) {
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dev_err(hdev->dev, "Queue index %d is invalid\n", q_idx);
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rc = -EINVAL;
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goto free_cs_chunk_array;
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@ -871,7 +873,7 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
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*cs_seq = cs->sequence;
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job = hl_cs_allocate_job(hdev, QUEUE_TYPE_EXT, true);
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job = hl_cs_allocate_job(hdev, q_type, true);
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if (!job) {
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dev_err(hdev->dev, "Failed to allocate a new job\n");
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rc = -ENOMEM;
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@ -345,10 +345,12 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev)
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prop->hw_queues_props[i].type = QUEUE_TYPE_EXT;
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prop->hw_queues_props[i].driver_only = 0;
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prop->hw_queues_props[i].requires_kernel_cb = 1;
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prop->hw_queues_props[i].supports_sync_stream = 1;
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} else if (gaudi_queue_type[i] == QUEUE_TYPE_CPU) {
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prop->hw_queues_props[i].type = QUEUE_TYPE_CPU;
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prop->hw_queues_props[i].driver_only = 1;
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prop->hw_queues_props[i].requires_kernel_cb = 0;
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prop->hw_queues_props[i].supports_sync_stream = 0;
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} else if (gaudi_queue_type[i] == QUEUE_TYPE_INT) {
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prop->hw_queues_props[i].type = QUEUE_TYPE_INT;
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prop->hw_queues_props[i].driver_only = 0;
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@ -357,6 +359,7 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev)
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prop->hw_queues_props[i].type = QUEUE_TYPE_NA;
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prop->hw_queues_props[i].driver_only = 0;
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prop->hw_queues_props[i].requires_kernel_cb = 0;
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prop->hw_queues_props[i].supports_sync_stream = 0;
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}
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}
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@ -364,7 +367,8 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev)
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prop->hw_queues_props[i].type = QUEUE_TYPE_NA;
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prop->completion_queues_count = NUMBER_OF_CMPLT_QUEUES;
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prop->sync_stream_first_sob = 0;
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prop->sync_stream_first_mon = 0;
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prop->dram_base_address = DRAM_PHYS_BASE;
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prop->dram_size = GAUDI_HBM_SIZE_32GB;
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prop->dram_end_address = prop->dram_base_address +
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@ -6296,44 +6300,6 @@ static u32 gaudi_get_queue_id_for_cq(struct hl_device *hdev, u32 cq_idx)
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return gaudi_cq_assignment[cq_idx];
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}
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static void gaudi_ext_queue_init(struct hl_device *hdev, u32 q_idx)
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{
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struct gaudi_device *gaudi = hdev->asic_specific;
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struct hl_hw_queue *hw_queue = &hdev->kernel_queues[q_idx];
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struct hl_hw_sob *hw_sob;
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int sob, ext_idx = gaudi->ext_queue_idx++;
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/*
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* The external queues might not sit sequentially, hence use the
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* real external queue index for the SOB/MON base id.
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*/
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hw_queue->base_sob_id = ext_idx * HL_RSVD_SOBS;
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hw_queue->base_mon_id = ext_idx * HL_RSVD_MONS;
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hw_queue->next_sob_val = 1;
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hw_queue->curr_sob_offset = 0;
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for (sob = 0 ; sob < HL_RSVD_SOBS ; sob++) {
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hw_sob = &hw_queue->hw_sob[sob];
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hw_sob->hdev = hdev;
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hw_sob->sob_id = hw_queue->base_sob_id + sob;
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hw_sob->q_idx = q_idx;
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kref_init(&hw_sob->kref);
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}
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}
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static void gaudi_ext_queue_reset(struct hl_device *hdev, u32 q_idx)
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{
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struct hl_hw_queue *hw_queue = &hdev->kernel_queues[q_idx];
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/*
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* In case we got here due to a stuck CS, the refcnt might be bigger
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* than 1 and therefore we reset it.
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*/
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kref_init(&hw_queue->hw_sob[hw_queue->curr_sob_offset].kref);
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hw_queue->curr_sob_offset = 0;
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hw_queue->next_sob_val = 1;
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}
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static u32 gaudi_get_signal_cb_size(struct hl_device *hdev)
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{
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return sizeof(struct packet_msg_short) +
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@ -6636,8 +6602,6 @@ static const struct hl_asic_funcs gaudi_funcs = {
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.read_device_fw_version = gaudi_read_device_fw_version,
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.load_firmware_to_device = gaudi_load_firmware_to_device,
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.load_boot_fit_to_device = gaudi_load_boot_fit_to_device,
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.ext_queue_init = gaudi_ext_queue_init,
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.ext_queue_reset = gaudi_ext_queue_reset,
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.get_signal_cb_size = gaudi_get_signal_cb_size,
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.get_wait_cb_size = gaudi_get_wait_cb_size,
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.gen_signal_cb = gaudi_gen_signal_cb,
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@ -234,7 +234,6 @@ struct gaudi_internal_qman_info {
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* engine.
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* @multi_msi_mode: whether we are working in multi MSI single MSI mode.
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* Multi MSI is possible only with IOMMU enabled.
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* @ext_queue_idx: helper index for external queues initialization.
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* @mmu_cache_inv_pi: PI for MMU cache invalidation flow. The H/W expects an
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* 8-bit value so use u8.
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*/
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@ -255,7 +254,6 @@ struct gaudi_device {
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u32 events_stat_aggregate[GAUDI_EVENT_SIZE];
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u32 hw_cap_initialized;
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u8 multi_msi_mode;
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u8 ext_queue_idx;
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u8 mmu_cache_inv_pi;
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};
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@ -5156,16 +5156,6 @@ u32 goya_get_queue_id_for_cq(struct hl_device *hdev, u32 cq_idx)
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return cq_idx;
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}
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static void goya_ext_queue_init(struct hl_device *hdev, u32 q_idx)
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{
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}
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static void goya_ext_queue_reset(struct hl_device *hdev, u32 q_idx)
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{
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}
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static u32 goya_get_signal_cb_size(struct hl_device *hdev)
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{
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return 0;
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@ -5279,8 +5269,6 @@ static const struct hl_asic_funcs goya_funcs = {
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.read_device_fw_version = goya_read_device_fw_version,
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.load_firmware_to_device = goya_load_firmware_to_device,
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.load_boot_fit_to_device = goya_load_boot_fit_to_device,
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.ext_queue_init = goya_ext_queue_init,
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.ext_queue_reset = goya_ext_queue_reset,
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.get_signal_cb_size = goya_get_signal_cb_size,
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.get_wait_cb_size = goya_get_wait_cb_size,
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.gen_signal_cb = goya_gen_signal_cb,
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@ -50,6 +50,10 @@
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/* MMU */
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#define MMU_HASH_TABLE_BITS 7 /* 1 << 7 buckets */
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/*
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* HL_RSVD_SOBS 'sync stream' reserved sync objects per QMAN stream
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* HL_RSVD_MONS 'sync stream' reserved monitors per QMAN stream
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*/
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#define HL_RSVD_SOBS 4
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#define HL_RSVD_MONS 2
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@ -141,11 +145,13 @@ struct hl_hw_sob {
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* false otherwise.
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* @requires_kernel_cb: true if a CB handle must be provided for jobs on this
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* queue, false otherwise (a CB address must be provided).
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* @supports_sync_stream: True if queue supports sync stream
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*/
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struct hw_queue_properties {
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enum hl_queue_type type;
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u8 driver_only;
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u8 requires_kernel_cb;
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u8 supports_sync_stream;
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};
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/**
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@ -245,6 +251,9 @@ struct hl_mmu_properties {
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* @cb_pool_cb_cnt: number of CBs in the CB pool.
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* @cb_pool_cb_size: size of each CB in the CB pool.
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* @tpc_enabled_mask: which TPCs are enabled.
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* @sync_stream_first_sob: first sync object available for sync stream use
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* @sync_stream_first_mon: first monitor available for sync stream use
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* @tpc_enabled_mask: which TPCs are enabled.
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* @completion_queues_count: number of completion queues.
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*/
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struct asic_fixed_properties {
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@ -286,6 +295,8 @@ struct asic_fixed_properties {
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u32 cb_pool_cb_cnt;
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u32 cb_pool_cb_size;
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u32 max_pending_cs;
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u16 sync_stream_first_sob;
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u16 sync_stream_first_mon;
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u8 tpc_enabled_mask;
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u8 completion_queues_count;
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};
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@ -423,6 +434,7 @@ struct hl_cs_job;
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* exist).
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* @curr_sob_offset: the id offset to the currently used SOB from the
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* HL_RSVD_SOBS that are being used by this queue.
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* @supports_sync_stream: True if queue supports sync stream
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*/
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struct hl_hw_queue {
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struct hl_hw_sob hw_sob[HL_RSVD_SOBS];
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@ -441,6 +453,7 @@ struct hl_hw_queue {
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u16 base_mon_id;
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u8 valid;
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u8 curr_sob_offset;
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u8 supports_sync_stream;
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};
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/**
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@ -603,8 +616,6 @@ enum hl_pll_frequency {
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* contained in registers
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* @load_firmware_to_device: load the firmware to the device's memory
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* @load_boot_fit_to_device: load boot fit to device's memory
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* @ext_queue_init: Initialize the given external queue.
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* @ext_queue_reset: Reset the given external queue.
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* @get_signal_cb_size: Get signal CB size.
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* @get_wait_cb_size: Get wait CB size.
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* @gen_signal_cb: Generate a signal CB.
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@ -707,8 +718,6 @@ struct hl_asic_funcs {
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enum hl_fw_component fwc);
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int (*load_firmware_to_device)(struct hl_device *hdev);
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int (*load_boot_fit_to_device)(struct hl_device *hdev);
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void (*ext_queue_init)(struct hl_device *hdev, u32 hw_queue_id);
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void (*ext_queue_reset)(struct hl_device *hdev, u32 hw_queue_id);
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u32 (*get_signal_cb_size)(struct hl_device *hdev);
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u32 (*get_wait_cb_size)(struct hl_device *hdev);
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void (*gen_signal_cb)(struct hl_device *hdev, void *data, u16 sob_id);
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@ -1436,6 +1445,7 @@ struct hl_device_idle_busy_ts {
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* @cdev_sysfs_created: were char devices and sysfs nodes created.
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* @stop_on_err: true if engines should stop on error.
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* @supports_sync_stream: is sync stream supported.
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* @sync_stream_queue_idx: helper index for sync stream queues initialization.
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* @supports_coresight: is CoreSight supported.
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* @supports_soft_reset: is soft reset supported.
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*/
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@ -1523,6 +1533,7 @@ struct hl_device {
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u8 cdev_sysfs_created;
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u8 stop_on_err;
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u8 supports_sync_stream;
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u8 sync_stream_queue_idx;
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u8 supports_coresight;
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u8 supports_soft_reset;
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@ -663,9 +663,6 @@ static int ext_and_cpu_queue_init(struct hl_device *hdev, struct hl_hw_queue *q,
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q->ci = 0;
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q->pi = 0;
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if (!is_cpu_queue)
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hdev->asic_funcs->ext_queue_init(hdev, q->hw_queue_id);
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return 0;
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free_queue:
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@ -732,6 +729,42 @@ static int hw_queue_init(struct hl_device *hdev, struct hl_hw_queue *q)
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return 0;
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}
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static void sync_stream_queue_init(struct hl_device *hdev, u32 q_idx)
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{
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struct hl_hw_queue *hw_queue = &hdev->kernel_queues[q_idx];
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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struct hl_hw_sob *hw_sob;
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int sob, queue_idx = hdev->sync_stream_queue_idx++;
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hw_queue->base_sob_id =
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prop->sync_stream_first_sob + queue_idx * HL_RSVD_SOBS;
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hw_queue->base_mon_id =
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prop->sync_stream_first_mon + queue_idx * HL_RSVD_MONS;
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hw_queue->next_sob_val = 1;
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hw_queue->curr_sob_offset = 0;
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for (sob = 0 ; sob < HL_RSVD_SOBS ; sob++) {
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hw_sob = &hw_queue->hw_sob[sob];
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hw_sob->hdev = hdev;
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hw_sob->sob_id = hw_queue->base_sob_id + sob;
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hw_sob->q_idx = q_idx;
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kref_init(&hw_sob->kref);
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}
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}
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static void sync_stream_queue_reset(struct hl_device *hdev, u32 q_idx)
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{
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struct hl_hw_queue *hw_queue = &hdev->kernel_queues[q_idx];
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/*
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* In case we got here due to a stuck CS, the refcnt might be bigger
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* than 1 and therefore we reset it.
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*/
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kref_init(&hw_queue->hw_sob[hw_queue->curr_sob_offset].kref);
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hw_queue->curr_sob_offset = 0;
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hw_queue->next_sob_val = 1;
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}
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/*
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* queue_init - main initialization function for H/W queue object
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*
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@ -774,6 +807,9 @@ static int queue_init(struct hl_device *hdev, struct hl_hw_queue *q,
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break;
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}
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if (q->supports_sync_stream)
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sync_stream_queue_init(hdev, q->hw_queue_id);
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if (rc)
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return rc;
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@ -848,6 +884,8 @@ int hl_hw_queues_create(struct hl_device *hdev)
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i < HL_MAX_QUEUES ; i++, q_ready_cnt++, q++) {
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q->queue_type = asic->hw_queues_props[i].type;
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q->supports_sync_stream =
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asic->hw_queues_props[i].supports_sync_stream;
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rc = queue_init(hdev, q, i);
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if (rc) {
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dev_err(hdev->dev,
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@ -889,7 +927,7 @@ void hl_hw_queue_reset(struct hl_device *hdev, bool hard_reset)
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continue;
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q->pi = q->ci = 0;
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if (q->queue_type == QUEUE_TYPE_EXT)
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hdev->asic_funcs->ext_queue_reset(hdev, q->hw_queue_id);
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if (q->supports_sync_stream)
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sync_stream_queue_reset(hdev, q->hw_queue_id);
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}
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}
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