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dt-bindings: memory: tegra20: emc: Correct registers range in example

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There is superfluous zero in the registers base address and registers
size should be twice bigger.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201104164923.21238-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Dmitry Osipenko 2020-11-04 19:48:40 +03:00 committed by Krzysztof Kozlowski
parent 65abc8ef57
commit 21d3cdd039
1 changed files with 1 additions and 1 deletions
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Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
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@ -21,7 +21,7 @@ Example:
#address-cells = < 1 >;
#size-cells = < 0 >;
compatible = "nvidia,tegra20-emc";
reg = <0x7000f4000 0x200>;
reg = <0x7000f400 0x400>;
interrupts = <0 78 0x04>;
clocks = <&tegra_car TEGRA20_CLK_EMC>;
}