iwl3945: set TFD_QUEUE_MAX to correct value
Total number of queues is 8 but only 7 of them are TX queues. 4 AC(Data) queue ,1 CMD and 2 HCCA. The HCCA queues are not used. max_txq_num is set to maximum usable TX queues. Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -233,7 +233,7 @@ struct iwl3945_eeprom {
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#define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */
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#define TFD_QUEUE_MIN 0
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#define TFD_QUEUE_MAX 6
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#define TFD_QUEUE_MAX 5 /* 4 DATA + 1 CMD */
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#define IWL_NUM_SCAN_RATES (2)
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@ -1046,7 +1046,7 @@ static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
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goto error;
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/* Tx queue(s) */
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for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
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for (txq_id = 0; txq_id <= priv->hw_params.max_txq_num; txq_id++) {
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slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
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TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
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rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
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@ -1239,7 +1239,7 @@ void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
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int txq_id;
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/* Tx queues */
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for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
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for (txq_id = 0; txq_id <= priv->hw_params.max_txq_num; txq_id++)
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iwl_tx_queue_free(priv, txq_id);
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}
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@ -1259,7 +1259,7 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
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iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
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/* reset TFD queues */
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for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
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for (txq_id = 0; txq_id <= priv->hw_params.max_txq_num; txq_id++) {
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iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
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iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
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FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
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@ -2488,6 +2488,9 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
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return -ENOMEM;
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}
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/* Assign number of Usable TX queues */
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priv->hw_params.max_txq_num = TFD_QUEUE_MAX;
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priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
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priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_3K;
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priv->hw_params.max_pkt_size = 2342;
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