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intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets

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We already have the quirk entry for the mobile platform, but also
reports on some desktop versions. So be paranoid and set it
everywhere.

References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html
Cc: stable@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: "Sankaran, Rajesh" <rajesh.sankaran@intel.com>
Reported-and-tested-by: Mihai Moldovan <ionic@ionic.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2013-01-21 19:48:59 +01:00
parent da88a5f7f7
commit 210561ffd7
1 changed files with 7 additions and 1 deletions
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8
drivers/iommu/intel-iommu.c
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@ -4253,13 +4253,19 @@ static void quirk_iommu_rwbf(struct pci_dev *dev)
{ {
/* /*
* Mobile 4 Series Chipset neglects to set RWBF capability, * Mobile 4 Series Chipset neglects to set RWBF capability,
* but needs it: * but needs it. Same seems to hold for the desktop versions.
*/ */
printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n"); printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
rwbf_quirk = 1; rwbf_quirk = 1;
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf);
#define GGC 0x52 #define GGC 0x52
#define GGC_MEMORY_SIZE_MASK (0xf << 8) #define GGC_MEMORY_SIZE_MASK (0xf << 8)