Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/bcm63xx', 'spi/fix/doc', 'spi/fix/fsl-dspi' and 'spi/fix/ti-qspi' into spi-linus

This commit is contained in:
Mark Brown 2017-07-03 16:21:02 +01:00
5 changed files with 28 additions and 3 deletions

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@ -457,6 +457,7 @@ config SPI_OMAP24XX
config SPI_TI_QSPI config SPI_TI_QSPI
tristate "DRA7xxx QSPI controller support" tristate "DRA7xxx QSPI controller support"
depends on HAS_DMA
depends on ARCH_OMAP2PLUS || COMPILE_TEST depends on ARCH_OMAP2PLUS || COMPILE_TEST
help help
QSPI master controller for DRA7xxx used for flash devices. QSPI master controller for DRA7xxx used for flash devices.

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@ -269,6 +269,7 @@ struct atmel_spi_caps {
bool is_spi2; bool is_spi2;
bool has_wdrbt; bool has_wdrbt;
bool has_dma_support; bool has_dma_support;
bool has_pdc_support;
}; };
/* /*
@ -1426,7 +1427,28 @@ static void atmel_get_caps(struct atmel_spi *as)
as->caps.is_spi2 = version > 0x121; as->caps.is_spi2 = version > 0x121;
as->caps.has_wdrbt = version >= 0x210; as->caps.has_wdrbt = version >= 0x210;
#ifdef CONFIG_SOC_SAM_V4_V5
/*
* Atmel SoCs based on ARM9 (SAM9x) cores should not use spi_map_buf()
* since this later function tries to map buffers with dma_map_sg()
* even if they have not been allocated inside DMA-safe areas.
* On SoCs based on Cortex A5 (SAMA5Dx), it works anyway because for
* those ARM cores, the data cache follows the PIPT model.
* Also the L2 cache controller of SAMA5D2 uses the PIPT model too.
* In case of PIPT caches, there cannot be cache aliases.
* However on ARM9 cores, the data cache follows the VIVT model, hence
* the cache aliases issue can occur when buffers are allocated from
* DMA-unsafe areas, by vmalloc() for instance, where cache coherency is
* not taken into account or at least not handled completely (cache
* lines of aliases are not invalidated).
* This is not a theorical issue: it was reproduced when trying to mount
* a UBI file-system on a at91sam9g35ek board.
*/
as->caps.has_dma_support = false;
#else
as->caps.has_dma_support = version >= 0x212; as->caps.has_dma_support = version >= 0x212;
#endif
as->caps.has_pdc_support = version < 0x212;
} }
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
@ -1567,7 +1589,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
} else if (ret == -EPROBE_DEFER) { } else if (ret == -EPROBE_DEFER) {
return ret; return ret;
} }
} else { } else if (as->caps.has_pdc_support) {
as->use_pdc = true; as->use_pdc = true;
} }

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@ -484,6 +484,7 @@ static const struct of_device_id bcm63xx_hsspi_of_match[] = {
{ .compatible = "brcm,bcm6328-hsspi", }, { .compatible = "brcm,bcm6328-hsspi", },
{ }, { },
}; };
MODULE_DEVICE_TABLE(of, bcm63xx_hsspi_of_match);
static struct platform_driver bcm63xx_hsspi_driver = { static struct platform_driver bcm63xx_hsspi_driver = {
.driver = { .driver = {

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@ -1032,7 +1032,8 @@ static int dspi_probe(struct platform_device *pdev)
goto out_master_put; goto out_master_put;
if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) {
if (dspi_request_dma(dspi, res->start)) { ret = dspi_request_dma(dspi, res->start);
if (ret < 0) {
dev_err(&pdev->dev, "can't get dma channels\n"); dev_err(&pdev->dev, "can't get dma channels\n");
goto out_clk_put; goto out_clk_put;
} }

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@ -2021,7 +2021,7 @@ static void devm_spi_unregister(struct device *dev, void *res)
} }
/** /**
* dev_spi_register_master - register managed SPI master controller * devm_spi_register_master - register managed SPI master controller
* @dev: device managing SPI master * @dev: device managing SPI master
* @master: initialized master, originally from spi_alloc_master() * @master: initialized master, originally from spi_alloc_master()
* Context: can sleep * Context: can sleep