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drm/i915: Enable/disable IPS when primary is enabled/disabled

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IPS should be OK as long as one plane is enabled on the pipe, but
it does seem to cause problems when going between primary only and
sprite only.

This needs more investigations, but for now just disable IPS whenever
the primary plane is disabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ville Syrjälä 2013-10-01 18:02:17 +03:00 committed by Daniel Vetter
parent abae50ed12
commit 20bc86739b
3 changed files with 23 additions and 2 deletions
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4
drivers/gpu/drm/i915/intel_display.c
View File

@ -3329,7 +3329,7 @@ static void intel_disable_planes(struct drm_crtc *crtc)
intel_plane_disable(&intel_plane->base);
}
static void hsw_enable_ips(struct intel_crtc *crtc)
void hsw_enable_ips(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
@ -3344,7 +3344,7 @@ static void hsw_enable_ips(struct intel_crtc *crtc)
I915_WRITE(IPS_CTL, IPS_ENABLE);
}
static void hsw_disable_ips(struct intel_crtc *crtc)
void hsw_disable_ips(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;

2
drivers/gpu/drm/i915/intel_drv.h
View File

@ -677,6 +677,8 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
int dotclock);
bool intel_crtc_active(struct drm_crtc *crtc);
void i915_disable_vga_mem(struct drm_device *dev);
void hsw_enable_ips(struct intel_crtc *crtc);
void hsw_disable_ips(struct intel_crtc *crtc);
/* intel_dp.c */

19
drivers/gpu/drm/i915/intel_sprite.c
View File

@ -528,6 +528,17 @@ intel_enable_primary(struct drm_crtc *crtc)
I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
/*
* FIXME IPS should be fine as long as one plane is
* enabled, but in practice it seems to have problems
* when going from primary only to sprite only and vice
* versa.
*/
if (intel_crtc->config.ips_enabled) {
intel_wait_for_vblank(dev, intel_crtc->pipe);
hsw_enable_ips(intel_crtc);
}
mutex_lock(&dev->struct_mutex);
intel_update_fbc(dev);
mutex_unlock(&dev->struct_mutex);
@ -551,6 +562,14 @@ intel_disable_primary(struct drm_crtc *crtc)
intel_disable_fbc(dev);
mutex_unlock(&dev->struct_mutex);
/*
* FIXME IPS should be fine as long as one plane is
* enabled, but in practice it seems to have problems
* when going from primary only to sprite only and vice
* versa.
*/
hsw_disable_ips(intel_crtc);
I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
}