forked from Minki/linux
fpga: dfl-pci: rectify ReST formatting
Commit fa41d10589
("fpga: dfl-pci: locate DFLs by PCIe vendor specific
capability") provides documentation to the FPGA Device Feature List (DFL)
Framework Overview, but introduced new documentation warnings:
./Documentation/fpga/dfl.rst:
505: WARNING: Title underline too short.
523: WARNING: Unexpected indentation.
523: WARNING: Blank line required after table.
524: WARNING: Block quote ends without a blank line; unexpected unindent.
Rectify ReST formatting in ./Documentation/fpga/dfl.rst.
Tested-by: Tom Rix <trix@redhat.com>
Acked-by: Moritz Fischer <mdf@kernel.org>
Acked-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20210111112113.27242-1-lukas.bulwahn@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -502,7 +502,7 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
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could be a reference.
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Location of DFLs on a PCI Device
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===========================
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================================
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The original method for finding a DFL on a PCI device assumed the start of the
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first DFL to offset 0 of bar 0. If the first node of the DFL is an FME,
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then further DFLs in the port(s) are specified in FME header registers.
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@ -514,6 +514,7 @@ data begins with a 4 byte vendor specific register for the number of DFLs follow
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Offset/BIR vendor specific registers for each DFL. Bits 2:0 of Offset/BIR register
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indicates the BAR, and bits 31:3 form the 8 byte aligned offset where bits 2:0 are
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zero.
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::
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+----------------------------+
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|31 Number of DFLS 0|
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