forked from Minki/linux
drm/i915: Move the renderstate setup under gt/
The render state is used to initialise the default RCS context, and only used during early setup from within the gt code. As such, it makes a good candidate for placing within gt/, even if it is not yet entirely clean of our GEM heritage. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190704091925.7391-1-chris@chris-wilson.co.uk
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068610895e
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@ -78,12 +78,19 @@ gt-y += \
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gt/intel_gt_pm.o \
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gt/intel_hangcheck.o \
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gt/intel_lrc.o \
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gt/intel_renderstate.o \
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gt/intel_reset.o \
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gt/intel_ringbuffer.o \
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gt/intel_mocs.o \
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gt/intel_sseu.o \
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gt/intel_timeline.o \
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gt/intel_workarounds.o
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# autogenerated null render state
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gt-y += \
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gt/gen6_renderstate.o \
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gt/gen7_renderstate.o \
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gt/gen8_renderstate.o \
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gt/gen9_renderstate.o
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gt-$(CONFIG_DRM_I915_SELFTEST) += \
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gt/mock_engine.o
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i915-y += $(gt-y)
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@ -123,7 +130,6 @@ i915-y += \
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i915_gem_fence_reg.o \
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i915_gem_gtt.o \
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i915_gem.o \
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i915_gem_render_state.o \
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i915_globals.o \
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i915_query.o \
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i915_request.o \
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@ -144,12 +150,6 @@ i915-y += intel_uc.o \
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intel_huc.o \
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intel_huc_fw.o
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# autogenerated null render state
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i915-y += intel_renderstate_gen6.o \
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intel_renderstate_gen7.o \
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intel_renderstate_gen8.o \
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intel_renderstate_gen9.o
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# modesetting core code
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obj-y += display/
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i915-y += \
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@ -135,13 +135,13 @@
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#include "gem/i915_gem_context.h"
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#include "gt/intel_gt.h"
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#include "i915_drv.h"
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#include "i915_gem_render_state.h"
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#include "i915_vgpu.h"
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#include "intel_engine_pm.h"
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#include "intel_gt.h"
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#include "intel_lrc_reg.h"
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#include "intel_mocs.h"
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#include "intel_renderstate.h"
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#include "intel_reset.h"
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#include "intel_workarounds.h"
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@ -2677,7 +2677,7 @@ static int gen8_init_rcs_context(struct i915_request *rq)
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if (ret)
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DRM_ERROR("MOCS failed to program: expect performance issues.\n");
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return i915_gem_render_state_emit(rq);
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return intel_renderstate_emit(rq);
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}
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static void execlists_park(struct intel_engine_cs *engine)
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@ -26,10 +26,9 @@
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*/
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#include "i915_drv.h"
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#include "i915_gem_render_state.h"
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#include "intel_renderstate.h"
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struct intel_render_state {
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struct intel_renderstate {
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const struct intel_renderstate_rodata *rodata;
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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@ -75,7 +74,7 @@ render_state_get_rodata(const struct intel_engine_cs *engine)
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(batch)[(i)++] = (val); \
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} while(0)
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static int render_state_setup(struct intel_render_state *so,
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static int render_state_setup(struct intel_renderstate *so,
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struct drm_i915_private *i915)
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{
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const struct intel_renderstate_rodata *rodata = so->rodata;
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@ -177,10 +176,10 @@ err:
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#undef OUT_BATCH
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int i915_gem_render_state_emit(struct i915_request *rq)
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int intel_renderstate_emit(struct i915_request *rq)
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{
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struct intel_engine_cs *engine = rq->engine;
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struct intel_render_state so = {}; /* keep the compiler happy */
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struct intel_renderstate so = {}; /* keep the compiler happy */
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int err;
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so.rodata = render_state_get_rodata(engine);
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@ -21,11 +21,13 @@
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _INTEL_RENDERSTATE_H
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#define _INTEL_RENDERSTATE_H
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#ifndef _INTEL_RENDERSTATE_H_
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#define _INTEL_RENDERSTATE_H_
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#include <linux/types.h>
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struct i915_request;
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struct intel_renderstate_rodata {
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const u32 *reloc;
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const u32 *batch;
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@ -44,4 +46,6 @@ extern const struct intel_renderstate_rodata gen7_null_state;
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extern const struct intel_renderstate_rodata gen8_null_state;
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extern const struct intel_renderstate_rodata gen9_null_state;
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#endif /* INTEL_RENDERSTATE_H */
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int intel_renderstate_emit(struct i915_request *rq);
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#endif /* _INTEL_RENDERSTATE_H_ */
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@ -33,12 +33,11 @@
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#include "gem/i915_gem_context.h"
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#include "gt/intel_gt.h"
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#include "i915_drv.h"
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#include "i915_gem_render_state.h"
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#include "i915_trace.h"
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#include "intel_context.h"
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#include "intel_gt.h"
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#include "intel_renderstate.h"
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#include "intel_reset.h"
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#include "intel_workarounds.h"
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@ -813,7 +812,7 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
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if (ret != 0)
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return ret;
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ret = i915_gem_render_state_emit(rq);
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ret = intel_renderstate_emit(rq);
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if (ret)
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return ret;
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@ -1,31 +0,0 @@
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _I915_GEM_RENDER_STATE_H_
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#define _I915_GEM_RENDER_STATE_H_
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struct i915_request;
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int i915_gem_render_state_emit(struct i915_request *rq);
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#endif /* _I915_GEM_RENDER_STATE_H_ */
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